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From: David Brazdil <dbrazdil@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
	James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Dennis Zhou <dennis@kernel.org>,
	Tejun Heo <tj@kernel.org>, Christoph Lameter <cl@linux.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Quentin Perret <qperret@google.com>,
	Andrew Scull <ascull@google.com>,
	Andrew Walbran <qwandor@google.com>,
	kernel-team@android.com, David Brazdil <dbrazdil@google.com>
Subject: [PATCH v1 23/24] kvm: arm64: Trap host SMCs in protected mode.
Date: Mon,  9 Nov 2020 11:32:32 +0000	[thread overview]
Message-ID: <20201109113233.9012-24-dbrazdil@google.com> (raw)
In-Reply-To: <20201109113233.9012-1-dbrazdil@google.com>

While protected nVHE KVM is installed, start trapping all host SMCs.
By default, these are simply forwarded to EL3, but PSCI SMCs are
validated first.

Create new constant HCR_HOST_NVHE_PROTECTED_FLAGS with the new set of HCR
flags to use while the nVHE vector is installed when the kernel was
booted with the protected flag enabled. Switch back to the default HCR
flags when switching back to the stub vector.

Signed-off-by: David Brazdil <dbrazdil@google.com>
---
 arch/arm64/include/asm/kvm_arm.h   |  1 +
 arch/arm64/kernel/image-vars.h     |  4 ++++
 arch/arm64/kvm/arm.c               | 35 ++++++++++++++++++++++++++++++
 arch/arm64/kvm/hyp/nvhe/hyp-init.S |  8 +++++++
 arch/arm64/kvm/hyp/nvhe/switch.c   |  5 ++++-
 5 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 64ce29378467..4e90c2debf70 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -80,6 +80,7 @@
 			 HCR_FMO | HCR_IMO | HCR_PTW )
 #define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
 #define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)
+#define HCR_HOST_NVHE_PROTECTED_FLAGS (HCR_HOST_NVHE_FLAGS | HCR_TSC)
 #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
 
 /* TCR_EL2 Registers bits */
diff --git a/arch/arm64/kernel/image-vars.h b/arch/arm64/kernel/image-vars.h
index 78a42a7cdb72..75cda51674f4 100644
--- a/arch/arm64/kernel/image-vars.h
+++ b/arch/arm64/kernel/image-vars.h
@@ -62,9 +62,13 @@ __efistub__ctype		= _ctype;
  */
 
 /* Alternative callbacks for init-time patching of nVHE hyp code. */
+KVM_NVHE_ALIAS(kvm_patch_hcr_flags);
 KVM_NVHE_ALIAS(kvm_patch_vector_branch);
 KVM_NVHE_ALIAS(kvm_update_va_mask);
 
+/* Static key enabled when the user opted into nVHE protected mode. */
+KVM_NVHE_ALIAS(kvm_protected_mode);
+
 /* Global kernel state accessed by nVHE hyp code. */
 KVM_NVHE_ALIAS(kvm_vgic_global_state);
 
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 574aa2d026e6..c09b95cfa00a 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -1861,6 +1861,41 @@ void kvm_arch_exit(void)
 	kvm_perf_teardown();
 }
 
+static inline u32 __init __gen_mov_hcr_insn(u64 hcr, u32 rd, int i)
+{
+	int shift = 48 - (i * 16);
+	u16 imm = (hcr >> shift) & GENMASK(16, 0);
+
+	return aarch64_insn_gen_movewide(rd, imm, shift,
+					 AARCH64_INSN_VARIANT_64BIT,
+					 (i == 0) ? AARCH64_INSN_MOVEWIDE_ZERO
+						  : AARCH64_INSN_MOVEWIDE_KEEP);
+}
+
+void __init kvm_patch_hcr_flags(struct alt_instr *alt,
+				__le32 *origptr, __le32 *updptr, int nr_inst)
+{
+	int i;
+	u32 rd;
+
+	BUG_ON(nr_inst != 4);
+
+	/* Skip for VHE and unprotected nVHE modes. */
+	if (!is_kvm_protected_mode())
+		return;
+
+	rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD,
+					  le32_to_cpu(origptr[0]));
+
+	for (i = 0; i < nr_inst; i++) {
+		u32 oinsn = __gen_mov_hcr_insn(HCR_HOST_NVHE_FLAGS, rd, i);
+		u32 insn = __gen_mov_hcr_insn(HCR_HOST_NVHE_PROTECTED_FLAGS, rd, i);
+
+		BUG_ON(oinsn != le32_to_cpu(origptr[i]));
+		updptr[i] = cpu_to_le32(insn);
+	}
+}
+
 static int __init early_kvm_protected_cfg(char *buf)
 {
 	bool val;
diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
index f999a35b2c8c..bbe6c5f558e0 100644
--- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
@@ -88,6 +88,12 @@ SYM_CODE_END(__kvm_hyp_init)
  * x0: struct kvm_nvhe_init_params PA
  */
 SYM_CODE_START(___kvm_hyp_init)
+alternative_cb kvm_patch_hcr_flags
+	mov_q	x1, HCR_HOST_NVHE_FLAGS
+alternative_cb_end
+	msr	hcr_el2, x1
+	isb
+
 	ldr	x1, [x0, #NVHE_INIT_TPIDR_EL2]
 	msr	tpidr_el2, x1
 
@@ -220,6 +226,8 @@ reset:
 	bic	x5, x5, x6		// Clear SCTL_M and etc
 	pre_disable_mmu_workaround
 	msr	sctlr_el2, x5
+	mov_q	x5, HCR_HOST_NVHE_FLAGS
+	msr	hcr_el2, x5
 	isb
 
 	/* Install stub vectors */
diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c
index 8ae8160bc93a..f605b25a9afc 100644
--- a/arch/arm64/kvm/hyp/nvhe/switch.c
+++ b/arch/arm64/kvm/hyp/nvhe/switch.c
@@ -96,7 +96,10 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)
 	mdcr_el2 |= MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT;
 
 	write_sysreg(mdcr_el2, mdcr_el2);
-	write_sysreg(HCR_HOST_NVHE_FLAGS, hcr_el2);
+	if (is_kvm_protected_mode())
+		write_sysreg(HCR_HOST_NVHE_PROTECTED_FLAGS, hcr_el2);
+	else
+		write_sysreg(HCR_HOST_NVHE_FLAGS, hcr_el2);
 	write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
 	write_sysreg(__kvm_hyp_host_vector, vbar_el2);
 }
-- 
2.29.2.222.g5d2a92d10f8-goog


WARNING: multiple messages have this Message-ID (diff)
From: David Brazdil <dbrazdil@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: kernel-team@android.com,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Walbran <qwandor@google.com>,
	Marc Zyngier <maz@kernel.org>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Tejun Heo <tj@kernel.org>, Dennis Zhou <dennis@kernel.org>,
	Christoph Lameter <cl@linux.com>, Will Deacon <will@kernel.org>
Subject: [PATCH v1 23/24] kvm: arm64: Trap host SMCs in protected mode.
Date: Mon,  9 Nov 2020 11:32:32 +0000	[thread overview]
Message-ID: <20201109113233.9012-24-dbrazdil@google.com> (raw)
In-Reply-To: <20201109113233.9012-1-dbrazdil@google.com>

While protected nVHE KVM is installed, start trapping all host SMCs.
By default, these are simply forwarded to EL3, but PSCI SMCs are
validated first.

Create new constant HCR_HOST_NVHE_PROTECTED_FLAGS with the new set of HCR
flags to use while the nVHE vector is installed when the kernel was
booted with the protected flag enabled. Switch back to the default HCR
flags when switching back to the stub vector.

Signed-off-by: David Brazdil <dbrazdil@google.com>
---
 arch/arm64/include/asm/kvm_arm.h   |  1 +
 arch/arm64/kernel/image-vars.h     |  4 ++++
 arch/arm64/kvm/arm.c               | 35 ++++++++++++++++++++++++++++++
 arch/arm64/kvm/hyp/nvhe/hyp-init.S |  8 +++++++
 arch/arm64/kvm/hyp/nvhe/switch.c   |  5 ++++-
 5 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 64ce29378467..4e90c2debf70 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -80,6 +80,7 @@
 			 HCR_FMO | HCR_IMO | HCR_PTW )
 #define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
 #define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)
+#define HCR_HOST_NVHE_PROTECTED_FLAGS (HCR_HOST_NVHE_FLAGS | HCR_TSC)
 #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
 
 /* TCR_EL2 Registers bits */
diff --git a/arch/arm64/kernel/image-vars.h b/arch/arm64/kernel/image-vars.h
index 78a42a7cdb72..75cda51674f4 100644
--- a/arch/arm64/kernel/image-vars.h
+++ b/arch/arm64/kernel/image-vars.h
@@ -62,9 +62,13 @@ __efistub__ctype		= _ctype;
  */
 
 /* Alternative callbacks for init-time patching of nVHE hyp code. */
+KVM_NVHE_ALIAS(kvm_patch_hcr_flags);
 KVM_NVHE_ALIAS(kvm_patch_vector_branch);
 KVM_NVHE_ALIAS(kvm_update_va_mask);
 
+/* Static key enabled when the user opted into nVHE protected mode. */
+KVM_NVHE_ALIAS(kvm_protected_mode);
+
 /* Global kernel state accessed by nVHE hyp code. */
 KVM_NVHE_ALIAS(kvm_vgic_global_state);
 
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 574aa2d026e6..c09b95cfa00a 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -1861,6 +1861,41 @@ void kvm_arch_exit(void)
 	kvm_perf_teardown();
 }
 
+static inline u32 __init __gen_mov_hcr_insn(u64 hcr, u32 rd, int i)
+{
+	int shift = 48 - (i * 16);
+	u16 imm = (hcr >> shift) & GENMASK(16, 0);
+
+	return aarch64_insn_gen_movewide(rd, imm, shift,
+					 AARCH64_INSN_VARIANT_64BIT,
+					 (i == 0) ? AARCH64_INSN_MOVEWIDE_ZERO
+						  : AARCH64_INSN_MOVEWIDE_KEEP);
+}
+
+void __init kvm_patch_hcr_flags(struct alt_instr *alt,
+				__le32 *origptr, __le32 *updptr, int nr_inst)
+{
+	int i;
+	u32 rd;
+
+	BUG_ON(nr_inst != 4);
+
+	/* Skip for VHE and unprotected nVHE modes. */
+	if (!is_kvm_protected_mode())
+		return;
+
+	rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD,
+					  le32_to_cpu(origptr[0]));
+
+	for (i = 0; i < nr_inst; i++) {
+		u32 oinsn = __gen_mov_hcr_insn(HCR_HOST_NVHE_FLAGS, rd, i);
+		u32 insn = __gen_mov_hcr_insn(HCR_HOST_NVHE_PROTECTED_FLAGS, rd, i);
+
+		BUG_ON(oinsn != le32_to_cpu(origptr[i]));
+		updptr[i] = cpu_to_le32(insn);
+	}
+}
+
 static int __init early_kvm_protected_cfg(char *buf)
 {
 	bool val;
diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
index f999a35b2c8c..bbe6c5f558e0 100644
--- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
@@ -88,6 +88,12 @@ SYM_CODE_END(__kvm_hyp_init)
  * x0: struct kvm_nvhe_init_params PA
  */
 SYM_CODE_START(___kvm_hyp_init)
+alternative_cb kvm_patch_hcr_flags
+	mov_q	x1, HCR_HOST_NVHE_FLAGS
+alternative_cb_end
+	msr	hcr_el2, x1
+	isb
+
 	ldr	x1, [x0, #NVHE_INIT_TPIDR_EL2]
 	msr	tpidr_el2, x1
 
@@ -220,6 +226,8 @@ reset:
 	bic	x5, x5, x6		// Clear SCTL_M and etc
 	pre_disable_mmu_workaround
 	msr	sctlr_el2, x5
+	mov_q	x5, HCR_HOST_NVHE_FLAGS
+	msr	hcr_el2, x5
 	isb
 
 	/* Install stub vectors */
diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c
index 8ae8160bc93a..f605b25a9afc 100644
--- a/arch/arm64/kvm/hyp/nvhe/switch.c
+++ b/arch/arm64/kvm/hyp/nvhe/switch.c
@@ -96,7 +96,10 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)
 	mdcr_el2 |= MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT;
 
 	write_sysreg(mdcr_el2, mdcr_el2);
-	write_sysreg(HCR_HOST_NVHE_FLAGS, hcr_el2);
+	if (is_kvm_protected_mode())
+		write_sysreg(HCR_HOST_NVHE_PROTECTED_FLAGS, hcr_el2);
+	else
+		write_sysreg(HCR_HOST_NVHE_FLAGS, hcr_el2);
 	write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
 	write_sysreg(__kvm_hyp_host_vector, vbar_el2);
 }
-- 
2.29.2.222.g5d2a92d10f8-goog

_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: David Brazdil <dbrazdil@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: Mark Rutland <mark.rutland@arm.com>,
	kernel-team@android.com,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Walbran <qwandor@google.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Quentin Perret <qperret@google.com>,
	linux-kernel@vger.kernel.org, James Morse <james.morse@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Tejun Heo <tj@kernel.org>, Dennis Zhou <dennis@kernel.org>,
	Christoph Lameter <cl@linux.com>,
	David Brazdil <dbrazdil@google.com>,
	Will Deacon <will@kernel.org>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Andrew Scull <ascull@google.com>
Subject: [PATCH v1 23/24] kvm: arm64: Trap host SMCs in protected mode.
Date: Mon,  9 Nov 2020 11:32:32 +0000	[thread overview]
Message-ID: <20201109113233.9012-24-dbrazdil@google.com> (raw)
In-Reply-To: <20201109113233.9012-1-dbrazdil@google.com>

While protected nVHE KVM is installed, start trapping all host SMCs.
By default, these are simply forwarded to EL3, but PSCI SMCs are
validated first.

Create new constant HCR_HOST_NVHE_PROTECTED_FLAGS with the new set of HCR
flags to use while the nVHE vector is installed when the kernel was
booted with the protected flag enabled. Switch back to the default HCR
flags when switching back to the stub vector.

Signed-off-by: David Brazdil <dbrazdil@google.com>
---
 arch/arm64/include/asm/kvm_arm.h   |  1 +
 arch/arm64/kernel/image-vars.h     |  4 ++++
 arch/arm64/kvm/arm.c               | 35 ++++++++++++++++++++++++++++++
 arch/arm64/kvm/hyp/nvhe/hyp-init.S |  8 +++++++
 arch/arm64/kvm/hyp/nvhe/switch.c   |  5 ++++-
 5 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 64ce29378467..4e90c2debf70 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -80,6 +80,7 @@
 			 HCR_FMO | HCR_IMO | HCR_PTW )
 #define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
 #define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)
+#define HCR_HOST_NVHE_PROTECTED_FLAGS (HCR_HOST_NVHE_FLAGS | HCR_TSC)
 #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
 
 /* TCR_EL2 Registers bits */
diff --git a/arch/arm64/kernel/image-vars.h b/arch/arm64/kernel/image-vars.h
index 78a42a7cdb72..75cda51674f4 100644
--- a/arch/arm64/kernel/image-vars.h
+++ b/arch/arm64/kernel/image-vars.h
@@ -62,9 +62,13 @@ __efistub__ctype		= _ctype;
  */
 
 /* Alternative callbacks for init-time patching of nVHE hyp code. */
+KVM_NVHE_ALIAS(kvm_patch_hcr_flags);
 KVM_NVHE_ALIAS(kvm_patch_vector_branch);
 KVM_NVHE_ALIAS(kvm_update_va_mask);
 
+/* Static key enabled when the user opted into nVHE protected mode. */
+KVM_NVHE_ALIAS(kvm_protected_mode);
+
 /* Global kernel state accessed by nVHE hyp code. */
 KVM_NVHE_ALIAS(kvm_vgic_global_state);
 
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 574aa2d026e6..c09b95cfa00a 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -1861,6 +1861,41 @@ void kvm_arch_exit(void)
 	kvm_perf_teardown();
 }
 
+static inline u32 __init __gen_mov_hcr_insn(u64 hcr, u32 rd, int i)
+{
+	int shift = 48 - (i * 16);
+	u16 imm = (hcr >> shift) & GENMASK(16, 0);
+
+	return aarch64_insn_gen_movewide(rd, imm, shift,
+					 AARCH64_INSN_VARIANT_64BIT,
+					 (i == 0) ? AARCH64_INSN_MOVEWIDE_ZERO
+						  : AARCH64_INSN_MOVEWIDE_KEEP);
+}
+
+void __init kvm_patch_hcr_flags(struct alt_instr *alt,
+				__le32 *origptr, __le32 *updptr, int nr_inst)
+{
+	int i;
+	u32 rd;
+
+	BUG_ON(nr_inst != 4);
+
+	/* Skip for VHE and unprotected nVHE modes. */
+	if (!is_kvm_protected_mode())
+		return;
+
+	rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD,
+					  le32_to_cpu(origptr[0]));
+
+	for (i = 0; i < nr_inst; i++) {
+		u32 oinsn = __gen_mov_hcr_insn(HCR_HOST_NVHE_FLAGS, rd, i);
+		u32 insn = __gen_mov_hcr_insn(HCR_HOST_NVHE_PROTECTED_FLAGS, rd, i);
+
+		BUG_ON(oinsn != le32_to_cpu(origptr[i]));
+		updptr[i] = cpu_to_le32(insn);
+	}
+}
+
 static int __init early_kvm_protected_cfg(char *buf)
 {
 	bool val;
diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
index f999a35b2c8c..bbe6c5f558e0 100644
--- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
@@ -88,6 +88,12 @@ SYM_CODE_END(__kvm_hyp_init)
  * x0: struct kvm_nvhe_init_params PA
  */
 SYM_CODE_START(___kvm_hyp_init)
+alternative_cb kvm_patch_hcr_flags
+	mov_q	x1, HCR_HOST_NVHE_FLAGS
+alternative_cb_end
+	msr	hcr_el2, x1
+	isb
+
 	ldr	x1, [x0, #NVHE_INIT_TPIDR_EL2]
 	msr	tpidr_el2, x1
 
@@ -220,6 +226,8 @@ reset:
 	bic	x5, x5, x6		// Clear SCTL_M and etc
 	pre_disable_mmu_workaround
 	msr	sctlr_el2, x5
+	mov_q	x5, HCR_HOST_NVHE_FLAGS
+	msr	hcr_el2, x5
 	isb
 
 	/* Install stub vectors */
diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c
index 8ae8160bc93a..f605b25a9afc 100644
--- a/arch/arm64/kvm/hyp/nvhe/switch.c
+++ b/arch/arm64/kvm/hyp/nvhe/switch.c
@@ -96,7 +96,10 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)
 	mdcr_el2 |= MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT;
 
 	write_sysreg(mdcr_el2, mdcr_el2);
-	write_sysreg(HCR_HOST_NVHE_FLAGS, hcr_el2);
+	if (is_kvm_protected_mode())
+		write_sysreg(HCR_HOST_NVHE_PROTECTED_FLAGS, hcr_el2);
+	else
+		write_sysreg(HCR_HOST_NVHE_FLAGS, hcr_el2);
 	write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
 	write_sysreg(__kvm_hyp_host_vector, vbar_el2);
 }
-- 
2.29.2.222.g5d2a92d10f8-goog


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  parent reply	other threads:[~2020-11-09 11:36 UTC|newest]

Thread overview: 166+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-09 11:32 [PATCH v1 00/24] Opt-in always-on nVHE hypervisor David Brazdil
2020-11-09 11:32 ` David Brazdil
2020-11-09 11:32 ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 01/24] psci: Accessor for configured PSCI version David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-10 14:43   ` Marc Zyngier
2020-11-10 14:43     ` Marc Zyngier
2020-11-10 14:43     ` Marc Zyngier
2020-11-11 11:31     ` David Brazdil
2020-11-11 11:31       ` David Brazdil
2020-11-11 11:31       ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 02/24] psci: Accessor for configured PSCI function IDs David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 03/24] arm64: Move MAIR_EL1_SET to asm/memory.h David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-10 14:49   ` Marc Zyngier
2020-11-10 14:49     ` Marc Zyngier
2020-11-10 14:49     ` Marc Zyngier
2020-11-09 11:32 ` [PATCH v1 04/24] kvm: arm64: Initialize MAIR_EL2 using a constant David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 05/24] kvm: arm64: Add .hyp.data..ro_after_init ELF section David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 06/24] kvm: arm64: Support per_cpu_ptr in nVHE hyp code David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-10 15:08   ` Marc Zyngier
2020-11-10 15:08     ` Marc Zyngier
2020-11-10 15:08     ` Marc Zyngier
2020-11-11 12:32     ` David Brazdil
2020-11-11 12:32       ` David Brazdil
2020-11-11 12:32       ` David Brazdil
2020-11-11 12:46       ` Marc Zyngier
2020-11-11 12:46         ` Marc Zyngier
2020-11-11 12:46         ` Marc Zyngier
2020-11-09 11:32 ` [PATCH v1 07/24] kvm: arm64: Create nVHE copy of cpu_logical_map David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-10 15:24   ` Marc Zyngier
2020-11-10 15:24     ` Marc Zyngier
2020-11-10 15:24     ` Marc Zyngier
2020-11-11 13:03     ` David Brazdil
2020-11-11 13:03       ` David Brazdil
2020-11-11 13:03       ` David Brazdil
2020-11-11 13:29       ` Marc Zyngier
2020-11-11 13:29         ` Marc Zyngier
2020-11-11 13:29         ` Marc Zyngier
2020-11-11 13:45         ` David Brazdil
2020-11-11 13:45           ` David Brazdil
2020-11-11 13:45           ` David Brazdil
2020-11-11 13:52           ` Marc Zyngier
2020-11-11 13:52             ` Marc Zyngier
2020-11-11 13:52             ` Marc Zyngier
2020-11-09 11:32 ` [PATCH v1 08/24] kvm: arm64: Move hyp-init params to a per-CPU struct David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-10 15:30   ` Marc Zyngier
2020-11-10 15:30     ` Marc Zyngier
2020-11-10 15:30     ` Marc Zyngier
2020-11-09 11:32 ` [PATCH v1 09/24] kvm: arm64: Refactor handle_trap to use a switch David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 10/24] kvm: arm64: Extract parts of el2_setup into a macro David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-10 15:56   ` Marc Zyngier
2020-11-10 15:56     ` Marc Zyngier
2020-11-10 15:56     ` Marc Zyngier
2020-11-16 17:56     ` David Brazdil
2020-11-16 17:56       ` David Brazdil
2020-11-16 17:56       ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 11/24] kvm: arm64: Add SMC handler in nVHE EL2 David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-11 12:12   ` Marc Zyngier
2020-11-11 12:12     ` Marc Zyngier
2020-11-11 12:12     ` Marc Zyngier
2020-11-09 11:32 ` [PATCH v1 12/24] kvm: arm64: Extract __do_hyp_init into a helper function David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 13/24] kvm: arm64: Add CPU entry point in nVHE hyp David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-11 11:57   ` Marc Zyngier
2020-11-11 11:57     ` Marc Zyngier
2020-11-11 11:57     ` Marc Zyngier
2020-11-16 11:49     ` David Brazdil
2020-11-16 11:49       ` David Brazdil
2020-11-16 11:49       ` David Brazdil
2020-11-16 12:40       ` Marc Zyngier
2020-11-16 12:40         ` Marc Zyngier
2020-11-16 12:40         ` Marc Zyngier
2020-11-09 11:32 ` [PATCH v1 14/24] kvm: arm64: Add function to enter host from KVM nVHE hyp code David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 15/24] kvm: arm64: Bootstrap PSCI SMC handler in nVHE EL2 David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-11 13:18   ` Marc Zyngier
2020-11-11 13:18     ` Marc Zyngier
2020-11-11 13:18     ` Marc Zyngier
2020-11-09 11:32 ` [PATCH v1 16/24] kvm: arm64: Add offset for hyp VA <-> PA conversion David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-11 13:47   ` Marc Zyngier
2020-11-11 13:47     ` Marc Zyngier
2020-11-11 13:47     ` Marc Zyngier
2020-11-09 11:32 ` [PATCH v1 17/24] kvm: arm64: Add __hyp_pa_symbol helper macro David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 16:59   ` Quentin Perret
2020-11-09 16:59     ` Quentin Perret
2020-11-09 16:59     ` Quentin Perret
2020-11-09 18:10     ` Marc Zyngier
2020-11-09 18:10       ` Marc Zyngier
2020-11-09 18:10       ` Marc Zyngier
2020-11-10  9:24       ` David Brazdil
2020-11-10  9:24         ` David Brazdil
2020-11-10  9:24         ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 18/24] kvm: arm64: Forward safe PSCI SMCs coming from host David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 19/24] kvm: arm64: Intercept host's PSCI_CPU_ON SMCs David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 20/24] kvm: arm64: Intercept host's CPU_SUSPEND PSCI SMCs David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 21/24] kvm: arm64: Add kvm-arm.protected early kernel parameter David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 22/24] kvm: arm64: Keep nVHE EL2 vector installed David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32 ` David Brazdil [this message]
2020-11-09 11:32   ` [PATCH v1 23/24] kvm: arm64: Trap host SMCs in protected mode David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-10  5:02   ` kernel test robot
2020-11-10  5:02     ` kernel test robot
2020-11-10  5:02     ` kernel test robot
2020-11-10  5:02     ` kernel test robot
2020-11-10  9:03   ` Marc Zyngier
2020-11-10  9:03     ` Marc Zyngier
2020-11-10  9:03     ` Marc Zyngier
2020-11-10 13:00     ` David Brazdil
2020-11-10 13:00       ` David Brazdil
2020-11-10 13:00       ` David Brazdil
2020-11-09 11:32 ` [PATCH v1 24/24] kvm: arm64: Fix EL2 mode availability checks David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-09 11:32   ` David Brazdil
2020-11-10 10:15 ` [PATCH v1 00/24] Opt-in always-on nVHE hypervisor Christoph Hellwig
2020-11-10 10:15   ` Christoph Hellwig
2020-11-10 10:15   ` Christoph Hellwig
2020-11-10 11:18   ` Marc Zyngier
2020-11-10 11:18     ` Marc Zyngier
2020-11-10 11:18     ` Marc Zyngier
2021-01-19 13:17     ` Janne Karhunen
2021-01-19 13:17       ` Janne Karhunen
2021-01-19 13:17       ` Janne Karhunen
2020-11-11 14:32 ` Marc Zyngier
2020-11-11 14:32   ` Marc Zyngier
2020-11-11 14:32   ` Marc Zyngier

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