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From: Jordan Crouse <jcrouse@codeaurora.org>
To: Rob Clark <robdclark@gmail.com>
Cc: dri-devel@lists.freedesktop.org,
	Rob Clark <robdclark@chromium.org>, Sean Paul <sean@poorly.run>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"Kristian H. Kristensen" <hoegsberg@google.com>,
	Eric Anholt <eric@anholt.net>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	Emil Velikov <emil.velikov@collabora.com>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU" 
	<linux-arm-msm@vger.kernel.org>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU" 
	<freedreno@lists.freedesktop.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/2] drm/msm/a5xx: Clear shadow on suspend
Date: Tue, 10 Nov 2020 11:46:24 -0700	[thread overview]
Message-ID: <20201110184624.GB2661@jcrouse1-lnx.qualcomm.com> (raw)
In-Reply-To: <20201110184401.282982-2-robdclark@gmail.com>

On Tue, Nov 10, 2020 at 10:44:00AM -0800, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
> 
> Similar to the previous patch, clear shadow on suspend to avoid timeouts
> waiting for ringbuffer space.
> 
> Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")
> Signed-off-by: Rob Clark <robdclark@chromium.org>

Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index b0005ccd81c6..8fa5c917d017 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -1206,7 +1206,9 @@ static int a5xx_pm_resume(struct msm_gpu *gpu)
>  static int a5xx_pm_suspend(struct msm_gpu *gpu)
>  {
>  	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> +	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
>  	u32 mask = 0xf;
> +	int i, ret;
>  
>  	/* A510 has 3 XIN ports in VBIF */
>  	if (adreno_is_a510(adreno_gpu))
> @@ -1226,7 +1228,15 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
>  	gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
>  	gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
>  
> -	return msm_gpu_pm_suspend(gpu);
> +	ret = msm_gpu_pm_suspend(gpu);
> +	if (ret)
> +		return ret;
> +
> +	if (a5xx_gpu->has_whereami)
> +		for (i = 0; i < gpu->nr_rings; i++)
> +			a5xx_gpu->shadow[i] = 0;
> +
> +	return 0;
>  }
>  
>  static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
> -- 
> 2.28.0
> 

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

WARNING: multiple messages have this Message-ID (diff)
From: Jordan Crouse <jcrouse@codeaurora.org>
To: Rob Clark <robdclark@gmail.com>
Cc: Rob Clark <robdclark@chromium.org>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU"
	<freedreno@lists.freedesktop.org>,
	David Airlie <airlied@linux.ie>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU"
	<linux-arm-msm@vger.kernel.org>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	dri-devel@lists.freedesktop.org,
	open list <linux-kernel@vger.kernel.org>,
	"Kristian H. Kristensen" <hoegsberg@google.com>,
	Sean Paul <sean@poorly.run>,
	Emil Velikov <emil.velikov@collabora.com>
Subject: Re: [PATCH 2/2] drm/msm/a5xx: Clear shadow on suspend
Date: Tue, 10 Nov 2020 11:46:24 -0700	[thread overview]
Message-ID: <20201110184624.GB2661@jcrouse1-lnx.qualcomm.com> (raw)
In-Reply-To: <20201110184401.282982-2-robdclark@gmail.com>

On Tue, Nov 10, 2020 at 10:44:00AM -0800, Rob Clark wrote:
> From: Rob Clark <robdclark@chromium.org>
> 
> Similar to the previous patch, clear shadow on suspend to avoid timeouts
> waiting for ringbuffer space.
> 
> Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")
> Signed-off-by: Rob Clark <robdclark@chromium.org>

Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index b0005ccd81c6..8fa5c917d017 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -1206,7 +1206,9 @@ static int a5xx_pm_resume(struct msm_gpu *gpu)
>  static int a5xx_pm_suspend(struct msm_gpu *gpu)
>  {
>  	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> +	struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
>  	u32 mask = 0xf;
> +	int i, ret;
>  
>  	/* A510 has 3 XIN ports in VBIF */
>  	if (adreno_is_a510(adreno_gpu))
> @@ -1226,7 +1228,15 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
>  	gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
>  	gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
>  
> -	return msm_gpu_pm_suspend(gpu);
> +	ret = msm_gpu_pm_suspend(gpu);
> +	if (ret)
> +		return ret;
> +
> +	if (a5xx_gpu->has_whereami)
> +		for (i = 0; i < gpu->nr_rings; i++)
> +			a5xx_gpu->shadow[i] = 0;
> +
> +	return 0;
>  }
>  
>  static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
> -- 
> 2.28.0
> 

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
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dri-devel@lists.freedesktop.org
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  reply	other threads:[~2020-11-10 18:46 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-10 18:43 [PATCH 1/2] drm/msm/a6xx: Clear shadow on suspend Rob Clark
2020-11-10 18:43 ` Rob Clark
2020-11-10 18:44 ` [PATCH 2/2] drm/msm/a5xx: " Rob Clark
2020-11-10 18:44   ` Rob Clark
2020-11-10 18:46   ` Jordan Crouse [this message]
2020-11-10 18:46     ` Jordan Crouse
2020-11-10 18:46 ` [PATCH 1/2] drm/msm/a6xx: " Jordan Crouse
2020-11-10 18:46   ` Jordan Crouse
2020-12-29 20:15 ` patchwork-bot+linux-arm-msm

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