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* [PATCH 1/2] drm/amd/pm: add the interface to dump smu metrics table for vangogh
@ 2020-11-11  3:04 Xiaojian Du
  2020-11-11  3:04 ` [PATCH 2/2] drm/amd/pm: update the swSMU headers " Xiaojian Du
  0 siblings, 1 reply; 3+ messages in thread
From: Xiaojian Du @ 2020-11-11  3:04 UTC (permalink / raw)
  To: amd-gfx
  Cc: alexander.deucher, xinmei.huang, ray.huang, Xiaojian Du, evan.quan

This patch is to add the interface to dump smu metrics table for vangogh.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
---
 drivers/gpu/drm/amd/pm/inc/smu_v11_0.h        |  2 +
 .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c    | 12 +++++
 .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c  | 52 +++++++++++++++++++
 3 files changed, 66 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
index dc06459af91c..5ad693312187 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
@@ -276,6 +276,8 @@ int smu_v11_0_get_current_pcie_link_speed(struct smu_context *smu);
 
 void smu_v11_0_init_gpu_metrics_v1_0(struct gpu_metrics_v1_0 *gpu_metrics);
 
+void smu_v11_0_init_gpu_metrics_v2_0(struct gpu_metrics_v2_0 *gpu_metrics);
+
 int smu_v11_0_gfx_ulv_control(struct smu_context *smu,
 			      bool enablement);
 
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 6b7d1335b46d..b880c72c322c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1999,6 +1999,18 @@ void smu_v11_0_init_gpu_metrics_v1_0(struct gpu_metrics_v1_0 *gpu_metrics)
 	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
 }
 
+void smu_v11_0_init_gpu_metrics_v2_0(struct gpu_metrics_v2_0 *gpu_metrics)
+{
+	memset(gpu_metrics, 0xFF, sizeof(struct gpu_metrics_v2_0));
+
+	gpu_metrics->common_header.structure_size =
+				sizeof(struct gpu_metrics_v2_0);
+	gpu_metrics->common_header.format_revision = 2;
+	gpu_metrics->common_header.content_revision = 0;
+
+	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
+}
+
 int smu_v11_0_gfx_ulv_control(struct smu_context *smu,
 			      bool enablement)
 {
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 83a1b0a04eb1..cbcbcd8514f0 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -584,6 +584,57 @@ static int vangogh_set_watermarks_table(struct smu_context *smu,
 	return 0;
 }
 
+static ssize_t vangogh_get_gpu_metrics(struct smu_context *smu,
+				      void **table)
+{
+	struct smu_table_context *smu_table = &smu->smu_table;
+	struct gpu_metrics_v2_0 *gpu_metrics =
+		(struct gpu_metrics_v2_0 *)smu_table->gpu_metrics_table;
+	SmuMetrics_t metrics;
+	int ret = 0;
+
+	ret = smu_cmn_get_metrics_table(smu, &metrics, true);
+	if (ret)
+		return ret;
+
+	smu_v11_0_init_gpu_metrics_v2_0(gpu_metrics);
+
+	gpu_metrics->temperature_gfx = metrics.GfxTemperature;
+	gpu_metrics->temperature_soc = metrics.SocTemperature;
+	memcpy(&gpu_metrics->temperature_core[0],
+		&metrics.CoreTemperature[0],
+		sizeof(uint16_t) * 8);
+	gpu_metrics->temperature_l3[0] = metrics.L3Temperature[0];
+	gpu_metrics->temperature_l3[1] = metrics.L3Temperature[1];
+
+	gpu_metrics->average_gfx_activity = metrics.GfxActivity;
+	gpu_metrics->average_mm_activity = metrics.UvdActivity;
+
+	gpu_metrics->average_socket_power = metrics.CurrentSocketPower;
+	gpu_metrics->average_cpu_power = metrics.Power[0];
+	gpu_metrics->average_soc_power = metrics.Power[1];
+	memcpy(&gpu_metrics->average_core_power[0],
+		&metrics.CorePower[0],
+		sizeof(uint16_t) * 8);
+
+	gpu_metrics->average_gfxclk_frequency = metrics.GfxclkFrequency;
+	gpu_metrics->average_socclk_frequency = metrics.SocclkFrequency;
+	gpu_metrics->average_fclk_frequency = metrics.MemclkFrequency;
+	gpu_metrics->average_vclk_frequency = metrics.VclkFrequency;
+
+	memcpy(&gpu_metrics->current_coreclk[0],
+		&metrics.CoreFrequency[0],
+		sizeof(uint16_t) * 8);
+	gpu_metrics->current_l3clk[0] = metrics.L3Frequency[0];
+	gpu_metrics->current_l3clk[1] = metrics.L3Frequency[1];
+
+	gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+
+	*table = (void *)gpu_metrics;
+
+	return sizeof(struct gpu_metrics_v2_0);
+}
+
 static const struct pptable_funcs vangogh_ppt_funcs = {
 
 	.check_fw_status = smu_v11_0_check_fw_status,
@@ -607,6 +658,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
 	.set_driver_table_location = smu_v11_0_set_driver_table_location,
 	.disable_all_features_with_exception = smu_cmn_disable_all_features_with_exception,
 	.interrupt_work = smu_v11_0_interrupt_work,
+	.get_gpu_metrics = vangogh_get_gpu_metrics,
 };
 
 void vangogh_set_ppt_funcs(struct smu_context *smu)
-- 
2.17.1

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^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 2/2] drm/amd/pm: update the swSMU headers for vangogh
  2020-11-11  3:04 [PATCH 1/2] drm/amd/pm: add the interface to dump smu metrics table for vangogh Xiaojian Du
@ 2020-11-11  3:04 ` Xiaojian Du
  2020-11-11 16:19   ` Deucher, Alexander
  0 siblings, 1 reply; 3+ messages in thread
From: Xiaojian Du @ 2020-11-11  3:04 UTC (permalink / raw)
  To: amd-gfx
  Cc: alexander.deucher, xinmei.huang, ray.huang, Xiaojian Du, evan.quan

This patch is to update the swSMU headers for vangogh.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
---
 drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h |  6 ++++++
 drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h          | 11 +++++++----
 drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h         | 11 +++++++++--
 3 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h b/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h
index 8f438c80132e..1c19eae93ff1 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h
@@ -142,6 +142,12 @@ typedef struct {
 
   uint8_t NumDfPstatesEnabled;
   uint8_t NumDpmLevelsEnabled;
+  uint8_t NumDcfclkLevelsEnabled;
+  uint8_t NumDispClkLevelsEnabled;  //applies to both dispclk and dppclk
+  uint8_t NumSocClkLevelsEnabled;
+
+  uint8_t IspClkLevelsEnabled;  //applies to both ispiclk and ispxclk
+  uint8_t VcnClkLevelsEnabled;  //applies to both vclk/dclk
   uint8_t spare[2];
 } DpmClocks_t;
 
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h
index 99a406984135..22edd88b8117 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h
@@ -90,14 +90,16 @@
 #define FEATURE_ATHUB_PG_BIT          56
 #define FEATURE_ECO_DEEPCSTATE_BIT    57
 #define FEATURE_CC6_BIT               58
-#define NUM_FEATURES                  59
+#define FEATURE_GFX_EDC_BIT           59
+#define NUM_FEATURES                  60
 
 typedef struct {
   // MP1_EXT_SCRATCH0
   uint32_t DpmHandlerID         : 8;
   uint32_t ActivityMonitorID    : 8;
   uint32_t DpmTimerID           : 8;
-  uint32_t spare0               : 8;
+  uint32_t DpmHubID             : 4;
+  uint32_t DpmHubTask           : 4;
   // MP1_EXT_SCRATCH1
   uint32_t GfxStatus            : 2;
   uint32_t GfxoffStatus         : 8;
@@ -109,9 +111,10 @@ typedef struct {
   uint32_t spare1               : 16;
   // MP1_EXT_SCRATCH2
   uint32_t P2JobHandler			: 32;
-  // MP1_EXT_SCRATCH3
-//  uint32_t spare2               : 32;
+  // MP1_EXT_SCRATCH3: used for postcodes
+
   // MP1_EXT_SCRATCH4:6 are used by Kernel
+  // MP1_EXT_SCRATCH7: used by HW
 } FwStatus_t;
 
 
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
index 1ada0eb64663..7e69b3bd311b 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
@@ -97,9 +97,16 @@
 #define PPSMC_MSG_StopDramLogging                      0x3F
 #define PPSMC_MSG_SetSoftMinCclk                       0x40
 #define PPSMC_MSG_SetSoftMaxCclk                       0x41
-#define PPSMC_Message_Count                            0x42
+#define PPSMC_MSG_SetDfPstateActiveLevel               0x42
+#define PPSMC_MSG_SetDfPstateSoftMinLevel              0x43
+#define PPSMC_MSG_SetCclkPolicy                        0x44
+#define PPSMC_MSG_DramLogSetDramAddrHigh               0x45
+#define PPSMC_MSG_DramLogSetDramBufferSize             0x46
+#define PPSMC_MSG_RequestActiveWgp                     0x47
+#define PPSMC_MSG_QueryActiveWgp                       0x48
+#define PPSMC_Message_Count                            0x49
 
-//Argument for  PPSMC_MSG_GpuChangeState
+//Argument for PPSMC_MSG_GfxDeviceDriverReset
 enum {
   MODE1_RESET = 1,
   MODE2_RESET = 2
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH 2/2] drm/amd/pm: update the swSMU headers for vangogh
  2020-11-11  3:04 ` [PATCH 2/2] drm/amd/pm: update the swSMU headers " Xiaojian Du
@ 2020-11-11 16:19   ` Deucher, Alexander
  0 siblings, 0 replies; 3+ messages in thread
From: Deucher, Alexander @ 2020-11-11 16:19 UTC (permalink / raw)
  To: Du, Xiaojian, amd-gfx; +Cc: Huang, Shimmer, Huang, Ray, Quan, Evan


[-- Attachment #1.1: Type: text/plain, Size: 4205 bytes --]

[AMD Official Use Only - Internal Distribution Only]

Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: Du, Xiaojian <Xiaojian.Du@amd.com>
Sent: Tuesday, November 10, 2020 10:04 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Huang, Ray <Ray.Huang@amd.com>; Huang, Shimmer <Xinmei.Huang@amd.com>; Quan, Evan <Evan.Quan@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Du, Xiaojian <Xiaojian.Du@amd.com>
Subject: [PATCH 2/2] drm/amd/pm: update the swSMU headers for vangogh

This patch is to update the swSMU headers for vangogh.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
---
 drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h |  6 ++++++
 drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h          | 11 +++++++----
 drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h         | 11 +++++++++--
 3 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h b/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h
index 8f438c80132e..1c19eae93ff1 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_vangogh.h
@@ -142,6 +142,12 @@ typedef struct {

   uint8_t NumDfPstatesEnabled;
   uint8_t NumDpmLevelsEnabled;
+  uint8_t NumDcfclkLevelsEnabled;
+  uint8_t NumDispClkLevelsEnabled;  //applies to both dispclk and dppclk
+  uint8_t NumSocClkLevelsEnabled;
+
+  uint8_t IspClkLevelsEnabled;  //applies to both ispiclk and ispxclk
+  uint8_t VcnClkLevelsEnabled;  //applies to both vclk/dclk
   uint8_t spare[2];
 } DpmClocks_t;

diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h
index 99a406984135..22edd88b8117 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_pmfw.h
@@ -90,14 +90,16 @@
 #define FEATURE_ATHUB_PG_BIT          56
 #define FEATURE_ECO_DEEPCSTATE_BIT    57
 #define FEATURE_CC6_BIT               58
-#define NUM_FEATURES                  59
+#define FEATURE_GFX_EDC_BIT           59
+#define NUM_FEATURES                  60

 typedef struct {
   // MP1_EXT_SCRATCH0
   uint32_t DpmHandlerID         : 8;
   uint32_t ActivityMonitorID    : 8;
   uint32_t DpmTimerID           : 8;
-  uint32_t spare0               : 8;
+  uint32_t DpmHubID             : 4;
+  uint32_t DpmHubTask           : 4;
   // MP1_EXT_SCRATCH1
   uint32_t GfxStatus            : 2;
   uint32_t GfxoffStatus         : 8;
@@ -109,9 +111,10 @@ typedef struct {
   uint32_t spare1               : 16;
   // MP1_EXT_SCRATCH2
   uint32_t P2JobHandler                        : 32;
-  // MP1_EXT_SCRATCH3
-//  uint32_t spare2               : 32;
+  // MP1_EXT_SCRATCH3: used for postcodes
+
   // MP1_EXT_SCRATCH4:6 are used by Kernel
+  // MP1_EXT_SCRATCH7: used by HW
 } FwStatus_t;


diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
index 1ada0eb64663..7e69b3bd311b 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h
@@ -97,9 +97,16 @@
 #define PPSMC_MSG_StopDramLogging                      0x3F
 #define PPSMC_MSG_SetSoftMinCclk                       0x40
 #define PPSMC_MSG_SetSoftMaxCclk                       0x41
-#define PPSMC_Message_Count                            0x42
+#define PPSMC_MSG_SetDfPstateActiveLevel               0x42
+#define PPSMC_MSG_SetDfPstateSoftMinLevel              0x43
+#define PPSMC_MSG_SetCclkPolicy                        0x44
+#define PPSMC_MSG_DramLogSetDramAddrHigh               0x45
+#define PPSMC_MSG_DramLogSetDramBufferSize             0x46
+#define PPSMC_MSG_RequestActiveWgp                     0x47
+#define PPSMC_MSG_QueryActiveWgp                       0x48
+#define PPSMC_Message_Count                            0x49

-//Argument for  PPSMC_MSG_GpuChangeState
+//Argument for PPSMC_MSG_GfxDeviceDriverReset
 enum {
   MODE1_RESET = 1,
   MODE2_RESET = 2
--
2.17.1


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_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-11-11 16:19 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-11  3:04 [PATCH 1/2] drm/amd/pm: add the interface to dump smu metrics table for vangogh Xiaojian Du
2020-11-11  3:04 ` [PATCH 2/2] drm/amd/pm: update the swSMU headers " Xiaojian Du
2020-11-11 16:19   ` Deucher, Alexander

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