* [intel-linux-intel-lts:5.4/yocto 8/24] drivers/gpu/drm/i915/intel_pm.c:4523:1: warning: no previous prototype for 'skl_wm_method1'
@ 2020-11-11 15:09 kernel test robot
0 siblings, 0 replies; 2+ messages in thread
From: kernel test robot @ 2020-11-11 15:09 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 7313 bytes --]
tree: https://github.com/intel/linux-intel-lts.git 5.4/yocto
head: 8bbfe55bfdb2905c35914605bc1b4a4404d86649
commit: 2521b097a48688b899e3db9cb855aa1ec59b02e8 [8/24] drm/i915/gvt: Rebase IDV 2.1 direct display to 5.4.x.
config: i386-randconfig-r036-20201111 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/intel/linux-intel-lts/commit/2521b097a48688b899e3db9cb855aa1ec59b02e8
git remote add intel-linux-intel-lts https://github.com/intel/linux-intel-lts.git
git fetch --no-tags intel-linux-intel-lts 5.4/yocto
git checkout 2521b097a48688b899e3db9cb855aa1ec59b02e8
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/intel_pm.c:4523:1: warning: no previous prototype for 'skl_wm_method1' [-Wmissing-prototypes]
4523 | skl_wm_method1(const struct drm_i915_private *dev_priv, u32 pixel_rate,
| ^~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/intel_pm.c:4542:1: warning: no previous prototype for 'skl_wm_method2' [-Wmissing-prototypes]
4542 | skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency,
| ^~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/intel_pm.c:4559:1: warning: no previous prototype for 'intel_get_linetime_us' [-Wmissing-prototypes]
4559 | intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
| ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/intel_pm.c:4886:6: warning: no previous prototype for 'skl_compute_transition_wm' [-Wmissing-prototypes]
4886 | void skl_compute_transition_wm(const struct intel_crtc_state *crtc_state,
| ^~~~~~~~~~~~~~~~~~~~~~~~~
vim +/skl_wm_method1 +4523 drivers/gpu/drm/i915/intel_pm.c
b9cec07585cf1f5 Damien Lespiau 2014-11-04 4515
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4516 /*
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4517 * The max latency should be 257 (max the punit can code is 255 and we add 2us
ac484963f979b6a Ville Syrjälä 2016-01-20 4518 * for the read latency) and cpp should always be <= 8, so that
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4519 * should allow pixel_rate up to ~2 GHz which seems sufficient since max
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4520 * 2xcdclk is 1350 MHz and the pixel rate should never exceed that.
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4521 */
2521b097a48688b Colin Xu 2020-04-14 4522 uint_fixed_16_16_t
5ce9a6497914b21 Jani Nikula 2019-01-18 @4523 skl_wm_method1(const struct drm_i915_private *dev_priv, u32 pixel_rate,
5ce9a6497914b21 Jani Nikula 2019-01-18 4524 u8 cpp, u32 latency, u32 dbuf_block_size)
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4525 {
5ce9a6497914b21 Jani Nikula 2019-01-18 4526 u32 wm_intermediate_val;
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4527 uint_fixed_16_16_t ret;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4528
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4529 if (latency == 0)
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4530 return FP_16_16_MAX;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4531
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4532 wm_intermediate_val = latency * pixel_rate * cpp;
df8ee19087d24ca Mahesh Kumar 2018-01-30 4533 ret = div_fixed16(wm_intermediate_val, 1000 * dbuf_block_size);
6c64dd378aca528 Paulo Zanoni 2017-08-11 4534
6c64dd378aca528 Paulo Zanoni 2017-08-11 4535 if (INTEL_GEN(dev_priv) >= 10)
6c64dd378aca528 Paulo Zanoni 2017-08-11 4536 ret = add_fixed16_u32(ret, 1);
6c64dd378aca528 Paulo Zanoni 2017-08-11 4537
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4538 return ret;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4539 }
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4540
2521b097a48688b Colin Xu 2020-04-14 4541 uint_fixed_16_16_t
5ce9a6497914b21 Jani Nikula 2019-01-18 @4542 skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency,
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4543 uint_fixed_16_16_t plane_blocks_per_line)
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4544 {
5ce9a6497914b21 Jani Nikula 2019-01-18 4545 u32 wm_intermediate_val;
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4546 uint_fixed_16_16_t ret;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4547
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4548 if (latency == 0)
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4549 return FP_16_16_MAX;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4550
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4551 wm_intermediate_val = latency * pixel_rate;
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4552 wm_intermediate_val = DIV_ROUND_UP(wm_intermediate_val,
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4553 pipe_htotal * 1000);
eac2cb81fb87223 Kumar, Mahesh 2017-07-05 4554 ret = mul_u32_fixed16(wm_intermediate_val, plane_blocks_per_line);
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4555 return ret;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4556 }
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4557
2521b097a48688b Colin Xu 2020-04-14 4558 uint_fixed_16_16_t
ec193640819e014 Maarten Lankhorst 2019-06-28 @4559 intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4560 {
5ce9a6497914b21 Jani Nikula 2019-01-18 4561 u32 pixel_rate;
5ce9a6497914b21 Jani Nikula 2019-01-18 4562 u32 crtc_htotal;
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4563 uint_fixed_16_16_t linetime_us;
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4564
3dd5d78f700217d Maarten Lankhorst 2019-10-31 4565 if (!crtc_state->hw.active)
eac2cb81fb87223 Kumar, Mahesh 2017-07-05 4566 return u32_to_fixed16(0);
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4567
ec193640819e014 Maarten Lankhorst 2019-06-28 4568 pixel_rate = crtc_state->pixel_rate;
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4569
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4570 if (WARN_ON(pixel_rate == 0))
eac2cb81fb87223 Kumar, Mahesh 2017-07-05 4571 return u32_to_fixed16(0);
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4572
3dd5d78f700217d Maarten Lankhorst 2019-10-31 4573 crtc_htotal = crtc_state->hw.adjusted_mode.crtc_htotal;
eac2cb81fb87223 Kumar, Mahesh 2017-07-05 4574 linetime_us = div_fixed16(crtc_htotal * 1000, pixel_rate);
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4575
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4576 return linetime_us;
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4577 }
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4578
:::::: The code at line 4523 was first introduced by commit
:::::: 5ce9a6497914b21ca995ebbc0322b287b28176e8 drm/i915/pm: switch to kernel types
:::::: TO: Jani Nikula <jani.nikula@intel.com>
:::::: CC: Jani Nikula <jani.nikula@intel.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 34076 bytes --]
^ permalink raw reply [flat|nested] 2+ messages in thread
* [intel-linux-intel-lts:5.4/yocto 8/24] drivers/gpu/drm/i915/intel_pm.c:4523:1: warning: no previous prototype for 'skl_wm_method1'
@ 2020-11-11 15:16 kernel test robot
0 siblings, 0 replies; 2+ messages in thread
From: kernel test robot @ 2020-11-11 15:16 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 7313 bytes --]
tree: https://github.com/intel/linux-intel-lts.git 5.4/yocto
head: 8bbfe55bfdb2905c35914605bc1b4a4404d86649
commit: 2521b097a48688b899e3db9cb855aa1ec59b02e8 [8/24] drm/i915/gvt: Rebase IDV 2.1 direct display to 5.4.x.
config: i386-randconfig-r036-20201111 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/intel/linux-intel-lts/commit/2521b097a48688b899e3db9cb855aa1ec59b02e8
git remote add intel-linux-intel-lts https://github.com/intel/linux-intel-lts.git
git fetch --no-tags intel-linux-intel-lts 5.4/yocto
git checkout 2521b097a48688b899e3db9cb855aa1ec59b02e8
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/intel_pm.c:4523:1: warning: no previous prototype for 'skl_wm_method1' [-Wmissing-prototypes]
4523 | skl_wm_method1(const struct drm_i915_private *dev_priv, u32 pixel_rate,
| ^~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/intel_pm.c:4542:1: warning: no previous prototype for 'skl_wm_method2' [-Wmissing-prototypes]
4542 | skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency,
| ^~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/intel_pm.c:4559:1: warning: no previous prototype for 'intel_get_linetime_us' [-Wmissing-prototypes]
4559 | intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
| ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/intel_pm.c:4886:6: warning: no previous prototype for 'skl_compute_transition_wm' [-Wmissing-prototypes]
4886 | void skl_compute_transition_wm(const struct intel_crtc_state *crtc_state,
| ^~~~~~~~~~~~~~~~~~~~~~~~~
vim +/skl_wm_method1 +4523 drivers/gpu/drm/i915/intel_pm.c
b9cec07585cf1f5 Damien Lespiau 2014-11-04 4515
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4516 /*
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4517 * The max latency should be 257 (max the punit can code is 255 and we add 2us
ac484963f979b6a Ville Syrjälä 2016-01-20 4518 * for the read latency) and cpp should always be <= 8, so that
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4519 * should allow pixel_rate up to ~2 GHz which seems sufficient since max
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4520 * 2xcdclk is 1350 MHz and the pixel rate should never exceed that.
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4521 */
2521b097a48688b Colin Xu 2020-04-14 4522 uint_fixed_16_16_t
5ce9a6497914b21 Jani Nikula 2019-01-18 @4523 skl_wm_method1(const struct drm_i915_private *dev_priv, u32 pixel_rate,
5ce9a6497914b21 Jani Nikula 2019-01-18 4524 u8 cpp, u32 latency, u32 dbuf_block_size)
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4525 {
5ce9a6497914b21 Jani Nikula 2019-01-18 4526 u32 wm_intermediate_val;
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4527 uint_fixed_16_16_t ret;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4528
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4529 if (latency == 0)
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4530 return FP_16_16_MAX;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4531
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4532 wm_intermediate_val = latency * pixel_rate * cpp;
df8ee19087d24ca Mahesh Kumar 2018-01-30 4533 ret = div_fixed16(wm_intermediate_val, 1000 * dbuf_block_size);
6c64dd378aca528 Paulo Zanoni 2017-08-11 4534
6c64dd378aca528 Paulo Zanoni 2017-08-11 4535 if (INTEL_GEN(dev_priv) >= 10)
6c64dd378aca528 Paulo Zanoni 2017-08-11 4536 ret = add_fixed16_u32(ret, 1);
6c64dd378aca528 Paulo Zanoni 2017-08-11 4537
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4538 return ret;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4539 }
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4540
2521b097a48688b Colin Xu 2020-04-14 4541 uint_fixed_16_16_t
5ce9a6497914b21 Jani Nikula 2019-01-18 @4542 skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency,
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4543 uint_fixed_16_16_t plane_blocks_per_line)
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4544 {
5ce9a6497914b21 Jani Nikula 2019-01-18 4545 u32 wm_intermediate_val;
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4546 uint_fixed_16_16_t ret;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4547
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4548 if (latency == 0)
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4549 return FP_16_16_MAX;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4550
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4551 wm_intermediate_val = latency * pixel_rate;
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4552 wm_intermediate_val = DIV_ROUND_UP(wm_intermediate_val,
b95320bdf2d8910 Mahesh Kumar 2016-12-01 4553 pipe_htotal * 1000);
eac2cb81fb87223 Kumar, Mahesh 2017-07-05 4554 ret = mul_u32_fixed16(wm_intermediate_val, plane_blocks_per_line);
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4555 return ret;
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4556 }
2d41c0b59afcdd8 Pradeep Bhat 2014-11-04 4557
2521b097a48688b Colin Xu 2020-04-14 4558 uint_fixed_16_16_t
ec193640819e014 Maarten Lankhorst 2019-06-28 @4559 intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4560 {
5ce9a6497914b21 Jani Nikula 2019-01-18 4561 u32 pixel_rate;
5ce9a6497914b21 Jani Nikula 2019-01-18 4562 u32 crtc_htotal;
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4563 uint_fixed_16_16_t linetime_us;
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4564
3dd5d78f700217d Maarten Lankhorst 2019-10-31 4565 if (!crtc_state->hw.active)
eac2cb81fb87223 Kumar, Mahesh 2017-07-05 4566 return u32_to_fixed16(0);
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4567
ec193640819e014 Maarten Lankhorst 2019-06-28 4568 pixel_rate = crtc_state->pixel_rate;
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4569
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4570 if (WARN_ON(pixel_rate == 0))
eac2cb81fb87223 Kumar, Mahesh 2017-07-05 4571 return u32_to_fixed16(0);
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4572
3dd5d78f700217d Maarten Lankhorst 2019-10-31 4573 crtc_htotal = crtc_state->hw.adjusted_mode.crtc_htotal;
eac2cb81fb87223 Kumar, Mahesh 2017-07-05 4574 linetime_us = div_fixed16(crtc_htotal * 1000, pixel_rate);
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4575
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4576 return linetime_us;
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4577 }
d555cb5827d6032 Kumar, Mahesh 2017-05-17 4578
:::::: The code at line 4523 was first introduced by commit
:::::: 5ce9a6497914b21ca995ebbc0322b287b28176e8 drm/i915/pm: switch to kernel types
:::::: TO: Jani Nikula <jani.nikula@intel.com>
:::::: CC: Jani Nikula <jani.nikula@intel.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 34076 bytes --]
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2020-11-11 15:16 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
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2020-11-11 15:09 [intel-linux-intel-lts:5.4/yocto 8/24] drivers/gpu/drm/i915/intel_pm.c:4523:1: warning: no previous prototype for 'skl_wm_method1' kernel test robot
2020-11-11 15:16 kernel test robot
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