From: Atish Patra <atish.patra@wdc.com> To: linux-kernel@vger.kernel.org Cc: Atish Patra <atish.patra@wdc.com>, Albert Ou <aou@eecs.berkeley.edu>, Alistair Francis <alistair.francis@wdc.com>, Anup Patel <anup.patel@wdc.com>, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Rob Herring <robh+dt@kernel.org>, Daire McNamara <daire.mcnamara@microchip.com>, Cyril.Jean@microchip.com, Ivan.Griffin@microchip.com, Conor.Dooley@microchip.com Subject: [RFC PATCH v2 0/4] Add Microchip PolarFire Soc Support Date: Fri, 13 Nov 2020 12:25:46 -0800 [thread overview] Message-ID: <20201113202550.3693323-1-atish.patra@wdc.com> (raw) This series adds minimal support for Microchip Polar Fire Soc Icicle kit. It is rebased on v5.10-rc3 and depends on clock support. Only MMC and ethernet drivers are enabled via this series. The idea here is to add the foundational patches so that other drivers can be added to on top of this. The device tree may change based on feedback on bindings of individual driver support patches. This series has been tested on Qemu and Polar Fire Soc Icicle kit. The following qemu series is necessary to test it on Qemu. The series can also be found at. https://github.com/atishp04/linux/tree/polarfire_support_upstream_v2 I noticed the latest version of mmc driver[2] hangs on the board with the latest clock driver. That's why, I have tested with the old clock driver available in the above github repo. [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html [2] https://www.spinics.net/lists/devicetree/msg383626.html @Cyril: I have added you as the maintainer for this board as I am not sure who else from Microchip should be the added to the maintainer list. Please let me know and I can add the entry to the MAINTAINERS file in next version. Changes from v1->v2: 1. Modified the DT to match the device tree in U-Boot. 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled as it allows larger storage option for linux distros. Atish Patra (4): RISC-V: Add Microchip PolarFire SoC kconfig option dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC RISC-V: Initial DTS for Microchip ICICLE board RISC-V: Enable Microchip PolarFire ICICLE SoC .../devicetree/bindings/riscv/microchip.yaml | 27 ++ arch/riscv/Kconfig.socs | 7 + arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/microchip/Makefile | 2 + .../microchip/microchip-mpfs-icicle-kit.dts | 54 +++ .../boot/dts/microchip/microchip-mpfs.dtsi | 342 ++++++++++++++++++ arch/riscv/configs/defconfig | 4 + 7 files changed, 437 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml create mode 100644 arch/riscv/boot/dts/microchip/Makefile create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atish.patra@wdc.com> To: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>, Cyril.Jean@microchip.com, Daire McNamara <daire.mcnamara@microchip.com>, Anup Patel <anup.patel@wdc.com>, Conor.Dooley@microchip.com, Atish Patra <atish.patra@wdc.com>, Ivan.Griffin@microchip.com, Rob Herring <robh+dt@kernel.org>, Alistair Francis <alistair.francis@wdc.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, linux-riscv@lists.infradead.org Subject: [RFC PATCH v2 0/4] Add Microchip PolarFire Soc Support Date: Fri, 13 Nov 2020 12:25:46 -0800 [thread overview] Message-ID: <20201113202550.3693323-1-atish.patra@wdc.com> (raw) This series adds minimal support for Microchip Polar Fire Soc Icicle kit. It is rebased on v5.10-rc3 and depends on clock support. Only MMC and ethernet drivers are enabled via this series. The idea here is to add the foundational patches so that other drivers can be added to on top of this. The device tree may change based on feedback on bindings of individual driver support patches. This series has been tested on Qemu and Polar Fire Soc Icicle kit. The following qemu series is necessary to test it on Qemu. The series can also be found at. https://github.com/atishp04/linux/tree/polarfire_support_upstream_v2 I noticed the latest version of mmc driver[2] hangs on the board with the latest clock driver. That's why, I have tested with the old clock driver available in the above github repo. [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html [2] https://www.spinics.net/lists/devicetree/msg383626.html @Cyril: I have added you as the maintainer for this board as I am not sure who else from Microchip should be the added to the maintainer list. Please let me know and I can add the entry to the MAINTAINERS file in next version. Changes from v1->v2: 1. Modified the DT to match the device tree in U-Boot. 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled as it allows larger storage option for linux distros. Atish Patra (4): RISC-V: Add Microchip PolarFire SoC kconfig option dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC RISC-V: Initial DTS for Microchip ICICLE board RISC-V: Enable Microchip PolarFire ICICLE SoC .../devicetree/bindings/riscv/microchip.yaml | 27 ++ arch/riscv/Kconfig.socs | 7 + arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/microchip/Makefile | 2 + .../microchip/microchip-mpfs-icicle-kit.dts | 54 +++ .../boot/dts/microchip/microchip-mpfs.dtsi | 342 ++++++++++++++++++ arch/riscv/configs/defconfig | 4 + 7 files changed, 437 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml create mode 100644 arch/riscv/boot/dts/microchip/Makefile create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2020-11-13 20:26 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-13 20:25 Atish Patra [this message] 2020-11-13 20:25 ` [RFC PATCH v2 0/4] Add Microchip PolarFire Soc Support Atish Patra 2020-11-13 20:25 ` [RFC PATCH v2 1/4] RISC-V: Add Microchip PolarFire SoC kconfig option Atish Patra 2020-11-13 20:25 ` Atish Patra 2020-11-13 20:25 ` [RFC PATCH v2 2/4] dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC Atish Patra 2020-11-13 20:25 ` Atish Patra 2020-11-16 15:01 ` Rob Herring 2020-11-16 15:01 ` Rob Herring 2020-11-16 16:08 ` Atish Patra 2020-11-16 16:08 ` Atish Patra 2020-11-13 20:25 ` [RFC PATCH v2 3/4] RISC-V: Initial DTS for Microchip ICICLE board Atish Patra 2020-11-13 20:25 ` Atish Patra 2020-11-17 2:14 ` Bin Meng 2020-11-17 2:14 ` Bin Meng 2020-11-17 6:07 ` Atish Patra 2020-11-17 6:07 ` Atish Patra 2020-11-21 8:52 ` Anup Patel 2020-11-21 8:52 ` Anup Patel [not found] ` <DM6PR11MB4267B9C027125D8EE8B114E196F30@DM6PR11MB4267.namprd11.prod.outlook.com> 2020-12-02 18:49 ` Atish Patra 2020-12-02 18:49 ` Atish Patra 2020-11-13 20:25 ` [RFC PATCH v2 4/4] RISC-V: Enable Microchip PolarFire ICICLE SoC Atish Patra 2020-11-13 20:25 ` Atish Patra
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