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From: "Ramuthevar,Vadivel MuruganX"  <vadivel.muruganx.ramuthevar@linux.intel.com>
To: broonie@kernel.org, linux-kernel@vger.kernel.org,
	linux-spi@vger.kernel.org
Cc: linux-mtd@lists.infradead.org, vigneshr@ti.com, p.yadav@ti.com,
	devicetree@vger.kernel.org, robh+dt@kernel.org,
	cheol.yong.kim@intel.com, qi-ming.wu@intel.com,
	Ramuthevar Vadivel Murugan 
	<vadivel.muruganx.ramuthevar@linux.intel.com>
Subject: [PATCH v7 2/6] spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
Date: Mon, 16 Nov 2020 11:09:59 +0800	[thread overview]
Message-ID: <20201116031003.19062-3-vadivel.muruganx.ramuthevar@linux.intel.com> (raw)
In-Reply-To: <20201116031003.19062-1-vadivel.muruganx.ramuthevar@linux.intel.com>

From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
Direct Access Controller(DAC).

This patch adds a quirk to disable the Direct Access Controller
for data transfer instead it uses indirect data transfe

DAC bit resets to 1 so there is no need to explicitly set it.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
 drivers/spi/spi-cadence-quadspi.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index d7b10c46fa70..d12b765e87be 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1101,10 +1101,12 @@ static void cqspi_controller_init(struct cqspi_st *cqspi)
 	writel(cqspi->fifo_depth * cqspi->fifo_width / 8,
 	       cqspi->iobase + CQSPI_REG_INDIRECTWRWATERMARK);
 
-	/* Enable Direct Access Controller */
-	reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
-	reg |= CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL;
-	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
+	/* Disable direct access controller */
+	if (!cqspi->use_direct_mode) {
+		reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
+		reg &= ~CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL;
+		writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
+	}
 
 	cqspi_controller_enable(cqspi, 1);
 }
@@ -1388,6 +1390,10 @@ static const struct cqspi_driver_platdata am654_ospi = {
 	.quirks = CQSPI_NEEDS_WR_DELAY,
 };
 
+static const struct cqspi_driver_platdata intel_lgm_qspi = {
+	.quirks = CQSPI_DISABLE_DAC_MODE,
+};
+
 static const struct of_device_id cqspi_dt_ids[] = {
 	{
 		.compatible = "cdns,qspi-nor",
@@ -1403,6 +1409,7 @@ static const struct of_device_id cqspi_dt_ids[] = {
 	},
 	{
 		.compatible = "intel,lgm-qspi",
+		.data = &intel_lgm_qspi,
 	},
 	{ /* end of table */ }
 };
-- 
2.11.0


WARNING: multiple messages have this Message-ID (diff)
From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: broonie@kernel.org, linux-kernel@vger.kernel.org,
	linux-spi@vger.kernel.org
Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org,
	vigneshr@ti.com,
	Ramuthevar Vadivel Murugan
	<vadivel.muruganx.ramuthevar@linux.intel.com>,
	robh+dt@kernel.org, linux-mtd@lists.infradead.org,
	qi-ming.wu@intel.com, p.yadav@ti.com
Subject: [PATCH v7 2/6] spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
Date: Mon, 16 Nov 2020 11:09:59 +0800	[thread overview]
Message-ID: <20201116031003.19062-3-vadivel.muruganx.ramuthevar@linux.intel.com> (raw)
In-Reply-To: <20201116031003.19062-1-vadivel.muruganx.ramuthevar@linux.intel.com>

From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
Direct Access Controller(DAC).

This patch adds a quirk to disable the Direct Access Controller
for data transfer instead it uses indirect data transfe

DAC bit resets to 1 so there is no need to explicitly set it.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
 drivers/spi/spi-cadence-quadspi.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index d7b10c46fa70..d12b765e87be 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1101,10 +1101,12 @@ static void cqspi_controller_init(struct cqspi_st *cqspi)
 	writel(cqspi->fifo_depth * cqspi->fifo_width / 8,
 	       cqspi->iobase + CQSPI_REG_INDIRECTWRWATERMARK);
 
-	/* Enable Direct Access Controller */
-	reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
-	reg |= CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL;
-	writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
+	/* Disable direct access controller */
+	if (!cqspi->use_direct_mode) {
+		reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
+		reg &= ~CQSPI_REG_CONFIG_ENB_DIR_ACC_CTRL;
+		writel(reg, cqspi->iobase + CQSPI_REG_CONFIG);
+	}
 
 	cqspi_controller_enable(cqspi, 1);
 }
@@ -1388,6 +1390,10 @@ static const struct cqspi_driver_platdata am654_ospi = {
 	.quirks = CQSPI_NEEDS_WR_DELAY,
 };
 
+static const struct cqspi_driver_platdata intel_lgm_qspi = {
+	.quirks = CQSPI_DISABLE_DAC_MODE,
+};
+
 static const struct of_device_id cqspi_dt_ids[] = {
 	{
 		.compatible = "cdns,qspi-nor",
@@ -1403,6 +1409,7 @@ static const struct of_device_id cqspi_dt_ids[] = {
 	},
 	{
 		.compatible = "intel,lgm-qspi",
+		.data = &intel_lgm_qspi,
 	},
 	{ /* end of table */ }
 };
-- 
2.11.0


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http://lists.infradead.org/mailman/listinfo/linux-mtd/

  parent reply	other threads:[~2020-11-16  3:10 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-16  3:09 [PATCH v7 0/6] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-11-16  3:09 ` Ramuthevar, Vadivel MuruganX
2020-11-16  3:09 ` [PATCH v7 1/6] spi: cadence-quadspi: Add QSPI " Ramuthevar,Vadivel MuruganX
2020-11-16  3:09   ` Ramuthevar, Vadivel MuruganX
2020-11-16  3:09 ` Ramuthevar,Vadivel MuruganX [this message]
2020-11-16  3:09   ` [PATCH v7 2/6] spi: cadence-quadspi: Disable the DAC " Ramuthevar, Vadivel MuruganX
2020-11-16  3:10 ` [PATCH v7 3/6] spi: cadence-quadspi: Add multi-chipselect support " Ramuthevar,Vadivel MuruganX
2020-11-16  3:10   ` Ramuthevar, Vadivel MuruganX
2020-11-16  3:10 ` [PATCH v7 4/6] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi Ramuthevar,Vadivel MuruganX
2020-11-16  3:10   ` Ramuthevar, Vadivel MuruganX
2020-11-16  3:10 ` [PATCH v7 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml Ramuthevar,Vadivel MuruganX
2020-11-16  3:10   ` Ramuthevar, Vadivel MuruganX
2020-11-16 15:59   ` Rob Herring
2020-11-16 15:59     ` Rob Herring
2020-11-16 19:07   ` Mark Brown
2020-11-16 19:07     ` Mark Brown
2020-11-17  2:16     ` Ramuthevar, Vadivel MuruganX
2020-11-17  2:16       ` Ramuthevar, Vadivel MuruganX
2020-11-16  3:10 ` [PATCH v7 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-11-16  3:10   ` Ramuthevar, Vadivel MuruganX

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