* [PATCH 1/2] drm/amd/pm: fix the crash after runtime pm resume
@ 2020-11-20 7:59 Likun Gao
2020-11-20 7:59 ` [PATCH 2/2] drm/amdgpu: add module parameter choose runtime method Likun Gao
0 siblings, 1 reply; 3+ messages in thread
From: Likun Gao @ 2020-11-20 7:59 UTC (permalink / raw)
To: amd-gfx; +Cc: Likun Gao, Kenneth Feng, Hawking Zhang
From: Likun Gao <Likun.Gao@amd.com>
Some features are still disabled after runtime pm resume. This can take
the hardware back.
Unlike other projects, this doesn't need pptable retransfer.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Change-Id: If7c4148380ddb8a08aed06a8ba9afae98075947d
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 8e3e7a5bbffe..17a36a962e31 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -918,11 +918,15 @@ static int smu_smc_hw_setup(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
uint32_t pcie_gen = 0, pcie_width = 0;
- int ret;
+ int ret = 0;
if (adev->in_suspend && smu_is_dpm_running(smu)) {
dev_info(adev->dev, "dpm has been enabled\n");
- return 0;
+ /* this is needed specifically */
+ if ((adev->asic_type >= CHIP_SIENNA_CICHLID) &&
+ (adev->asic_type <= CHIP_DIMGREY_CAVEFISH))
+ ret = smu_system_features_control(smu, true);
+ return ret;
}
ret = smu_init_display_count(smu, 0);
--
2.25.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] drm/amdgpu: add module parameter choose runtime method
2020-11-20 7:59 [PATCH 1/2] drm/amd/pm: fix the crash after runtime pm resume Likun Gao
@ 2020-11-20 7:59 ` Likun Gao
2020-11-20 8:09 ` Feng, Kenneth
0 siblings, 1 reply; 3+ messages in thread
From: Likun Gao @ 2020-11-20 7:59 UTC (permalink / raw)
To: amd-gfx; +Cc: Likun Gao, Kenneth Feng, Hawking Zhang
From: Likun Gao <Likun.Gao@amd.com>
Default runtime logic not changed.
Provide an alternative runtime method. (set 1 to use BACO; 2 to use BAMACO)
When set reset_method to 4, it will use BACO or BAMACO for gpu reset,
according to runtime value.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 38 +++++++++++++++----
2 files changed, 32 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 7f98cf1bef07..b2a1dd7581bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -304,7 +304,7 @@ module_param_named(aspm, amdgpu_aspm, int, 0444);
* Override for runtime power management control for dGPUs in PX/HG laptops. The amdgpu driver can dynamically power down
* the dGPU on PX/HG laptops when it is idle. The default is -1 (auto enable). Setting the value to 0 disables this functionality.
*/
-MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
+MODULE_PARM_DESC(runpm, "PX runtime pm (2 = force enable with BAMACO, 1 = force enable with BACO, 0 = disable, -1 = PX only default)");
module_param_named(runpm, amdgpu_runtime_pm, int, 0444);
/**
@@ -790,7 +790,7 @@ module_param_named(tmz, amdgpu_tmz, int, 0444);
* DOC: reset_method (int)
* GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)
*/
-MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)");
+MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco)");
module_param_named(reset_method, amdgpu_reset_method, int, 0444);
/**
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 7144ea4c0b78..62c34a01a3e1 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1485,6 +1485,9 @@ enum smu_baco_state smu_v11_0_baco_get_state(struct smu_context *smu)
return baco_state;
}
+#define D3HOT_BACO_SEQUENCE 0
+#define D3HOT_BAMACO_SEQUENCE 2
+
int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state)
{
struct smu_baco_context *smu_baco = &smu->smu_baco;
@@ -1499,15 +1502,34 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state)
mutex_lock(&smu_baco->mutex);
if (state == SMU_BACO_STATE_ENTER) {
- if (!ras || !ras->supported) {
- data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
- data |= 0x80000000;
- WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
-
- ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 0, NULL);
- } else {
- ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 1, NULL);
+ switch (adev->asic_type) {
+ case CHIP_SIENNA_CICHLID:
+ case CHIP_NAVY_FLOUNDER:
+ case CHIP_DIMGREY_CAVEFISH:
+ if (amdgpu_runtime_pm == 2)
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_EnterBaco,
+ D3HOT_BAMACO_SEQUENCE,
+ NULL);
+ else
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_EnterBaco,
+ D3HOT_BACO_SEQUENCE,
+ NULL);
+ break;
+ default:
+ if (!ras || !ras->supported) {
+ data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
+ data |= 0x80000000;
+ WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
+
+ ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 0, NULL);
+ } else {
+ ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 1, NULL);
+ }
+ break;
}
+
} else {
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_ExitBaco, NULL);
if (ret)
--
2.25.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* RE: [PATCH 2/2] drm/amdgpu: add module parameter choose runtime method
2020-11-20 7:59 ` [PATCH 2/2] drm/amdgpu: add module parameter choose runtime method Likun Gao
@ 2020-11-20 8:09 ` Feng, Kenneth
0 siblings, 0 replies; 3+ messages in thread
From: Feng, Kenneth @ 2020-11-20 8:09 UTC (permalink / raw)
To: Gao, Likun, amd-gfx; +Cc: Zhang, Hawking
[AMD Official Use Only - Internal Distribution Only]
Series is Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Best Regards
Kenneth
-----Original Message-----
From: Gao, Likun <Likun.Gao@amd.com>
Sent: Friday, November 20, 2020 3:59 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking <Hawking.Zhang@amd.com>; Feng, Kenneth <Kenneth.Feng@amd.com>; Gao, Likun <Likun.Gao@amd.com>
Subject: [PATCH 2/2] drm/amdgpu: add module parameter choose runtime method
From: Likun Gao <Likun.Gao@amd.com>
Default runtime logic not changed.
Provide an alternative runtime method. (set 1 to use BACO; 2 to use BAMACO) When set reset_method to 4, it will use BACO or BAMACO for gpu reset, according to runtime value.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +-
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 38 +++++++++++++++----
2 files changed, 32 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 7f98cf1bef07..b2a1dd7581bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -304,7 +304,7 @@ module_param_named(aspm, amdgpu_aspm, int, 0444);
* Override for runtime power management control for dGPUs in PX/HG laptops. The amdgpu driver can dynamically power down
* the dGPU on PX/HG laptops when it is idle. The default is -1 (auto enable). Setting the value to 0 disables this functionality.
*/
-MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
+MODULE_PARM_DESC(runpm, "PX runtime pm (2 = force enable with BAMACO, 1
+= force enable with BACO, 0 = disable, -1 = PX only default)");
module_param_named(runpm, amdgpu_runtime_pm, int, 0444);
/**
@@ -790,7 +790,7 @@ module_param_named(tmz, amdgpu_tmz, int, 0444);
* DOC: reset_method (int)
* GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)
*/
-MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)");
+MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default),
+0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco)");
module_param_named(reset_method, amdgpu_reset_method, int, 0444);
/**
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 7144ea4c0b78..62c34a01a3e1 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1485,6 +1485,9 @@ enum smu_baco_state smu_v11_0_baco_get_state(struct smu_context *smu)
return baco_state;
}
+#define D3HOT_BACO_SEQUENCE 0
+#define D3HOT_BAMACO_SEQUENCE 2
+
int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state) {
struct smu_baco_context *smu_baco = &smu->smu_baco; @@ -1499,15 +1502,34 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state)
mutex_lock(&smu_baco->mutex);
if (state == SMU_BACO_STATE_ENTER) {
- if (!ras || !ras->supported) {
- data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
- data |= 0x80000000;
- WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
-
- ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 0, NULL);
- } else {
- ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 1, NULL);
+ switch (adev->asic_type) {
+ case CHIP_SIENNA_CICHLID:
+ case CHIP_NAVY_FLOUNDER:
+ case CHIP_DIMGREY_CAVEFISH:
+ if (amdgpu_runtime_pm == 2)
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_EnterBaco,
+ D3HOT_BAMACO_SEQUENCE,
+ NULL);
+ else
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_EnterBaco,
+ D3HOT_BACO_SEQUENCE,
+ NULL);
+ break;
+ default:
+ if (!ras || !ras->supported) {
+ data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
+ data |= 0x80000000;
+ WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);
+
+ ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 0, NULL);
+ } else {
+ ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnterBaco, 1, NULL);
+ }
+ break;
}
+
} else {
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_ExitBaco, NULL);
if (ret)
--
2.25.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-11-20 8:09 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-11-20 7:59 [PATCH 1/2] drm/amd/pm: fix the crash after runtime pm resume Likun Gao
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2020-11-20 8:09 ` Feng, Kenneth
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