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From: "Huang, Sean Z" <sean.z.huang@intel.com>
To: Intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [RFC-v2 03/26] drm/i915/pxp: Add PXP context for logical hardware states.
Date: Fri, 20 Nov 2020 16:35:17 -0800	[thread overview]
Message-ID: <20201121003540.24980-4-sean.z.huang@intel.com> (raw)
In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com>

Add PXP context which represents combined view
of driver and logical HW states.

Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
---
 drivers/gpu/drm/i915/Makefile                |  3 +-
 drivers/gpu/drm/i915/pxp/intel_pxp.c         | 26 ++++++++++-
 drivers/gpu/drm/i915/pxp/intel_pxp.h         |  3 ++
 drivers/gpu/drm/i915/pxp/intel_pxp_context.c | 45 ++++++++++++++++++++
 drivers/gpu/drm/i915/pxp/intel_pxp_context.h | 44 +++++++++++++++++++
 5 files changed, 119 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_context.c
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_context.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 8274fea96009..831e8ad57560 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -256,7 +256,8 @@ i915-y += i915_perf.o
 
 # Protected execution platform (PXP) support
 i915-y += \
-	pxp/intel_pxp.o
+	pxp/intel_pxp.o \
+	pxp/intel_pxp_context.o \
 
 # Post-mortem debug and GPU hang state capture
 i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 6ee0814f0d09..b6c44b196e9a 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -5,6 +5,7 @@
 
 #include "i915_drv.h"
 #include "intel_pxp.h"
+#include "intel_pxp_context.h"
 
 static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask)
 {
@@ -30,12 +31,28 @@ static void intel_pxp_mask_irq(struct intel_gt *gt, u32 mask)
 
 static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915)
 {
+	mutex_lock(&i915->pxp.ctx->ctx_mutex);
+
+	i915->pxp.ctx->global_state_attacked = true;
+	i915->pxp.ctx->flag_display_hm_surface_keys = false;
+
+	mutex_unlock(&i915->pxp.ctx->ctx_mutex);
+
 	return 0;
 }
 
 static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private *i915)
 {
-	return 0;
+	int ret = 0;
+
+	mutex_lock(&i915->pxp.ctx->ctx_mutex);
+
+	if (i915->pxp.ctx->global_state_attacked)
+		i915->pxp.ctx->global_state_attacked = false;
+
+	mutex_unlock(&i915->pxp.ctx->ctx_mutex);
+
+	return ret;
 }
 
 static void intel_pxp_irq_work(struct work_struct *work)
@@ -64,6 +81,12 @@ int intel_pxp_init(struct drm_i915_private *i915)
 {
 	drm_info(&i915->drm, "i915 PXP is inited with i915=[%p]\n", i915);
 
+	i915->pxp.ctx = intel_pxp_create_ctx(i915);
+	if (!i915->pxp.ctx) {
+		drm_err(&i915->drm, "Failed to create pxp ctx\n");
+		return -EFAULT;
+	}
+
 	INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work);
 
 	i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED |
@@ -75,6 +98,7 @@ int intel_pxp_init(struct drm_i915_private *i915)
 
 void intel_pxp_uninit(struct drm_i915_private *i915)
 {
+	intel_pxp_destroy_ctx(i915);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index b17f4153f470..9db4bf6fd3f8 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -12,6 +12,9 @@
 #define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2)
 #define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3)
 
+#define MAX_TYPE0_SESSIONS 16
+#define MAX_TYPE1_SESSIONS 6
+
 enum pxp_sm_session_req {
 	/* Request KMD to allocate session id and move it to IN INIT */
 	PXP_SM_REQ_SESSION_ID_INIT = 0x0,
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.c b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c
new file mode 100644
index 000000000000..c340c375daac
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#include "intel_pxp_context.h"
+
+/**
+ * intel_pxp_create_ctx - To create a new pxp context.
+ * @i915: i915 device handle.
+ *
+ * Return: pointer to new_ctx, NULL for failure
+ */
+struct pxp_context *intel_pxp_create_ctx(struct drm_i915_private *i915)
+{
+	struct pxp_context *new_ctx = NULL;
+
+	new_ctx = kzalloc(sizeof(*new_ctx), GFP_KERNEL);
+	if (!new_ctx)
+		return NULL;
+
+	get_random_bytes(&new_ctx->ctx_id, sizeof(new_ctx->ctx_id));
+
+	new_ctx->global_state_attacked = false;
+
+	mutex_init(&new_ctx->ctx_mutex);
+
+	INIT_LIST_HEAD(&new_ctx->active_pxp_type0_sessions);
+	INIT_LIST_HEAD(&new_ctx->active_pxp_type1_sessions);
+	INIT_LIST_HEAD(&new_ctx->user_ctx_list);
+
+	return new_ctx;
+}
+
+/**
+ * intel_pxp_destroy_ctx - To destroy the pxp context.
+ * @i915: i915 device handle.
+ *
+ * Return: return 0 for success, failure otherwise.
+ */
+void intel_pxp_destroy_ctx(struct drm_i915_private *i915)
+{
+	kfree(i915->pxp.ctx);
+	i915->pxp.ctx = NULL;
+}
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.h b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h
new file mode 100644
index 000000000000..e0794dfb548d
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_CONTEXT_H__
+#define __INTEL_PXP_CONTEXT_H__
+
+#include <linux/list.h>
+#include "i915_drv.h"
+#include "pxp/intel_pxp.h"
+
+/* struct pxp_context - Represents combined view of driver and logical HW states. */
+struct pxp_context {
+	/** @ctx_mutex: mutex to protect the pxp context */
+	struct mutex ctx_mutex;
+
+	struct list_head active_pxp_type0_sessions;
+	struct list_head active_pxp_type1_sessions;
+
+	struct list_head user_ctx_list;
+
+	u32 type0_session_pxp_tag[MAX_TYPE0_SESSIONS];
+	u32 type1_session_pxp_tag[MAX_TYPE1_SESSIONS];
+
+	int ctx_id;
+
+	bool global_state_attacked;
+	bool global_state_in_suspend;
+	bool flag_display_hm_surface_keys;
+};
+
+struct pxp_user_ctx {
+	/** @listhead: linked list infrastructure, do not change its order. */
+	struct list_head listhead;
+
+	/** @user_ctx: user space context id */
+	u32 user_ctx;
+};
+
+struct pxp_context *intel_pxp_create_ctx(struct drm_i915_private *i915);
+void intel_pxp_destroy_ctx(struct drm_i915_private *i915);
+
+#endif /* __INTEL_PXP_CONTEXT_H__ */
-- 
2.17.1

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  parent reply	other threads:[~2020-11-21  0:35 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-21  0:35 [Intel-gfx] [RFC-v2 00/26] Introduce Intel PXP component Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 01/26] drm/i915/pxp: " Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 02/26] drm/i915/pxp: Enable PXP irq worker and callback stub Huang, Sean Z
2020-11-21  0:35 ` Huang, Sean Z [this message]
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 04/26] drm/i915/pxp: set KCR reg init during the boot time Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 05/26] drm/i915/pxp: Implement ioctl action to set the user space context Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 06/26] drm/i915/pxp: Add PXP-related registers into allowlist Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 07/26] drm/i915/pxp: Read register to check hardware session state Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 08/26] drm/i915/pxp: Implement funcs to get/set PXP tag Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 09/26] drm/i915/pxp: Implement ioctl action to reserve session slot Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 10/26] drm/i915/pxp: Implement ioctl action to set session in play Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 11/26] drm/i915/pxp: Func to send hardware session termination Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 12/26] drm/i915/pxp: Implement ioctl action to terminate the session Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 13/26] drm/i915/pxp: Enable ioctl action to query PXP tag Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 14/26] drm/i915/pxp: Destroy all type0 sessions upon teardown Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 15/26] drm/i915/pxp: Termiante the session upon app crash Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 16/26] drm/i915/pxp: Enable PXP power management Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 17/26] drm/i915/pxp: Implement funcs to create the TEE channel Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 18/26] drm/i915/pxp: Implement ioctl action to send TEE commands Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 19/26] drm/i915/pxp: Create the arbitrary session after boot Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 20/26] drm/i915/pxp: Add i915 trace logs for PXP operations Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 21/26] drm/i915/pxp: Expose session state for display protection flip Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 22/26] mei: pxp: export pavp client to me client bus Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 23/26] drm/i915/uapi: introduce drm_i915_gem_create_ext Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 24/26] drm/i915/pxp: User interface for Protected buffer Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 25/26] drm/i915/pxp: Add plane decryption support Huang, Sean Z
2020-11-21  0:35 ` [Intel-gfx] [RFC-v2 26/26] drm/i915/pxp: Enable the PXP ioctl for protected session Huang, Sean Z
2020-11-21  0:55 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Intel PXP component Patchwork
2020-11-21  1:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-11-23 16:20 ` [Intel-gfx] [RFC-v2 00/26] " Jani Nikula

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