* [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
@ 2020-11-25 0:31 Aditya Swarup
2020-11-25 1:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (8 more replies)
0 siblings, 9 replies; 24+ messages in thread
From: Aditya Swarup @ 2020-11-25 0:31 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula, Lucas De Marchi
Fix TGL REVID macros to fetch correct display/gt stepping based
on SOC rev id from INTEL_REVID() macro. Previously, we were just
returning the first element of the revid array instead of using
the correct index based on SOC rev id.
Also, add array bound checks for TGL REV ID array. Since, there
might be a possibility of using older kernels on latest platform
revision, resulting in out of bounds access for rev ID array.
In this scenario, print message for unsupported rev ID and apply
settings for latest rev ID available.
Fixes: ("drm/i915/tgl: Fix stepping WA matching")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 15be8debae54..29d55b7017be 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1572,16 +1572,37 @@ enum {
TGL_REVID_D0,
};
-extern const struct i915_rev_steppings tgl_uy_revids[];
-extern const struct i915_rev_steppings tgl_revids[];
+extern const struct i915_rev_steppings tgl_uy_revids[4];
+extern const struct i915_rev_steppings tgl_revids[2];
+
+#define TGL_UY_REVID_RANGE(revid) \
+ ((revid) < ARRAY_SIZE(tgl_uy_revids))
+
+#define TGL_REVID_RANGE(revid) \
+ ((revid) < ARRAY_SIZE(tgl_revids))
static inline const struct i915_rev_steppings *
tgl_revids_get(struct drm_i915_private *dev_priv)
{
- if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
- return tgl_uy_revids;
- else
- return tgl_revids;
+ const u8 revid = INTEL_REVID(dev_priv);
+
+ if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
+ if (TGL_UY_REVID_RANGE(revid)) {
+ return tgl_uy_revids + revid;
+ } else {
+ drm_dbg_kms(&dev_priv->drm,
+ "Unsupported SOC stepping found %u, using %lu instead\n",
+ revid, ARRAY_SIZE(tgl_uy_revids) - 1);
+ return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
+ }
+ } else if (TGL_REVID_RANGE(revid)) {
+ return tgl_revids + revid;
+ } else {
+ drm_dbg_kms(&dev_priv->drm,
+ "Unsupported SOC stepping found %u, using %lu instead\n",
+ revid, ARRAY_SIZE(tgl_revids) - 1);
+ return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
+ }
}
#define IS_TGL_DISP_REVID(p, since, until) \
@@ -1591,12 +1612,14 @@ tgl_revids_get(struct drm_i915_private *dev_priv)
#define IS_TGL_UY_GT_REVID(p, since, until) \
((IS_TGL_U(p) || IS_TGL_Y(p)) && \
+ TGL_UY_REVID_RANGE(INTEL_REVID(p)) && \
tgl_uy_revids->gt_stepping >= (since) && \
tgl_uy_revids->gt_stepping <= (until))
#define IS_TGL_GT_REVID(p, since, until) \
(IS_TIGERLAKE(p) && \
!(IS_TGL_U(p) || IS_TGL_Y(p)) && \
+ TGL_REVID_RANGE(INTEL_REVID(p)) && \
tgl_revids->gt_stepping >= (since) && \
tgl_revids->gt_stepping <= (until))
--
2.27.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
@ 2020-11-25 1:08 ` Patchwork
2020-11-25 1:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (7 subsequent siblings)
8 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2020-11-25 1:08 UTC (permalink / raw)
To: Aditya Swarup; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
URL : https://patchwork.freedesktop.org/series/84238/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3f30d254dfce drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
-:60: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or return
#60: FILE: drivers/gpu/drm/i915/i915_drv.h:1592:
+ return tgl_uy_revids + revid;
+ } else {
-:68: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or return
#68: FILE: drivers/gpu/drm/i915/i915_drv.h:1600:
+ return tgl_revids + revid;
+ } else {
total: 0 errors, 2 warnings, 0 checks, 57 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
2020-11-25 1:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2020-11-25 1:39 ` Patchwork
2020-11-25 1:39 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
` (6 subsequent siblings)
8 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2020-11-25 1:39 UTC (permalink / raw)
To: Aditya Swarup; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 7681 bytes --]
== Series Details ==
Series: drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
URL : https://patchwork.freedesktop.org/series/84238/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9385 -> Patchwork_18972
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/index.html
New tests
---------
New tests have been introduced between CI_DRM_9385 and Patchwork_18972:
### New CI tests (1) ###
* boot:
- Statuses : 38 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_18972 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +2 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-tgl-y/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_suspend@basic-s0:
- fi-apl-guc: [PASS][3] -> [DMESG-WARN][4] ([i915#1635] / [i915#62]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-apl-guc/igt@gem_exec_suspend@basic-s0.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-apl-guc/igt@gem_exec_suspend@basic-s0.html
* igt@i915_module_load@reload:
- fi-byt-j1900: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-byt-j1900/igt@i915_module_load@reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-byt-j1900/igt@i915_module_load@reload.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: [PASS][7] -> [DMESG-FAIL][8] ([i915#541])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- fi-icl-u2: [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0:
- fi-cfl-8109u: [DMESG-WARN][11] ([i915#262]) -> [PASS][12] +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-cfl-8109u/igt@gem_exec_suspend@basic-s0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-cfl-8109u/igt@gem_exec_suspend@basic-s0.html
* igt@i915_pm_rpm@module-reload:
- fi-byt-j1900: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
* igt@prime_vgem@basic-read:
- fi-tgl-y: [DMESG-WARN][15] ([i915#402]) -> [PASS][16] +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-tgl-y/igt@prime_vgem@basic-read.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-tgl-y/igt@prime_vgem@basic-read.html
#### Warnings ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-tgl-y: [DMESG-WARN][17] ([i915#2411]) -> [DMESG-WARN][18] ([i915#1982] / [i915#2411])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/fi-tgl-y/igt@i915_pm_rpm@basic-pci-d3-state.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/fi-tgl-y/igt@i915_pm_rpm@basic-pci-d3-state.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
Participating hosts (43 -> 38)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-bdw-samus fi-kbl-r
Build changes
-------------
* Linux: CI_DRM_9385 -> Patchwork_18972
CI-20190529: 20190529
CI_DRM_9385: 3d37e624f60f40cea80e784617686ae2917e9b01 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5870: 08b13995b85df26a77212e4fb21fd772976ef33c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18972: 3f30d254dfce5873961fbf3bc10177086bfdcc7c @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_18972/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_types.h
In file included from ./include/drm/drm_mm.h:49,
from ./include/drm/drm_vma_manager.h:26,
from ./include/drm/drm_gem.h:40,
from ./drivers/gpu/drm/i915/i915_drv.h:55,
from ./drivers/gpu/drm/i915/display/intel_display_types.h:46,
from <command-line>:
./drivers/gpu/drm/i915/i915_drv.h: In function ‘tgl_revids_get’:
./drivers/gpu/drm/i915/i915_drv.h:1594:9: error: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘unsigned int’ [-Werror=format=]
"Unsupported SOC stepping found %u, using %lu instead\n",
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/drm/drm_print.h:450:38: note: in definition of macro ‘drm_dbg_kms’
drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
^~~
./drivers/gpu/drm/i915/i915_drv.h:1602:8: error: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘unsigned int’ [-Werror=format=]
"Unsupported SOC stepping found %u, using %lu instead\n",
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/drm/drm_print.h:450:38: note: in definition of macro ‘drm_dbg_kms’
drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
^~~
cc1: all warnings being treated as errors
drivers/gpu/drm/i915/Makefile:304: recipe for target 'drivers/gpu/drm/i915/display/intel_display_types.hdrtest' failed
make[4]: *** [drivers/gpu/drm/i915/display/intel_display_types.hdrtest] Error 1
scripts/Makefile.build:500: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:500: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:500: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1799: recipe for target 'drivers' failed
make: *** [drivers] Error 2
== Linux commits ==
3f30d254dfce drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/index.html
[-- Attachment #1.2: Type: text/html, Size: 9621 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
2020-11-25 1:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-11-25 1:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-11-25 1:39 ` Patchwork
2020-11-25 3:38 ` kernel test robot
` (5 subsequent siblings)
8 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2020-11-25 1:39 UTC (permalink / raw)
To: Aditya Swarup; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
URL : https://patchwork.freedesktop.org/series/84238/
State : warning
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_types.h
In file included from ./include/drm/drm_mm.h:49,
from ./include/drm/drm_vma_manager.h:26,
from ./include/drm/drm_gem.h:40,
from ./drivers/gpu/drm/i915/i915_drv.h:55,
from ./drivers/gpu/drm/i915/display/intel_display_types.h:46,
from <command-line>:
./drivers/gpu/drm/i915/i915_drv.h: In function ‘tgl_revids_get’:
./drivers/gpu/drm/i915/i915_drv.h:1594:9: error: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘unsigned int’ [-Werror=format=]
"Unsupported SOC stepping found %u, using %lu instead\n",
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/drm/drm_print.h:450:38: note: in definition of macro ‘drm_dbg_kms’
drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
^~~
./drivers/gpu/drm/i915/i915_drv.h:1602:8: error: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘unsigned int’ [-Werror=format=]
"Unsupported SOC stepping found %u, using %lu instead\n",
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/drm/drm_print.h:450:38: note: in definition of macro ‘drm_dbg_kms’
drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
^~~
cc1: all warnings being treated as errors
drivers/gpu/drm/i915/Makefile:304: recipe for target 'drivers/gpu/drm/i915/display/intel_display_types.hdrtest' failed
make[4]: *** [drivers/gpu/drm/i915/display/intel_display_types.hdrtest] Error 1
scripts/Makefile.build:500: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:500: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:500: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1799: recipe for target 'drivers' failed
make: *** [drivers] Error 2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
@ 2020-11-25 3:38 ` kernel test robot
2020-11-25 1:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (7 subsequent siblings)
8 siblings, 0 replies; 24+ messages in thread
From: kernel test robot @ 2020-11-25 3:38 UTC (permalink / raw)
To: Aditya Swarup, intel-gfx; +Cc: Jani Nikula, Lucas De Marchi, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 5264 bytes --]
Hi Aditya,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip v5.10-rc5 next-20201124]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Aditya-Swarup/drm-i915-tgl-Fix-REVID-macros-for-TGL-to-fetch-correct-stepping/20201125-083215
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-a004-20201125 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/ce4e72969ddaa07dd8426d230d04ed91382e2fd9
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Aditya-Swarup/drm-i915-tgl-Fix-REVID-macros-for-TGL-to-fetch-correct-stepping/20201125-083215
git checkout ce4e72969ddaa07dd8426d230d04ed91382e2fd9
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from include/drm/drm_mm.h:49,
from include/drm/drm_vma_manager.h:26,
from include/drm/drm_gem.h:40,
from drivers/gpu/drm/i915/i915_drv.h:55,
from drivers/gpu/drm/i915/gt/intel_workarounds.c:7:
drivers/gpu/drm/i915/i915_drv.h: In function 'tgl_revids_get':
>> drivers/gpu/drm/i915/i915_drv.h:1594:9: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'unsigned int' [-Wformat=]
1594 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/drm/drm_print.h:450:38: note: in definition of macro 'drm_dbg_kms'
450 | drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
| ^~~
In file included from drivers/gpu/drm/i915/gt/intel_workarounds.c:7:
drivers/gpu/drm/i915/i915_drv.h:1594:53: note: format string is defined here
1594 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ~~^
| |
| long unsigned int
| %u
In file included from include/drm/drm_mm.h:49,
from include/drm/drm_vma_manager.h:26,
from include/drm/drm_gem.h:40,
from drivers/gpu/drm/i915/i915_drv.h:55,
from drivers/gpu/drm/i915/gt/intel_workarounds.c:7:
drivers/gpu/drm/i915/i915_drv.h:1602:8: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'unsigned int' [-Wformat=]
1602 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/drm/drm_print.h:450:38: note: in definition of macro 'drm_dbg_kms'
450 | drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
| ^~~
In file included from drivers/gpu/drm/i915/gt/intel_workarounds.c:7:
drivers/gpu/drm/i915/i915_drv.h:1602:52: note: format string is defined here
1602 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ~~^
| |
| long unsigned int
| %u
vim +1594 drivers/gpu/drm/i915/i915_drv.h
1577
1578 #define TGL_UY_REVID_RANGE(revid) \
1579 ((revid) < ARRAY_SIZE(tgl_uy_revids))
1580
1581 #define TGL_REVID_RANGE(revid) \
1582 ((revid) < ARRAY_SIZE(tgl_revids))
1583
1584 static inline const struct i915_rev_steppings *
1585 tgl_revids_get(struct drm_i915_private *dev_priv)
1586 {
1587 const u8 revid = INTEL_REVID(dev_priv);
1588
1589 if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
1590 if (TGL_UY_REVID_RANGE(revid)) {
1591 return tgl_uy_revids + revid;
1592 } else {
1593 drm_dbg_kms(&dev_priv->drm,
> 1594 "Unsupported SOC stepping found %u, using %lu instead\n",
1595 revid, ARRAY_SIZE(tgl_uy_revids) - 1);
1596 return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
1597 }
1598 } else if (TGL_REVID_RANGE(revid)) {
1599 return tgl_revids + revid;
1600 } else {
1601 drm_dbg_kms(&dev_priv->drm,
1602 "Unsupported SOC stepping found %u, using %lu instead\n",
1603 revid, ARRAY_SIZE(tgl_revids) - 1);
1604 return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
1605 }
1606 }
1607
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 37654 bytes --]
[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
@ 2020-11-25 3:38 ` kernel test robot
0 siblings, 0 replies; 24+ messages in thread
From: kernel test robot @ 2020-11-25 3:38 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 5368 bytes --]
Hi Aditya,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip v5.10-rc5 next-20201124]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Aditya-Swarup/drm-i915-tgl-Fix-REVID-macros-for-TGL-to-fetch-correct-stepping/20201125-083215
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-a004-20201125 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/ce4e72969ddaa07dd8426d230d04ed91382e2fd9
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Aditya-Swarup/drm-i915-tgl-Fix-REVID-macros-for-TGL-to-fetch-correct-stepping/20201125-083215
git checkout ce4e72969ddaa07dd8426d230d04ed91382e2fd9
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from include/drm/drm_mm.h:49,
from include/drm/drm_vma_manager.h:26,
from include/drm/drm_gem.h:40,
from drivers/gpu/drm/i915/i915_drv.h:55,
from drivers/gpu/drm/i915/gt/intel_workarounds.c:7:
drivers/gpu/drm/i915/i915_drv.h: In function 'tgl_revids_get':
>> drivers/gpu/drm/i915/i915_drv.h:1594:9: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'unsigned int' [-Wformat=]
1594 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/drm/drm_print.h:450:38: note: in definition of macro 'drm_dbg_kms'
450 | drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
| ^~~
In file included from drivers/gpu/drm/i915/gt/intel_workarounds.c:7:
drivers/gpu/drm/i915/i915_drv.h:1594:53: note: format string is defined here
1594 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ~~^
| |
| long unsigned int
| %u
In file included from include/drm/drm_mm.h:49,
from include/drm/drm_vma_manager.h:26,
from include/drm/drm_gem.h:40,
from drivers/gpu/drm/i915/i915_drv.h:55,
from drivers/gpu/drm/i915/gt/intel_workarounds.c:7:
drivers/gpu/drm/i915/i915_drv.h:1602:8: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'unsigned int' [-Wformat=]
1602 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/drm/drm_print.h:450:38: note: in definition of macro 'drm_dbg_kms'
450 | drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
| ^~~
In file included from drivers/gpu/drm/i915/gt/intel_workarounds.c:7:
drivers/gpu/drm/i915/i915_drv.h:1602:52: note: format string is defined here
1602 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ~~^
| |
| long unsigned int
| %u
vim +1594 drivers/gpu/drm/i915/i915_drv.h
1577
1578 #define TGL_UY_REVID_RANGE(revid) \
1579 ((revid) < ARRAY_SIZE(tgl_uy_revids))
1580
1581 #define TGL_REVID_RANGE(revid) \
1582 ((revid) < ARRAY_SIZE(tgl_revids))
1583
1584 static inline const struct i915_rev_steppings *
1585 tgl_revids_get(struct drm_i915_private *dev_priv)
1586 {
1587 const u8 revid = INTEL_REVID(dev_priv);
1588
1589 if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
1590 if (TGL_UY_REVID_RANGE(revid)) {
1591 return tgl_uy_revids + revid;
1592 } else {
1593 drm_dbg_kms(&dev_priv->drm,
> 1594 "Unsupported SOC stepping found %u, using %lu instead\n",
1595 revid, ARRAY_SIZE(tgl_uy_revids) - 1);
1596 return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
1597 }
1598 } else if (TGL_REVID_RANGE(revid)) {
1599 return tgl_revids + revid;
1600 } else {
1601 drm_dbg_kms(&dev_priv->drm,
1602 "Unsupported SOC stepping found %u, using %lu instead\n",
1603 revid, ARRAY_SIZE(tgl_revids) - 1);
1604 return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
1605 }
1606 }
1607
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 37654 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
@ 2020-11-25 5:38 ` kernel test robot
2020-11-25 1:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (7 subsequent siblings)
8 siblings, 0 replies; 24+ messages in thread
From: kernel test robot @ 2020-11-25 5:38 UTC (permalink / raw)
To: Aditya Swarup, intel-gfx; +Cc: Jani Nikula, Lucas De Marchi, kbuild-all
[-- Attachment #1: Type: text/plain, Size: 5658 bytes --]
Hi Aditya,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip v5.10-rc5 next-20201124]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Aditya-Swarup/drm-i915-tgl-Fix-REVID-macros-for-TGL-to-fetch-correct-stepping/20201125-083215
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-a005-20201125 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/ce4e72969ddaa07dd8426d230d04ed91382e2fd9
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Aditya-Swarup/drm-i915-tgl-Fix-REVID-macros-for-TGL-to-fetch-correct-stepping/20201125-083215
git checkout ce4e72969ddaa07dd8426d230d04ed91382e2fd9
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from include/drm/drm_mm.h:49,
from drivers/gpu/drm/i915/i915_vma.h:31,
from drivers/gpu/drm/i915/gt/uc/intel_guc.h:17,
from drivers/gpu/drm/i915/gt/uc/intel_uc.h:9,
from drivers/gpu/drm/i915/gt/intel_gt_types.h:16,
from drivers/gpu/drm/i915/gt/intel_gt.h:10,
from drivers/gpu/drm/i915/selftests/igt_reset.c:10:
drivers/gpu/drm/i915/selftests/../i915_drv.h: In function 'tgl_revids_get':
>> drivers/gpu/drm/i915/selftests/../i915_drv.h:1594:9: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'unsigned int' [-Wformat=]
1594 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/drm/drm_print.h:450:38: note: in definition of macro 'drm_dbg_kms'
450 | drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
| ^~~
In file included from drivers/gpu/drm/i915/selftests/igt_reset.c:12:
drivers/gpu/drm/i915/selftests/../i915_drv.h:1594:53: note: format string is defined here
1594 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ~~^
| |
| long unsigned int
| %u
In file included from include/drm/drm_mm.h:49,
from drivers/gpu/drm/i915/i915_vma.h:31,
from drivers/gpu/drm/i915/gt/uc/intel_guc.h:17,
from drivers/gpu/drm/i915/gt/uc/intel_uc.h:9,
from drivers/gpu/drm/i915/gt/intel_gt_types.h:16,
from drivers/gpu/drm/i915/gt/intel_gt.h:10,
from drivers/gpu/drm/i915/selftests/igt_reset.c:10:
drivers/gpu/drm/i915/selftests/../i915_drv.h:1602:8: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'unsigned int' [-Wformat=]
1602 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/drm/drm_print.h:450:38: note: in definition of macro 'drm_dbg_kms'
450 | drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
| ^~~
In file included from drivers/gpu/drm/i915/selftests/igt_reset.c:12:
drivers/gpu/drm/i915/selftests/../i915_drv.h:1602:52: note: format string is defined here
1602 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ~~^
| |
| long unsigned int
| %u
vim +1594 drivers/gpu/drm/i915/selftests/../i915_drv.h
1577
1578 #define TGL_UY_REVID_RANGE(revid) \
1579 ((revid) < ARRAY_SIZE(tgl_uy_revids))
1580
1581 #define TGL_REVID_RANGE(revid) \
1582 ((revid) < ARRAY_SIZE(tgl_revids))
1583
1584 static inline const struct i915_rev_steppings *
1585 tgl_revids_get(struct drm_i915_private *dev_priv)
1586 {
1587 const u8 revid = INTEL_REVID(dev_priv);
1588
1589 if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
1590 if (TGL_UY_REVID_RANGE(revid)) {
1591 return tgl_uy_revids + revid;
1592 } else {
1593 drm_dbg_kms(&dev_priv->drm,
> 1594 "Unsupported SOC stepping found %u, using %lu instead\n",
1595 revid, ARRAY_SIZE(tgl_uy_revids) - 1);
1596 return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
1597 }
1598 } else if (TGL_REVID_RANGE(revid)) {
1599 return tgl_revids + revid;
1600 } else {
1601 drm_dbg_kms(&dev_priv->drm,
1602 "Unsupported SOC stepping found %u, using %lu instead\n",
1603 revid, ARRAY_SIZE(tgl_revids) - 1);
1604 return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
1605 }
1606 }
1607
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
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[-- Attachment #3: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
@ 2020-11-25 5:38 ` kernel test robot
0 siblings, 0 replies; 24+ messages in thread
From: kernel test robot @ 2020-11-25 5:38 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 5766 bytes --]
Hi Aditya,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip v5.10-rc5 next-20201124]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Aditya-Swarup/drm-i915-tgl-Fix-REVID-macros-for-TGL-to-fetch-correct-stepping/20201125-083215
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-a005-20201125 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/ce4e72969ddaa07dd8426d230d04ed91382e2fd9
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Aditya-Swarup/drm-i915-tgl-Fix-REVID-macros-for-TGL-to-fetch-correct-stepping/20201125-083215
git checkout ce4e72969ddaa07dd8426d230d04ed91382e2fd9
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from include/drm/drm_mm.h:49,
from drivers/gpu/drm/i915/i915_vma.h:31,
from drivers/gpu/drm/i915/gt/uc/intel_guc.h:17,
from drivers/gpu/drm/i915/gt/uc/intel_uc.h:9,
from drivers/gpu/drm/i915/gt/intel_gt_types.h:16,
from drivers/gpu/drm/i915/gt/intel_gt.h:10,
from drivers/gpu/drm/i915/selftests/igt_reset.c:10:
drivers/gpu/drm/i915/selftests/../i915_drv.h: In function 'tgl_revids_get':
>> drivers/gpu/drm/i915/selftests/../i915_drv.h:1594:9: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'unsigned int' [-Wformat=]
1594 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/drm/drm_print.h:450:38: note: in definition of macro 'drm_dbg_kms'
450 | drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
| ^~~
In file included from drivers/gpu/drm/i915/selftests/igt_reset.c:12:
drivers/gpu/drm/i915/selftests/../i915_drv.h:1594:53: note: format string is defined here
1594 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ~~^
| |
| long unsigned int
| %u
In file included from include/drm/drm_mm.h:49,
from drivers/gpu/drm/i915/i915_vma.h:31,
from drivers/gpu/drm/i915/gt/uc/intel_guc.h:17,
from drivers/gpu/drm/i915/gt/uc/intel_uc.h:9,
from drivers/gpu/drm/i915/gt/intel_gt_types.h:16,
from drivers/gpu/drm/i915/gt/intel_gt.h:10,
from drivers/gpu/drm/i915/selftests/igt_reset.c:10:
drivers/gpu/drm/i915/selftests/../i915_drv.h:1602:8: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'unsigned int' [-Wformat=]
1602 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/drm/drm_print.h:450:38: note: in definition of macro 'drm_dbg_kms'
450 | drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
| ^~~
In file included from drivers/gpu/drm/i915/selftests/igt_reset.c:12:
drivers/gpu/drm/i915/selftests/../i915_drv.h:1602:52: note: format string is defined here
1602 | "Unsupported SOC stepping found %u, using %lu instead\n",
| ~~^
| |
| long unsigned int
| %u
vim +1594 drivers/gpu/drm/i915/selftests/../i915_drv.h
1577
1578 #define TGL_UY_REVID_RANGE(revid) \
1579 ((revid) < ARRAY_SIZE(tgl_uy_revids))
1580
1581 #define TGL_REVID_RANGE(revid) \
1582 ((revid) < ARRAY_SIZE(tgl_revids))
1583
1584 static inline const struct i915_rev_steppings *
1585 tgl_revids_get(struct drm_i915_private *dev_priv)
1586 {
1587 const u8 revid = INTEL_REVID(dev_priv);
1588
1589 if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
1590 if (TGL_UY_REVID_RANGE(revid)) {
1591 return tgl_uy_revids + revid;
1592 } else {
1593 drm_dbg_kms(&dev_priv->drm,
> 1594 "Unsupported SOC stepping found %u, using %lu instead\n",
1595 revid, ARRAY_SIZE(tgl_uy_revids) - 1);
1596 return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
1597 }
1598 } else if (TGL_REVID_RANGE(revid)) {
1599 return tgl_revids + revid;
1600 } else {
1601 drm_dbg_kms(&dev_priv->drm,
1602 "Unsupported SOC stepping found %u, using %lu instead\n",
1603 revid, ARRAY_SIZE(tgl_revids) - 1);
1604 return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
1605 }
1606 }
1607
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 40354 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
` (4 preceding siblings ...)
2020-11-25 5:38 ` kernel test robot
@ 2020-11-25 6:14 ` Patchwork
2020-11-25 11:45 ` [Intel-gfx] [PATCH] " Jani Nikula
` (2 subsequent siblings)
8 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2020-11-25 6:14 UTC (permalink / raw)
To: Aditya Swarup; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 18540 bytes --]
== Series Details ==
Series: drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
URL : https://patchwork.freedesktop.org/series/84238/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9385_full -> Patchwork_18972_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_18972_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18972_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_18972_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gem_contexts:
- shard-skl: NOTRUN -> [INCOMPLETE][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl5/igt@i915_selftest@live@gem_contexts.html
New tests
---------
New tests have been introduced between CI_DRM_9385_full and Patchwork_18972_full:
### New CI tests (1) ###
* boot:
- Statuses : 199 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_18972_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_reloc@basic-many-active@rcs0:
- shard-glk: [PASS][2] -> [FAIL][3] ([i915#2389])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-glk5/igt@gem_exec_reloc@basic-many-active@rcs0.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-glk7/igt@gem_exec_reloc@basic-many-active@rcs0.html
* igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen:
- shard-skl: [PASS][4] -> [FAIL][5] ([i915#54]) +1 similar issue
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html
* igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
- shard-apl: [PASS][6] -> [DMESG-WARN][7] ([i915#1635] / [i915#1982])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-apl7/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-apl3/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [PASS][8] -> [FAIL][9] ([i915#79]) +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@plain-flip-fb-recreate@a-edp1:
- shard-skl: [PASS][10] -> [DMESG-FAIL][11] ([i915#1982])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl10/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
- shard-tglb: [PASS][12] -> [DMESG-WARN][13] ([i915#1982]) +4 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite:
- shard-iclb: [PASS][14] -> [DMESG-WARN][15] ([i915#1982])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-skl: [PASS][16] -> [DMESG-WARN][17] ([i915#1982]) +4 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl10/igt@kms_panel_fitting@atomic-fastset.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl4/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][18] -> [FAIL][19] ([fdo#108145] / [i915#265])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_prime@basic-crc@second-to-first:
- shard-hsw: [PASS][20] -> [DMESG-WARN][21] ([i915#1982])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-hsw5/igt@kms_prime@basic-crc@second-to-first.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-hsw1/igt@kms_prime@basic-crc@second-to-first.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [PASS][22] -> [SKIP][23] ([fdo#109441]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_vblank@pipe-b-wait-forked-busy:
- shard-kbl: [PASS][24] -> [DMESG-WARN][25] ([i915#1982]) +5 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-kbl3/igt@kms_vblank@pipe-b-wait-forked-busy.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-kbl1/igt@kms_vblank@pipe-b-wait-forked-busy.html
* igt@perf_pmu@module-unload:
- shard-apl: [PASS][26] -> [DMESG-WARN][27] ([i915#1635] / [i915#1982] / [i915#262])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-apl1/igt@perf_pmu@module-unload.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-apl7/igt@perf_pmu@module-unload.html
* igt@sysfs_preempt_timeout@timeout@bcs0:
- shard-skl: [PASS][28] -> [FAIL][29] ([i915#2060])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl5/igt@sysfs_preempt_timeout@timeout@bcs0.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl7/igt@sysfs_preempt_timeout@timeout@bcs0.html
#### Possible fixes ####
* igt@drm_read@fault-buffer:
- shard-glk: [DMESG-WARN][30] ([i915#1982]) -> [PASS][31] +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-glk4/igt@drm_read@fault-buffer.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-glk5/igt@drm_read@fault-buffer.html
* {igt@gem_exec_capture@pi@bcs0}:
- shard-iclb: [INCOMPLETE][32] ([i915#2369] / [i915#2502]) -> [PASS][33]
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-iclb5/igt@gem_exec_capture@pi@bcs0.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-iclb4/igt@gem_exec_capture@pi@bcs0.html
* igt@gem_exec_whisper@basic-fds-forked:
- shard-glk: [DMESG-WARN][34] ([i915#118] / [i915#95]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-glk6/igt@gem_exec_whisper@basic-fds-forked.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-glk9/igt@gem_exec_whisper@basic-fds-forked.html
* igt@i915_module_load@reload:
- shard-tglb: [DMESG-WARN][36] ([i915#1982]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-tglb2/igt@i915_module_load@reload.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-tglb6/igt@i915_module_load@reload.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
- shard-skl: [DMESG-WARN][38] ([i915#1982]) -> [PASS][39] +3 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl9/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl3/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
* igt@kms_color@pipe-a-gamma:
- shard-tglb: [FAIL][40] ([i915#1149]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-tglb7/igt@kms_color@pipe-a-gamma.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-tglb6/igt@kms_color@pipe-a-gamma.html
* igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen:
- shard-skl: [FAIL][42] ([i915#54]) -> [PASS][43] +6 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-hsw: [FAIL][44] ([i915#96]) -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-hsw7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
- shard-apl: [DMESG-WARN][46] ([i915#1635] / [i915#1982]) -> [PASS][47] +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-apl8/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-apl2/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic:
- shard-skl: [FAIL][48] ([i915#2346]) -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
- shard-tglb: [FAIL][50] ([i915#2346]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-tglb7/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-tglb6/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
* igt@kms_flip@2x-dpms-vs-vblank-race@ab-vga1-hdmi-a1:
- shard-hsw: [DMESG-WARN][52] ([i915#1982]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-hsw6/igt@kms_flip@2x-dpms-vs-vblank-race@ab-vga1-hdmi-a1.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-hsw5/igt@kms_flip@2x-dpms-vs-vblank-race@ab-vga1-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-skl: [FAIL][54] ([i915#2122]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@flip-vs-suspend@c-edp1:
- shard-skl: [INCOMPLETE][56] -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl6/igt@kms_flip@flip-vs-suspend@c-edp1.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl8/igt@kms_flip@flip-vs-suspend@c-edp1.html
* igt@kms_flip@plain-flip-ts-check@a-dp1:
- shard-kbl: [DMESG-WARN][58] ([i915#1982]) -> [PASS][59] +3 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-kbl4/igt@kms_flip@plain-flip-ts-check@a-dp1.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-kbl2/igt@kms_flip@plain-flip-ts-check@a-dp1.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-skl: [INCOMPLETE][60] ([i915#123]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl9/igt@kms_frontbuffer_tracking@psr-suspend.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl3/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [FAIL][62] ([i915#1188]) -> [PASS][63] +1 similar issue
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl3/igt@kms_hdr@bpc-switch-suspend.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl5/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-b:
- shard-snb: [SKIP][64] ([fdo#109271]) -> [PASS][65] +2 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-snb2/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-b.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-snb6/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-b.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][66] ([fdo#109441]) -> [PASS][67] +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-iclb4/igt@kms_psr@psr2_primary_mmap_cpu.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@perf@polling-parameterized:
- shard-skl: [FAIL][68] ([i915#1542]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl5/igt@perf@polling-parameterized.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl10/igt@perf@polling-parameterized.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][70] ([i915#1804] / [i915#2684]) -> [WARN][71] ([i915#2684])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-iclb4/igt@i915_pm_rc6_residency@rc6-fence.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-iclb2/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][72] ([i915#1804]) -> [WARN][73] ([i915#2681])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-iclb6/igt@i915_pm_rc6_residency@rc6-idle.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@runner@aborted:
- shard-hsw: [FAIL][74] ([i915#2283] / [i915#2295] / [i915#483]) -> [FAIL][75] ([i915#2283] / [i915#2295])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-hsw1/igt@runner@aborted.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-hsw6/igt@runner@aborted.html
- shard-skl: ([FAIL][76], [FAIL][77], [FAIL][78]) ([i915#1814] / [i915#2029] / [i915#2295]) -> [FAIL][79] ([i915#2295])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl2/igt@runner@aborted.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl3/igt@runner@aborted.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9385/shard-skl3/igt@runner@aborted.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/shard-skl4/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2060]: https://gitlab.freedesktop.org/drm/intel/issues/2060
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
[i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
[i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389
[i915#2502]: https://gitlab.freedesktop.org/drm/intel/issues/2502
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
[i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_9385 -> Patchwork_18972
CI-20190529: 20190529
CI_DRM_9385: 3d37e624f60f40cea80e784617686ae2917e9b01 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5870: 08b13995b85df26a77212e4fb21fd772976ef33c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18972: 3f30d254dfce5873961fbf3bc10177086bfdcc7c @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18972/index.html
[-- Attachment #1.2: Type: text/html, Size: 21740 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
` (5 preceding siblings ...)
2020-11-25 6:14 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
@ 2020-11-25 11:45 ` Jani Nikula
2020-11-25 15:33 ` Chris Wilson
2020-11-25 13:21 ` Souza, Jose
2020-11-25 23:09 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping (rev2) Patchwork
8 siblings, 1 reply; 24+ messages in thread
From: Jani Nikula @ 2020-11-25 11:45 UTC (permalink / raw)
To: Aditya Swarup, intel-gfx; +Cc: Lucas De Marchi
On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
> Fix TGL REVID macros to fetch correct display/gt stepping based
> on SOC rev id from INTEL_REVID() macro. Previously, we were just
> returning the first element of the revid array instead of using
> the correct index based on SOC rev id.
>
> Also, add array bound checks for TGL REV ID array. Since, there
> might be a possibility of using older kernels on latest platform
> revision, resulting in out of bounds access for rev ID array.
> In this scenario, print message for unsupported rev ID and apply
> settings for latest rev ID available.
>
> Fixes: ("drm/i915/tgl: Fix stepping WA matching")
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
> 1 file changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 15be8debae54..29d55b7017be 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1572,16 +1572,37 @@ enum {
> TGL_REVID_D0,
> };
>
> -extern const struct i915_rev_steppings tgl_uy_revids[];
> -extern const struct i915_rev_steppings tgl_revids[];
> +extern const struct i915_rev_steppings tgl_uy_revids[4];
> +extern const struct i915_rev_steppings tgl_revids[2];
Just a quick note, the compiler does not check that the size in the
extern declaration matches the size in the array definition. So you
might end up with a mismatch without noticing.
BR,
Jani.
> +
> +#define TGL_UY_REVID_RANGE(revid) \
> + ((revid) < ARRAY_SIZE(tgl_uy_revids))
> +
> +#define TGL_REVID_RANGE(revid) \
> + ((revid) < ARRAY_SIZE(tgl_revids))
>
> static inline const struct i915_rev_steppings *
> tgl_revids_get(struct drm_i915_private *dev_priv)
> {
> - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
> - return tgl_uy_revids;
> - else
> - return tgl_revids;
> + const u8 revid = INTEL_REVID(dev_priv);
> +
> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> + if (TGL_UY_REVID_RANGE(revid)) {
> + return tgl_uy_revids + revid;
> + } else {
> + drm_dbg_kms(&dev_priv->drm,
> + "Unsupported SOC stepping found %u, using %lu instead\n",
> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
> + return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
> + }
> + } else if (TGL_REVID_RANGE(revid)) {
> + return tgl_revids + revid;
> + } else {
> + drm_dbg_kms(&dev_priv->drm,
> + "Unsupported SOC stepping found %u, using %lu instead\n",
> + revid, ARRAY_SIZE(tgl_revids) - 1);
> + return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
> + }
> }
>
> #define IS_TGL_DISP_REVID(p, since, until) \
> @@ -1591,12 +1612,14 @@ tgl_revids_get(struct drm_i915_private *dev_priv)
>
> #define IS_TGL_UY_GT_REVID(p, since, until) \
> ((IS_TGL_U(p) || IS_TGL_Y(p)) && \
> + TGL_UY_REVID_RANGE(INTEL_REVID(p)) && \
> tgl_uy_revids->gt_stepping >= (since) && \
> tgl_uy_revids->gt_stepping <= (until))
>
> #define IS_TGL_GT_REVID(p, since, until) \
> (IS_TIGERLAKE(p) && \
> !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
> + TGL_REVID_RANGE(INTEL_REVID(p)) && \
> tgl_revids->gt_stepping >= (since) && \
> tgl_revids->gt_stepping <= (until))
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
` (6 preceding siblings ...)
2020-11-25 11:45 ` [Intel-gfx] [PATCH] " Jani Nikula
@ 2020-11-25 13:21 ` Souza, Jose
2020-11-25 18:03 ` Aditya Swarup
2020-11-25 23:09 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping (rev2) Patchwork
8 siblings, 1 reply; 24+ messages in thread
From: Souza, Jose @ 2020-11-25 13:21 UTC (permalink / raw)
To: Swarup, Aditya, intel-gfx; +Cc: Nikula, Jani, De Marchi, Lucas
On Tue, 2020-11-24 at 16:31 -0800, Aditya Swarup wrote:
> Fix TGL REVID macros to fetch correct display/gt stepping based
> on SOC rev id from INTEL_REVID() macro. Previously, we were just
> returning the first element of the revid array instead of using
> the correct index based on SOC rev id.
>
> Also, add array bound checks for TGL REV ID array. Since, there
> might be a possibility of using older kernels on latest platform
> revision, resulting in out of bounds access for rev ID array.
> In this scenario, print message for unsupported rev ID and apply
> settings for latest rev ID available.
>
> Fixes: ("drm/i915/tgl: Fix stepping WA matching")
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
> 1 file changed, 29 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 15be8debae54..29d55b7017be 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1572,16 +1572,37 @@ enum {
> TGL_REVID_D0,
> };
>
>
>
>
>
>
>
>
> -extern const struct i915_rev_steppings tgl_uy_revids[];
> -extern const struct i915_rev_steppings tgl_revids[];
> +extern const struct i915_rev_steppings tgl_uy_revids[4];
> +extern const struct i915_rev_steppings tgl_revids[2];
Not sure if the above will work, saw a comment from Jani please check that.
> +
> +#define TGL_UY_REVID_RANGE(revid) \
> + ((revid) < ARRAY_SIZE(tgl_uy_revids))
> +
> +#define TGL_REVID_RANGE(revid) \
> + ((revid) < ARRAY_SIZE(tgl_revids))
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
> static inline const struct i915_rev_steppings *
> tgl_revids_get(struct drm_i915_private *dev_priv)
> {
> - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
> - return tgl_uy_revids;
> - else
> - return tgl_revids;
> + const u8 revid = INTEL_REVID(dev_priv);
> +
> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> + if (TGL_UY_REVID_RANGE(revid)) {
> + return tgl_uy_revids + revid;
Why not help readers and go simple? tgl_uy_revids[revid]
> + } else {
> + drm_dbg_kms(&dev_priv->drm,
> + "Unsupported SOC stepping found %u, using %lu instead\n",
> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
> + return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
> + }
> + } else if (TGL_REVID_RANGE(revid)) {
> + return tgl_revids + revid;
> + } else {
> + drm_dbg_kms(&dev_priv->drm,
> + "Unsupported SOC stepping found %u, using %lu instead\n",
> + revid, ARRAY_SIZE(tgl_revids) - 1);
> + return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
> + }
I bet you can re arrange it and end up with one drm_dbg_kms() call.
> }
>
>
>
>
>
>
>
>
> #define IS_TGL_DISP_REVID(p, since, until) \
> @@ -1591,12 +1612,14 @@ tgl_revids_get(struct drm_i915_private *dev_priv)
>
>
>
>
>
>
>
>
> #define IS_TGL_UY_GT_REVID(p, since, until) \
> ((IS_TGL_U(p) || IS_TGL_Y(p)) && \
> + TGL_UY_REVID_RANGE(INTEL_REVID(p)) && \
> tgl_uy_revids->gt_stepping >= (since) && \
> tgl_uy_revids->gt_stepping <= (until))
>
>
>
>
>
>
>
>
> #define IS_TGL_GT_REVID(p, since, until) \
> (IS_TIGERLAKE(p) && \
> !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
> + TGL_REVID_RANGE(INTEL_REVID(p)) && \
> tgl_revids->gt_stepping >= (since) && \
> tgl_revids->gt_stepping <= (until))
>
>
>
>
>
>
>
You did not fixed the issue for GT.
>
>
>
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 11:45 ` [Intel-gfx] [PATCH] " Jani Nikula
@ 2020-11-25 15:33 ` Chris Wilson
2020-11-25 17:51 ` Aditya Swarup
2020-11-25 19:01 ` Lucas De Marchi
0 siblings, 2 replies; 24+ messages in thread
From: Chris Wilson @ 2020-11-25 15:33 UTC (permalink / raw)
To: Aditya Swarup, Jani Nikula, intel-gfx; +Cc: Lucas De Marchi
Quoting Jani Nikula (2020-11-25 11:45:56)
> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
> > Fix TGL REVID macros to fetch correct display/gt stepping based
> > on SOC rev id from INTEL_REVID() macro. Previously, we were just
> > returning the first element of the revid array instead of using
> > the correct index based on SOC rev id.
> >
> > Also, add array bound checks for TGL REV ID array. Since, there
> > might be a possibility of using older kernels on latest platform
> > revision, resulting in out of bounds access for rev ID array.
> > In this scenario, print message for unsupported rev ID and apply
> > settings for latest rev ID available.
> >
> > Fixes: ("drm/i915/tgl: Fix stepping WA matching")
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: Matt Roper <matthew.d.roper@intel.com>
> > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
> > 1 file changed, 29 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 15be8debae54..29d55b7017be 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1572,16 +1572,37 @@ enum {
> > TGL_REVID_D0,
> > };
> >
> > -extern const struct i915_rev_steppings tgl_uy_revids[];
> > -extern const struct i915_rev_steppings tgl_revids[];
> > +extern const struct i915_rev_steppings tgl_uy_revids[4];
> > +extern const struct i915_rev_steppings tgl_revids[2];
>
> Just a quick note, the compiler does not check that the size in the
> extern declaration matches the size in the array definition. So you
> might end up with a mismatch without noticing.
What surprised me is that this defeated the __must_be_array() check.
I thought these were just pointers to C
> > +#define TGL_UY_REVID_RANGE(revid) \
> > + ((revid) < ARRAY_SIZE(tgl_uy_revids))
> > +
> > +#define TGL_REVID_RANGE(revid) \
> > + ((revid) < ARRAY_SIZE(tgl_revids))
> >
> > static inline const struct i915_rev_steppings *
> > tgl_revids_get(struct drm_i915_private *dev_priv)
> > {
> > - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
> > - return tgl_uy_revids;
> > - else
> > - return tgl_revids;
> > + const u8 revid = INTEL_REVID(dev_priv);
> > +
> > + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> > + if (TGL_UY_REVID_RANGE(revid)) {
> > + return tgl_uy_revids + revid;
> > + } else {
> > + drm_dbg_kms(&dev_priv->drm,
> > + "Unsupported SOC stepping found %u, using %lu instead\n",
> > + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
Also please don't have a dbg for every single IS_TGL_*_REVID
invocation. And this is not _kms, but driver; better yet, don't bother
with a drm_dbg_kms here at all.
If you want to actually check, add something like
intel_detect_preproduction_hw() and warn about unknown future revids.
Or include the info when we print the revid in the caps.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 15:33 ` Chris Wilson
@ 2020-11-25 17:51 ` Aditya Swarup
2020-11-25 18:36 ` Ville Syrjälä
` (3 more replies)
2020-11-25 19:01 ` Lucas De Marchi
1 sibling, 4 replies; 24+ messages in thread
From: Aditya Swarup @ 2020-11-25 17:51 UTC (permalink / raw)
To: Chris Wilson, Jani Nikula, intel-gfx; +Cc: Lucas De Marchi
On 11/25/20 7:33 AM, Chris Wilson wrote:
> Quoting Jani Nikula (2020-11-25 11:45:56)
>> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
>>> Fix TGL REVID macros to fetch correct display/gt stepping based
>>> on SOC rev id from INTEL_REVID() macro. Previously, we were just
>>> returning the first element of the revid array instead of using
>>> the correct index based on SOC rev id.
>>>
>>> Also, add array bound checks for TGL REV ID array. Since, there
>>> might be a possibility of using older kernels on latest platform
>>> revision, resulting in out of bounds access for rev ID array.
>>> In this scenario, print message for unsupported rev ID and apply
>>> settings for latest rev ID available.
>>>
>>> Fixes: ("drm/i915/tgl: Fix stepping WA matching")
>>> Cc: José Roberto de Souza <jose.souza@intel.com>
>>> Cc: Matt Roper <matthew.d.roper@intel.com>
>>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
>>> 1 file changed, 29 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>> index 15be8debae54..29d55b7017be 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> @@ -1572,16 +1572,37 @@ enum {
>>> TGL_REVID_D0,
>>> };
>>>
>>> -extern const struct i915_rev_steppings tgl_uy_revids[];
>>> -extern const struct i915_rev_steppings tgl_revids[];
>>> +extern const struct i915_rev_steppings tgl_uy_revids[4];
>>> +extern const struct i915_rev_steppings tgl_revids[2];
>>
>> Just a quick note, the compiler does not check that the size in the
>> extern declaration matches the size in the array definition. So you
>> might end up with a mismatch without noticing.
Yes.. We will have to take care of it if we are adding rev id to array table(which mostly
should remain a const once we decide to go upstream). Without this declaration, I cannot
use ARRAY_SIZE() macro with revid arrays as the sizeof() operator complains about not
knowing the size of the array in question as it is an extern declaration.
So, I don't know what other approach you want to suggest? If we move all the array tables to i915_drv.h(which
I feel would be a better approach rather than having it in intel_workarounds.c), Matt
Roper's KBL patch says that compiler complains about unused variables.
We are anyhow going to correct the whole thing with your stepping series anyway. This is supposed
to be a stop gap fix. Revids shouldn't be changing for TGL anymore.
>
> What surprised me is that this defeated the __must_be_array() check.
> I thought these were just pointers to C
>
>>> +#define TGL_UY_REVID_RANGE(revid) \
>>> + ((revid) < ARRAY_SIZE(tgl_uy_revids))
>>> +
>>> +#define TGL_REVID_RANGE(revid) \
>>> + ((revid) < ARRAY_SIZE(tgl_revids))
>>>
>>> static inline const struct i915_rev_steppings *
>>> tgl_revids_get(struct drm_i915_private *dev_priv)
>>> {
>>> - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
>>> - return tgl_uy_revids;
>>> - else
>>> - return tgl_revids;
>>> + const u8 revid = INTEL_REVID(dev_priv);
>>> +
>>> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>>> + if (TGL_UY_REVID_RANGE(revid)) {
>>> + return tgl_uy_revids + revid;
>>> + } else {
>>> + drm_dbg_kms(&dev_priv->drm,
>>> + "Unsupported SOC stepping found %u, using %lu instead\n",
>>> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
>
> Also please don't have a dbg for every single IS_TGL_*_REVID
> invocation. And this is not _kms, but driver; better yet, don't bother
> with a drm_dbg_kms here at all.
>
> If you want to actually check, add something like
> intel_detect_preproduction_hw() and warn about unknown future revids.
> Or include the info when we print the revid in the caps.
So, what you are suggesting is add an info print in that function intel_detect_preproduction_hw() right?
Or something else?
> -Chris
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 13:21 ` Souza, Jose
@ 2020-11-25 18:03 ` Aditya Swarup
2020-11-25 18:26 ` Souza, Jose
0 siblings, 1 reply; 24+ messages in thread
From: Aditya Swarup @ 2020-11-25 18:03 UTC (permalink / raw)
To: Souza, Jose, intel-gfx; +Cc: Nikula, Jani, De Marchi, Lucas
On 11/25/20 5:21 AM, Souza, Jose wrote:
> On Tue, 2020-11-24 at 16:31 -0800, Aditya Swarup wrote:
>> Fix TGL REVID macros to fetch correct display/gt stepping based
>> on SOC rev id from INTEL_REVID() macro. Previously, we were just
>> returning the first element of the revid array instead of using
>> the correct index based on SOC rev id.
>>
>> Also, add array bound checks for TGL REV ID array. Since, there
>> might be a possibility of using older kernels on latest platform
>> revision, resulting in out of bounds access for rev ID array.
>> In this scenario, print message for unsupported rev ID and apply
>> settings for latest rev ID available.
>>
>> Fixes: ("drm/i915/tgl: Fix stepping WA matching")
>> Cc: José Roberto de Souza <jose.souza@intel.com>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
>> 1 file changed, 29 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 15be8debae54..29d55b7017be 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1572,16 +1572,37 @@ enum {
>> TGL_REVID_D0,
>> };
>>
>>
>>
>>
>>
>>
>>
>>
>> -extern const struct i915_rev_steppings tgl_uy_revids[];
>> -extern const struct i915_rev_steppings tgl_revids[];
>> +extern const struct i915_rev_steppings tgl_uy_revids[4];
>> +extern const struct i915_rev_steppings tgl_revids[2];
>
> Not sure if the above will work, saw a comment from Jani please check that.
This works otherwise I can't use ARRAY_SIZE() macro as it is just an extern declaration,
so the sizeof() doesn't have clue about the size. The only way I can think of working
around this is by moving tables here but Matt's KBL REVID patch suggests unused variables errors
but my compiler didn't complain.
>
>> +
>> +#define TGL_UY_REVID_RANGE(revid) \
>> + ((revid) < ARRAY_SIZE(tgl_uy_revids))
>> +
>> +#define TGL_REVID_RANGE(revid) \
>> + ((revid) < ARRAY_SIZE(tgl_revids))
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>> static inline const struct i915_rev_steppings *
>> tgl_revids_get(struct drm_i915_private *dev_priv)
>> {
>> - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
>> - return tgl_uy_revids;
>> - else
>> - return tgl_revids;
>> + const u8 revid = INTEL_REVID(dev_priv);
>> +
>> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>> + if (TGL_UY_REVID_RANGE(revid)) {
>> + return tgl_uy_revids + revid;
>
> Why not help readers and go simple? tgl_uy_revids[revid]
Hmm I will have to change the return type then, as you were returning a pointer and introduces
compiler error. I will change the return type.
>
>> + } else {
>> + drm_dbg_kms(&dev_priv->drm,
>> + "Unsupported SOC stepping found %u, using %lu instead\n",
>> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
>> + return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
>> + }
>> + } else if (TGL_REVID_RANGE(revid)) {
>> + return tgl_revids + revid;
>> + } else {
>> + drm_dbg_kms(&dev_priv->drm,
>> + "Unsupported SOC stepping found %u, using %lu instead\n",
>> + revid, ARRAY_SIZE(tgl_revids) - 1);
>> + return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
>> + }
>
> I bet you can re arrange it and end up with one drm_dbg_kms() call.
I can but that will involve more macros as we are dealing with two different array tables and each one
with a different range. I will use just one print to say what SOC rev id we get from pci dev and what
we will be using.
>
>
>> }
>>
>>
>>
>>
>>
>>
>>
>>
>> #define IS_TGL_DISP_REVID(p, since, until) \
>> @@ -1591,12 +1612,14 @@ tgl_revids_get(struct drm_i915_private *dev_priv)
>>
>>
>>
>>
>>
>>
>>
>>
>> #define IS_TGL_UY_GT_REVID(p, since, until) \
>> ((IS_TGL_U(p) || IS_TGL_Y(p)) && \
>> + TGL_UY_REVID_RANGE(INTEL_REVID(p)) && \
>> tgl_uy_revids->gt_stepping >= (since) && \
>> tgl_uy_revids->gt_stepping <= (until))
>>
>>
>>
>>
>>
>>
>>
>>
>> #define IS_TGL_GT_REVID(p, since, until) \
>> (IS_TIGERLAKE(p) && \
>> !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
>> + TGL_REVID_RANGE(INTEL_REVID(p)) && \
>> tgl_revids->gt_stepping >= (since) && \
>> tgl_revids->gt_stepping <= (until))
>>
>>
>>
>>
>>
>>
>>
>
> You did not fixed the issue for GT.
Yes.. I didn't notice that.. Will change in the next revision.
Aditya
>
>>
>>
>>
>>
>>
>
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 18:03 ` Aditya Swarup
@ 2020-11-25 18:26 ` Souza, Jose
0 siblings, 0 replies; 24+ messages in thread
From: Souza, Jose @ 2020-11-25 18:26 UTC (permalink / raw)
To: Swarup, Aditya, intel-gfx; +Cc: Nikula, Jani, De Marchi, Lucas
On Wed, 2020-11-25 at 10:03 -0800, Aditya Swarup wrote:
> On 11/25/20 5:21 AM, Souza, Jose wrote:
> > On Tue, 2020-11-24 at 16:31 -0800, Aditya Swarup wrote:
> > > Fix TGL REVID macros to fetch correct display/gt stepping based
> > > on SOC rev id from INTEL_REVID() macro. Previously, we were just
> > > returning the first element of the revid array instead of using
> > > the correct index based on SOC rev id.
> > >
> > > Also, add array bound checks for TGL REV ID array. Since, there
> > > might be a possibility of using older kernels on latest platform
> > > revision, resulting in out of bounds access for rev ID array.
> > > In this scenario, print message for unsupported rev ID and apply
> > > settings for latest rev ID available.
> > >
> > > Fixes: ("drm/i915/tgl: Fix stepping WA matching")
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Cc: Matt Roper <matthew.d.roper@intel.com>
> > > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
> > > 1 file changed, 29 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > > index 15be8debae54..29d55b7017be 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -1572,16 +1572,37 @@ enum {
> > > TGL_REVID_D0,
> > > };
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > -extern const struct i915_rev_steppings tgl_uy_revids[];
> > > -extern const struct i915_rev_steppings tgl_revids[];
> > > +extern const struct i915_rev_steppings tgl_uy_revids[4];
> > > +extern const struct i915_rev_steppings tgl_revids[2];
> >
> > Not sure if the above will work, saw a comment from Jani please check that.
>
> This works otherwise I can't use ARRAY_SIZE() macro as it is just an extern declaration,
> so the sizeof() doesn't have clue about the size. The only way I can think of working
> around this is by moving tables here but Matt's KBL REVID patch suggests unused variables errors
> but my compiler didn't complain.
>
> >
> > > +
> > > +#define TGL_UY_REVID_RANGE(revid) \
> > > + ((revid) < ARRAY_SIZE(tgl_uy_revids))
> > > +
> > > +#define TGL_REVID_RANGE(revid) \
> > > + ((revid) < ARRAY_SIZE(tgl_revids))
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > static inline const struct i915_rev_steppings *
> > > tgl_revids_get(struct drm_i915_private *dev_priv)
> > > {
> > > - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
> > > - return tgl_uy_revids;
> > > - else
> > > - return tgl_revids;
> > > + const u8 revid = INTEL_REVID(dev_priv);
> > > +
> > > + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> > > + if (TGL_UY_REVID_RANGE(revid)) {
> > > + return tgl_uy_revids + revid;
> >
> > Why not help readers and go simple? tgl_uy_revids[revid]
>
> Hmm I will have to change the return type then, as you were returning a pointer and introduces
> compiler error. I will change the return type.
No need to change the return type. &tgl_uy_revids[revid]
>
> >
> > > + } else {
> > > + drm_dbg_kms(&dev_priv->drm,
> > > + "Unsupported SOC stepping found %u, using %lu instead\n",
> > > + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
> > > + return tgl_uy_revids + (ARRAY_SIZE(tgl_uy_revids) - 1);
> > > + }
> > > + } else if (TGL_REVID_RANGE(revid)) {
> > > + return tgl_revids + revid;
> > > + } else {
> > > + drm_dbg_kms(&dev_priv->drm,
> > > + "Unsupported SOC stepping found %u, using %lu instead\n",
> > > + revid, ARRAY_SIZE(tgl_revids) - 1);
> > > + return tgl_uy_revids + (ARRAY_SIZE(tgl_revids) - 1);
> > > + }
> >
> > I bet you can re arrange it and end up with one drm_dbg_kms() call.
>
> I can but that will involve more macros as we are dealing with two different array tables and each one
> with a different range. I will use just one print to say what SOC rev id we get from pci dev and what
> we will be using.
>
> >
> >
> > > }
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > #define IS_TGL_DISP_REVID(p, since, until) \
> > > @@ -1591,12 +1612,14 @@ tgl_revids_get(struct drm_i915_private *dev_priv)
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > #define IS_TGL_UY_GT_REVID(p, since, until) \
> > > ((IS_TGL_U(p) || IS_TGL_Y(p)) && \
> > > + TGL_UY_REVID_RANGE(INTEL_REVID(p)) && \
> > > tgl_uy_revids->gt_stepping >= (since) && \
> > > tgl_uy_revids->gt_stepping <= (until))
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > #define IS_TGL_GT_REVID(p, since, until) \
> > > (IS_TIGERLAKE(p) && \
> > > !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
> > > + TGL_REVID_RANGE(INTEL_REVID(p)) && \
> > > tgl_revids->gt_stepping >= (since) && \
> > > tgl_revids->gt_stepping <= (until))
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> > You did not fixed the issue for GT.
>
> Yes.. I didn't notice that.. Will change in the next revision.
>
> Aditya
>
> >
> > >
> > >
> > >
> > >
> > >
> >
>
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 17:51 ` Aditya Swarup
@ 2020-11-25 18:36 ` Ville Syrjälä
2020-11-25 19:18 ` Lucas De Marchi
` (2 subsequent siblings)
3 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjälä @ 2020-11-25 18:36 UTC (permalink / raw)
To: Aditya Swarup; +Cc: Jani Nikula, intel-gfx, Lucas De Marchi, Chris Wilson
On Wed, Nov 25, 2020 at 09:51:04AM -0800, Aditya Swarup wrote:
> On 11/25/20 7:33 AM, Chris Wilson wrote:
> > Quoting Jani Nikula (2020-11-25 11:45:56)
> >> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
> >>> Fix TGL REVID macros to fetch correct display/gt stepping based
> >>> on SOC rev id from INTEL_REVID() macro. Previously, we were just
> >>> returning the first element of the revid array instead of using
> >>> the correct index based on SOC rev id.
> >>>
> >>> Also, add array bound checks for TGL REV ID array. Since, there
> >>> might be a possibility of using older kernels on latest platform
> >>> revision, resulting in out of bounds access for rev ID array.
> >>> In this scenario, print message for unsupported rev ID and apply
> >>> settings for latest rev ID available.
> >>>
> >>> Fixes: ("drm/i915/tgl: Fix stepping WA matching")
> >>> Cc: José Roberto de Souza <jose.souza@intel.com>
> >>> Cc: Matt Roper <matthew.d.roper@intel.com>
> >>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> >>> Cc: Jani Nikula <jani.nikula@intel.com>
> >>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
> >>> ---
> >>> drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
> >>> 1 file changed, 29 insertions(+), 6 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> >>> index 15be8debae54..29d55b7017be 100644
> >>> --- a/drivers/gpu/drm/i915/i915_drv.h
> >>> +++ b/drivers/gpu/drm/i915/i915_drv.h
> >>> @@ -1572,16 +1572,37 @@ enum {
> >>> TGL_REVID_D0,
> >>> };
> >>>
> >>> -extern const struct i915_rev_steppings tgl_uy_revids[];
> >>> -extern const struct i915_rev_steppings tgl_revids[];
> >>> +extern const struct i915_rev_steppings tgl_uy_revids[4];
> >>> +extern const struct i915_rev_steppings tgl_revids[2];
> >>
> >> Just a quick note, the compiler does not check that the size in the
> >> extern declaration matches the size in the array definition. So you
> >> might end up with a mismatch without noticing.
>
> Yes.. We will have to take care of it if we are adding rev id to array table(which mostly
> should remain a const once we decide to go upstream). Without this declaration, I cannot
> use ARRAY_SIZE() macro with revid arrays as the sizeof() operator complains about not
> knowing the size of the array in question as it is an extern declaration.
Can't you replace the ARRAY_SIZE() with a sentinel? I guess
Making it a struct with a size member would be another option.
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 15:33 ` Chris Wilson
2020-11-25 17:51 ` Aditya Swarup
@ 2020-11-25 19:01 ` Lucas De Marchi
1 sibling, 0 replies; 24+ messages in thread
From: Lucas De Marchi @ 2020-11-25 19:01 UTC (permalink / raw)
To: Chris Wilson; +Cc: Jani Nikula, intel-gfx
On Wed, Nov 25, 2020 at 03:33:23PM +0000, Chris Wilson wrote:
>Quoting Jani Nikula (2020-11-25 11:45:56)
>> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
>> > Fix TGL REVID macros to fetch correct display/gt stepping based
>> > on SOC rev id from INTEL_REVID() macro. Previously, we were just
>> > returning the first element of the revid array instead of using
>> > the correct index based on SOC rev id.
>> >
>> > Also, add array bound checks for TGL REV ID array. Since, there
>> > might be a possibility of using older kernels on latest platform
>> > revision, resulting in out of bounds access for rev ID array.
>> > In this scenario, print message for unsupported rev ID and apply
>> > settings for latest rev ID available.
>> >
>> > Fixes: ("drm/i915/tgl: Fix stepping WA matching")
>> > Cc: José Roberto de Souza <jose.souza@intel.com>
>> > Cc: Matt Roper <matthew.d.roper@intel.com>
>> > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> > Cc: Jani Nikula <jani.nikula@intel.com>
>> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
>> > ---
>> > drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
>> > 1 file changed, 29 insertions(+), 6 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> > index 15be8debae54..29d55b7017be 100644
>> > --- a/drivers/gpu/drm/i915/i915_drv.h
>> > +++ b/drivers/gpu/drm/i915/i915_drv.h
>> > @@ -1572,16 +1572,37 @@ enum {
>> > TGL_REVID_D0,
>> > };
>> >
>> > -extern const struct i915_rev_steppings tgl_uy_revids[];
>> > -extern const struct i915_rev_steppings tgl_revids[];
>> > +extern const struct i915_rev_steppings tgl_uy_revids[4];
>> > +extern const struct i915_rev_steppings tgl_revids[2];
>>
>> Just a quick note, the compiler does not check that the size in the
>> extern declaration matches the size in the array definition. So you
>> might end up with a mismatch without noticing.
>
>What surprised me is that this defeated the __must_be_array() check.
>I thought these were just pointers to C
it doesn't complain because it actually works. The extern is declaring
that amount of storage size... I think people here are confusing with
accepting an array as a parameter, in which case it decays to a
pointer.
Since this is all obscure semantics of C, for the quick fix here maybe
better to just define the size and reuse it both in header and .c?
and then work in the refactor that will actually remove all of this.
Lucas De Marchi
>
>> > +#define TGL_UY_REVID_RANGE(revid) \
>> > + ((revid) < ARRAY_SIZE(tgl_uy_revids))
>> > +
>> > +#define TGL_REVID_RANGE(revid) \
>> > + ((revid) < ARRAY_SIZE(tgl_revids))
>> >
>> > static inline const struct i915_rev_steppings *
>> > tgl_revids_get(struct drm_i915_private *dev_priv)
>> > {
>> > - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
>> > - return tgl_uy_revids;
>> > - else
>> > - return tgl_revids;
>> > + const u8 revid = INTEL_REVID(dev_priv);
>> > +
>> > + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>> > + if (TGL_UY_REVID_RANGE(revid)) {
>> > + return tgl_uy_revids + revid;
>> > + } else {
>> > + drm_dbg_kms(&dev_priv->drm,
>> > + "Unsupported SOC stepping found %u, using %lu instead\n",
>> > + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
>
>Also please don't have a dbg for every single IS_TGL_*_REVID
>invocation. And this is not _kms, but driver; better yet, don't bother
>with a drm_dbg_kms here at all.
>
>If you want to actually check, add something like
>intel_detect_preproduction_hw() and warn about unknown future revids.
>Or include the info when we print the revid in the caps.
>-Chris
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 17:51 ` Aditya Swarup
2020-11-25 18:36 ` Ville Syrjälä
@ 2020-11-25 19:18 ` Lucas De Marchi
2020-11-25 19:30 ` Aditya Swarup
2020-11-25 19:29 ` Lucas De Marchi
2020-11-25 20:14 ` Chris Wilson
3 siblings, 1 reply; 24+ messages in thread
From: Lucas De Marchi @ 2020-11-25 19:18 UTC (permalink / raw)
To: Aditya Swarup; +Cc: Jani Nikula, intel-gfx, Chris Wilson
On Wed, Nov 25, 2020 at 09:51:04AM -0800, Aditya Swarup wrote:
>On 11/25/20 7:33 AM, Chris Wilson wrote:
>> Quoting Jani Nikula (2020-11-25 11:45:56)
>>> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
>>>> Fix TGL REVID macros to fetch correct display/gt stepping based
>>>> on SOC rev id from INTEL_REVID() macro. Previously, we were just
>>>> returning the first element of the revid array instead of using
>>>> the correct index based on SOC rev id.
>>>>
>>>> Also, add array bound checks for TGL REV ID array. Since, there
>>>> might be a possibility of using older kernels on latest platform
>>>> revision, resulting in out of bounds access for rev ID array.
>>>> In this scenario, print message for unsupported rev ID and apply
>>>> settings for latest rev ID available.
>>>>
>>>> Fixes: ("drm/i915/tgl: Fix stepping WA matching")
>>>> Cc: José Roberto de Souza <jose.souza@intel.com>
>>>> Cc: Matt Roper <matthew.d.roper@intel.com>
>>>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
>>>> 1 file changed, 29 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>>> index 15be8debae54..29d55b7017be 100644
>>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>>> @@ -1572,16 +1572,37 @@ enum {
>>>> TGL_REVID_D0,
>>>> };
>>>>
>>>> -extern const struct i915_rev_steppings tgl_uy_revids[];
>>>> -extern const struct i915_rev_steppings tgl_revids[];
>>>> +extern const struct i915_rev_steppings tgl_uy_revids[4];
>>>> +extern const struct i915_rev_steppings tgl_revids[2];
>>>
>>> Just a quick note, the compiler does not check that the size in the
>>> extern declaration matches the size in the array definition. So you
>>> might end up with a mismatch without noticing.
>
>Yes.. We will have to take care of it if we are adding rev id to array table(which mostly
>should remain a const once we decide to go upstream). Without this declaration, I cannot
>use ARRAY_SIZE() macro with revid arrays as the sizeof() operator complains about not
>knowing the size of the array in question as it is an extern declaration.
>
>So, I don't know what other approach you want to suggest? If we move all the array tables to i915_drv.h(which
>I feel would be a better approach rather than having it in intel_workarounds.c), Matt
>Roper's KBL patch says that compiler complains about unused variables.
adding the table in the header means that each compilation unit (.o)
will get a copy of the table when it includes the header (it will end up
being trimmed out if not used though). This is not what you want.
As I said in the other reply, sizeof does actually work here:
$ cat /tmp/a.c
#include <stdio.h>
#include "b.h"
int main(int argc, const char *argv[])
{
printf("%zu", sizeof(tgl_uy_revids));
return 0;
}
$ cat /tmp/b.h
#pragma once
struct i915_rev_steppings { int a; };
extern const struct i915_rev_steppings tgl_uy_revids[4];
$ cat /tmp/b.c
#include "b.h"
const struct i915_rev_steppings tgl_uy_revids[] = {
{ 10 },
{ 20 },
{ 30 },
{ 40 },
};
And compiler also warns if in the *definition* of tgl_uy_revids it goes
over the amount of space of the declaration. For clarity, you may
however want to add a define to tell the size:
-extern const struct i915_rev_steppings tgl_uy_revids[4];
+#define TGL_UY_REVIDS_SIZE 4
+extern const struct i915_rev_steppings tgl_uy_revids[TGL_UY_REVIDS_SIZE];
and do the same in the .c
>
>We are anyhow going to correct the whole thing with your stepping series anyway. This is supposed
>to be a stop gap fix. Revids shouldn't be changing for TGL anymore.
>
>>
>> What surprised me is that this defeated the __must_be_array() check.
>> I thought these were just pointers to C
>>
>>>> +#define TGL_UY_REVID_RANGE(revid) \
>>>> + ((revid) < ARRAY_SIZE(tgl_uy_revids))
>>>> +
>>>> +#define TGL_REVID_RANGE(revid) \
>>>> + ((revid) < ARRAY_SIZE(tgl_revids))
>>>>
>>>> static inline const struct i915_rev_steppings *
>>>> tgl_revids_get(struct drm_i915_private *dev_priv)
>>>> {
>>>> - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
>>>> - return tgl_uy_revids;
>>>> - else
>>>> - return tgl_revids;
>>>> + const u8 revid = INTEL_REVID(dev_priv);
>>>> +
>>>> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>>>> + if (TGL_UY_REVID_RANGE(revid)) {
>>>> + return tgl_uy_revids + revid;
>>>> + } else {
>>>> + drm_dbg_kms(&dev_priv->drm,
>>>> + "Unsupported SOC stepping found %u, using %lu instead\n",
>>>> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
>>
>> Also please don't have a dbg for every single IS_TGL_*_REVID
>> invocation. And this is not _kms, but driver; better yet, don't bother
>> with a drm_dbg_kms here at all.
>>
>> If you want to actually check, add something like
>> intel_detect_preproduction_hw() and warn about unknown future revids.
>> Or include the info when we print the revid in the caps.
>
>So, what you are suggesting is add an info print in that function intel_detect_preproduction_hw() right?
>Or something else?
>
>> -Chris
>>
>
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 17:51 ` Aditya Swarup
2020-11-25 18:36 ` Ville Syrjälä
2020-11-25 19:18 ` Lucas De Marchi
@ 2020-11-25 19:29 ` Lucas De Marchi
2020-11-25 19:34 ` Aditya Swarup
2020-11-25 20:14 ` Chris Wilson
3 siblings, 1 reply; 24+ messages in thread
From: Lucas De Marchi @ 2020-11-25 19:29 UTC (permalink / raw)
To: Aditya Swarup; +Cc: Jani Nikula, intel-gfx, Chris Wilson
On Wed, Nov 25, 2020 at 09:51:04AM -0800, Aditya Swarup wrote:
>On 11/25/20 7:33 AM, Chris Wilson wrote:
>> Quoting Jani Nikula (2020-11-25 11:45:56)
>>> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
>>>> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>>>> + if (TGL_UY_REVID_RANGE(revid)) {
>>>> + return tgl_uy_revids + revid;
>>>> + } else {
>>>> + drm_dbg_kms(&dev_priv->drm,
>>>> + "Unsupported SOC stepping found %u, using %lu instead\n",
>>>> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
>>
>> Also please don't have a dbg for every single IS_TGL_*_REVID
>> invocation. And this is not _kms, but driver; better yet, don't bother
>> with a drm_dbg_kms here at all.
>>
>> If you want to actually check, add something like
>> intel_detect_preproduction_hw() and warn about unknown future revids.
>> Or include the info when we print the revid in the caps.
>
>So, what you are suggesting is add an info print in that function intel_detect_preproduction_hw() right?
>Or something else?
since this is all going away soon, just removing the dbg would be ok
And in that case, just doing something like below would be shorter and
clearer IMO (untested):
if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
arr = tgl_uy_revids;
size = ARRAY_SIZE(tgl_uy_revids);
} else {
arr = tgl_revids;
size = ARRAY_SIZE(tgl_revids);
}
revid = min(revid, size - 1);
return &arr[revid];
That may also be 2 patches: one adding the revid so we actually apply
the correct workarounds (this needs the "Fixes" tag) and the other to
add the bounds check.
Lucas De Marchi
>
>> -Chris
>>
>
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 19:18 ` Lucas De Marchi
@ 2020-11-25 19:30 ` Aditya Swarup
2020-11-25 19:52 ` Lucas De Marchi
0 siblings, 1 reply; 24+ messages in thread
From: Aditya Swarup @ 2020-11-25 19:30 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Jani Nikula, intel-gfx, Chris Wilson
On 11/25/20 11:18 AM, Lucas De Marchi wrote:
> On Wed, Nov 25, 2020 at 09:51:04AM -0800, Aditya Swarup wrote:
>> On 11/25/20 7:33 AM, Chris Wilson wrote:
>>> Quoting Jani Nikula (2020-11-25 11:45:56)
>>>> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
>>>>> Fix TGL REVID macros to fetch correct display/gt stepping based
>>>>> on SOC rev id from INTEL_REVID() macro. Previously, we were just
>>>>> returning the first element of the revid array instead of using
>>>>> the correct index based on SOC rev id.
>>>>>
>>>>> Also, add array bound checks for TGL REV ID array. Since, there
>>>>> might be a possibility of using older kernels on latest platform
>>>>> revision, resulting in out of bounds access for rev ID array.
>>>>> In this scenario, print message for unsupported rev ID and apply
>>>>> settings for latest rev ID available.
>>>>>
>>>>> Fixes: ("drm/i915/tgl: Fix stepping WA matching")
>>>>> Cc: José Roberto de Souza <jose.souza@intel.com>
>>>>> Cc: Matt Roper <matthew.d.roper@intel.com>
>>>>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>>>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>>> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
>>>>> ---
>>>>> drivers/gpu/drm/i915/i915_drv.h | 35 +++++++++++++++++++++++++++------
>>>>> 1 file changed, 29 insertions(+), 6 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>>>>> index 15be8debae54..29d55b7017be 100644
>>>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>>>> @@ -1572,16 +1572,37 @@ enum {
>>>>> TGL_REVID_D0,
>>>>> };
>>>>>
>>>>> -extern const struct i915_rev_steppings tgl_uy_revids[];
>>>>> -extern const struct i915_rev_steppings tgl_revids[];
>>>>> +extern const struct i915_rev_steppings tgl_uy_revids[4];
>>>>> +extern const struct i915_rev_steppings tgl_revids[2];
>>>>
>>>> Just a quick note, the compiler does not check that the size in the
>>>> extern declaration matches the size in the array definition. So you
>>>> might end up with a mismatch without noticing.
>>
>> Yes.. We will have to take care of it if we are adding rev id to array table(which mostly
>> should remain a const once we decide to go upstream). Without this declaration, I cannot
>> use ARRAY_SIZE() macro with revid arrays as the sizeof() operator complains about not
>> knowing the size of the array in question as it is an extern declaration.
>>
>> So, I don't know what other approach you want to suggest? If we move all the array tables to i915_drv.h(which
>> I feel would be a better approach rather than having it in intel_workarounds.c), Matt
>> Roper's KBL patch says that compiler complains about unused variables.
>
> adding the table in the header means that each compilation unit (.o)
> will get a copy of the table when it includes the header (it will end up
> being trimmed out if not used though). This is not what you want.
>
> As I said in the other reply, sizeof does actually work here:
The question is not about sizeof() not working but rather the usage of ARRAY_SIZE()
macro in i915_drv.h with just extern declaration without size specified.
>
> $ cat /tmp/a.c
> #include <stdio.h>
>
> #include "b.h"
>
> int main(int argc, const char *argv[])
> {
> printf("%zu", sizeof(tgl_uy_revids));
> return 0;
> }
>
> $ cat /tmp/b.h
> #pragma once
>
> struct i915_rev_steppings { int a; };
> extern const struct i915_rev_steppings tgl_uy_revids[4];
You are specifying the size in the extern declaration which will make the ARRAY_SIZE()
macro work if used in the header else it will complain.
>
> $ cat /tmp/b.c
> #include "b.h"
>
> const struct i915_rev_steppings tgl_uy_revids[] = {
> { 10 },
> { 20 },
> { 30 },
> { 40 },
> };
>
> And compiler also warns if in the *definition* of tgl_uy_revids it goes
> over the amount of space of the declaration. For clarity, you may
> however want to add a define to tell the size:
>
>
> -extern const struct i915_rev_steppings tgl_uy_revids[4];
> +#define TGL_UY_REVIDS_SIZE 4
> +extern const struct i915_rev_steppings tgl_uy_revids[TGL_UY_REVIDS_SIZE];
>
> and do the same in the .c
I will go ahead with this approach.
Aditya
>
>>
>> We are anyhow going to correct the whole thing with your stepping series anyway. This is supposed
>> to be a stop gap fix. Revids shouldn't be changing for TGL anymore.
>>
>>>
>>> What surprised me is that this defeated the __must_be_array() check.
>>> I thought these were just pointers to C
>>>
>>>>> +#define TGL_UY_REVID_RANGE(revid) \
>>>>> + ((revid) < ARRAY_SIZE(tgl_uy_revids))
>>>>> +
>>>>> +#define TGL_REVID_RANGE(revid) \
>>>>> + ((revid) < ARRAY_SIZE(tgl_revids))
>>>>>
>>>>> static inline const struct i915_rev_steppings *
>>>>> tgl_revids_get(struct drm_i915_private *dev_priv)
>>>>> {
>>>>> - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
>>>>> - return tgl_uy_revids;
>>>>> - else
>>>>> - return tgl_revids;
>>>>> + const u8 revid = INTEL_REVID(dev_priv);
>>>>> +
>>>>> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>>>>> + if (TGL_UY_REVID_RANGE(revid)) {
>>>>> + return tgl_uy_revids + revid;
>>>>> + } else {
>>>>> + drm_dbg_kms(&dev_priv->drm,
>>>>> + "Unsupported SOC stepping found %u, using %lu instead\n",
>>>>> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
>>>
>>> Also please don't have a dbg for every single IS_TGL_*_REVID
>>> invocation. And this is not _kms, but driver; better yet, don't bother
>>> with a drm_dbg_kms here at all.
>>>
>>> If you want to actually check, add something like
>>> intel_detect_preproduction_hw() and warn about unknown future revids.
>>> Or include the info when we print the revid in the caps.
>>
>> So, what you are suggesting is add an info print in that function intel_detect_preproduction_hw() right?
>> Or something else?
>>
>>> -Chris
>>>
>>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 19:29 ` Lucas De Marchi
@ 2020-11-25 19:34 ` Aditya Swarup
0 siblings, 0 replies; 24+ messages in thread
From: Aditya Swarup @ 2020-11-25 19:34 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Jani Nikula, intel-gfx, Chris Wilson
On 11/25/20 11:29 AM, Lucas De Marchi wrote:
> On Wed, Nov 25, 2020 at 09:51:04AM -0800, Aditya Swarup wrote:
>> On 11/25/20 7:33 AM, Chris Wilson wrote:
>>> Quoting Jani Nikula (2020-11-25 11:45:56)
>>>> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
>>>>> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
>>>>> + if (TGL_UY_REVID_RANGE(revid)) {
>>>>> + return tgl_uy_revids + revid;
>>>>> + } else {
>>>>> + drm_dbg_kms(&dev_priv->drm,
>>>>> + "Unsupported SOC stepping found %u, using %lu instead\n",
>>>>> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
>>>
>>> Also please don't have a dbg for every single IS_TGL_*_REVID
>>> invocation. And this is not _kms, but driver; better yet, don't bother
>>> with a drm_dbg_kms here at all.
>>>
>>> If you want to actually check, add something like
>>> intel_detect_preproduction_hw() and warn about unknown future revids.
>>> Or include the info when we print the revid in the caps.
>>
>> So, what you are suggesting is add an info print in that function intel_detect_preproduction_hw() right?
>> Or something else?
>
> since this is all going away soon, just removing the dbg would be ok
>
> And in that case, just doing something like below would be shorter and
> clearer IMO (untested):
>
> if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> arr = tgl_uy_revids;
> size = ARRAY_SIZE(tgl_uy_revids);
> } else {
> arr = tgl_revids;
> size = ARRAY_SIZE(tgl_revids);
> }
>
> revid = min(revid, size - 1);
>
> return &arr[revid];
>
> That may also be 2 patches: one adding the revid so we actually apply
> the correct workarounds (this needs the "Fixes" tag) and the other to
> add the bounds check.
Thanks for the suggestion. I will implement it this way.
Aditya
>
> Lucas De Marchi
>
>>
>>> -Chris
>>>
>>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 19:30 ` Aditya Swarup
@ 2020-11-25 19:52 ` Lucas De Marchi
0 siblings, 0 replies; 24+ messages in thread
From: Lucas De Marchi @ 2020-11-25 19:52 UTC (permalink / raw)
To: Aditya Swarup; +Cc: Jani Nikula, intel-gfx, Chris Wilson
On Wed, Nov 25, 2020 at 11:30:44AM -0800, Aditya Swarup wrote:
>> As I said in the other reply, sizeof does actually work here:
>
>The question is not about sizeof() not working but rather the usage of ARRAY_SIZE()
>macro in i915_drv.h with just extern declaration without size specified.
ARRAY_SIZE() is just sizeof(arr)/sizeof(*arr) with additional
shenanigans to check for misuse: when used with a pointer rather than an
array:
int b[0];
int *a = b;
or
void foo(int a[10])
In these cases ARRAY_SIZE(a) will not do what you expect and the macro
warns about it, because sizeof(a) will be sizeof(int *) instead of the
array size.
>
>>
>> $ cat /tmp/a.c
>> #include <stdio.h>
>>
>> #include "b.h"
>>
>> int main(int argc, const char *argv[])
>> {
>> printf("%zu", sizeof(tgl_uy_revids));
>> return 0;
>> }
>>
>> $ cat /tmp/b.h
>> #pragma once
>>
>> struct i915_rev_steppings { int a; };
>> extern const struct i915_rev_steppings tgl_uy_revids[4];
>
>You are specifying the size in the extern declaration which will make the ARRAY_SIZE()
>macro work if used in the header else it will complain.
as it should
Lucas De Marchi
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
2020-11-25 17:51 ` Aditya Swarup
` (2 preceding siblings ...)
2020-11-25 19:29 ` Lucas De Marchi
@ 2020-11-25 20:14 ` Chris Wilson
3 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2020-11-25 20:14 UTC (permalink / raw)
To: Aditya Swarup, Jani Nikula, intel-gfx; +Cc: Lucas De Marchi
Quoting Aditya Swarup (2020-11-25 17:51:04)
> On 11/25/20 7:33 AM, Chris Wilson wrote:
> > Quoting Jani Nikula (2020-11-25 11:45:56)
> >> On Tue, 24 Nov 2020, Aditya Swarup <aditya.swarup@intel.com> wrote:
> >>> static inline const struct i915_rev_steppings *
> >>> tgl_revids_get(struct drm_i915_private *dev_priv)
> >>> {
> >>> - if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv))
> >>> - return tgl_uy_revids;
> >>> - else
> >>> - return tgl_revids;
> >>> + const u8 revid = INTEL_REVID(dev_priv);
> >>> +
> >>> + if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> >>> + if (TGL_UY_REVID_RANGE(revid)) {
> >>> + return tgl_uy_revids + revid;
> >>> + } else {
> >>> + drm_dbg_kms(&dev_priv->drm,
> >>> + "Unsupported SOC stepping found %u, using %lu instead\n",
> >>> + revid, ARRAY_SIZE(tgl_uy_revids) - 1);
> >
> > Also please don't have a dbg for every single IS_TGL_*_REVID
> > invocation. And this is not _kms, but driver; better yet, don't bother
> > with a drm_dbg_kms here at all.
> >
> > If you want to actually check, add something like
> > intel_detect_preproduction_hw() and warn about unknown future revids.
> > Or include the info when we print the revid in the caps.
>
> So, what you are suggesting is add an info print in that function intel_detect_preproduction_hw() right?
> Or something else?
I wouldn't put it in detect_preproduction, just using that as an example
of when we do probes for unexpected revids. E.g.,
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ca16ea541ecc..f1ff5509c23a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -273,6 +273,21 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
}
}
+/*
+ * HW that is more recent than the kernel runs the risk of us applying
+ * stale and disruptive w/a. Leave a debug tell-tale just in case.
+ */
+static void intel_detect_unknown_hw(struct drm_i915_private *dev_priv)
+{
+ bool post = false;
+
+ if (post) {
+ drm_dbg(&dev_priv->drm,
+ "This machine is more recent than the w/a database!\n");
+ add_taint(TAINT_MACHINE_CHECK, LOCKDEP_STILL_OK);
+ }
+}
+
static void sanitize_gpu(struct drm_i915_private *i915)
{
if (!INTEL_INFO(i915)->gpu_reset_clobbers_display)
@@ -343,6 +358,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
intel_init_audio_hooks(dev_priv);
intel_detect_preproduction_hw(dev_priv);
+ intel_detect_unknown_hw(dev_priv);
return 0;
The taint is probably not justified in this case.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping (rev2)
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
` (7 preceding siblings ...)
2020-11-25 13:21 ` Souza, Jose
@ 2020-11-25 23:09 ` Patchwork
8 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2020-11-25 23:09 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping (rev2)
URL : https://patchwork.freedesktop.org/series/84238/
State : failure
== Summary ==
Applying: drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
error: sha1 information is lacking or useless (drivers/gpu/drm/i915/i915_drv.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2020-11-25 23:09 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-25 0:31 [Intel-gfx] [PATCH] drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping Aditya Swarup
2020-11-25 1:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-11-25 1:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-25 1:39 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-11-25 3:38 ` [Intel-gfx] [PATCH] " kernel test robot
2020-11-25 3:38 ` kernel test robot
2020-11-25 5:38 ` kernel test robot
2020-11-25 5:38 ` kernel test robot
2020-11-25 6:14 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
2020-11-25 11:45 ` [Intel-gfx] [PATCH] " Jani Nikula
2020-11-25 15:33 ` Chris Wilson
2020-11-25 17:51 ` Aditya Swarup
2020-11-25 18:36 ` Ville Syrjälä
2020-11-25 19:18 ` Lucas De Marchi
2020-11-25 19:30 ` Aditya Swarup
2020-11-25 19:52 ` Lucas De Marchi
2020-11-25 19:29 ` Lucas De Marchi
2020-11-25 19:34 ` Aditya Swarup
2020-11-25 20:14 ` Chris Wilson
2020-11-25 19:01 ` Lucas De Marchi
2020-11-25 13:21 ` Souza, Jose
2020-11-25 18:03 ` Aditya Swarup
2020-11-25 18:26 ` Souza, Jose
2020-11-25 23:09 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/tgl: Fix REVID macros for TGL to fetch correct stepping (rev2) Patchwork
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