* [PATCH] RISC-V: Define get_cycles64() regardless of M-mode
@ 2020-11-25 19:57 ` Palmer Dabbelt
0 siblings, 0 replies; 4+ messages in thread
From: Palmer Dabbelt @ 2020-11-25 19:57 UTC (permalink / raw)
To: linux-riscv
Cc: Paul Walmsley, Palmer Dabbelt, aou, Anup Patel, Atish Patra,
daniel.lezcano, linux-riscv, linux-kernel, kernel-team,
Palmer Dabbelt, kernel test robot
From: Palmer Dabbelt <palmerdabbelt@google.com>
The timer driver uses get_cycles64() unconditionally to obtain the current
time. A recent refactoring lost the common definition for some configs, which
is now the only one we need.
Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
arch/riscv/include/asm/timex.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/timex.h b/arch/riscv/include/asm/timex.h
index ab104905d4db..81de51e6aa32 100644
--- a/arch/riscv/include/asm/timex.h
+++ b/arch/riscv/include/asm/timex.h
@@ -60,6 +60,8 @@ static inline u32 get_cycles_hi(void)
}
#define get_cycles_hi get_cycles_hi
+#endif /* !CONFIG_RISCV_M_MODE */
+
#ifdef CONFIG_64BIT
static inline u64 get_cycles64(void)
{
@@ -79,8 +81,6 @@ static inline u64 get_cycles64(void)
}
#endif /* CONFIG_64BIT */
-#endif /* !CONFIG_RISCV_M_MODE */
-
#define ARCH_HAS_READ_CURRENT_TIMER
static inline int read_current_timer(unsigned long *timer_val)
{
--
2.29.2.454.gaff20da3a2-goog
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH] RISC-V: Define get_cycles64() regardless of M-mode
@ 2020-11-25 19:57 ` Palmer Dabbelt
0 siblings, 0 replies; 4+ messages in thread
From: Palmer Dabbelt @ 2020-11-25 19:57 UTC (permalink / raw)
To: linux-riscv
Cc: aou, daniel.lezcano, Anup Patel, linux-kernel, Atish Patra,
Palmer Dabbelt, Paul Walmsley, Palmer Dabbelt, linux-riscv,
kernel-team, kernel test robot
From: Palmer Dabbelt <palmerdabbelt@google.com>
The timer driver uses get_cycles64() unconditionally to obtain the current
time. A recent refactoring lost the common definition for some configs, which
is now the only one we need.
Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
arch/riscv/include/asm/timex.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/timex.h b/arch/riscv/include/asm/timex.h
index ab104905d4db..81de51e6aa32 100644
--- a/arch/riscv/include/asm/timex.h
+++ b/arch/riscv/include/asm/timex.h
@@ -60,6 +60,8 @@ static inline u32 get_cycles_hi(void)
}
#define get_cycles_hi get_cycles_hi
+#endif /* !CONFIG_RISCV_M_MODE */
+
#ifdef CONFIG_64BIT
static inline u64 get_cycles64(void)
{
@@ -79,8 +81,6 @@ static inline u64 get_cycles64(void)
}
#endif /* CONFIG_64BIT */
-#endif /* !CONFIG_RISCV_M_MODE */
-
#define ARCH_HAS_READ_CURRENT_TIMER
static inline int read_current_timer(unsigned long *timer_val)
{
--
2.29.2.454.gaff20da3a2-goog
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] RISC-V: Define get_cycles64() regardless of M-mode
2020-11-25 19:57 ` Palmer Dabbelt
@ 2020-11-25 22:23 ` Atish Patra
-1 siblings, 0 replies; 4+ messages in thread
From: Atish Patra @ 2020-11-25 22:23 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: linux-riscv, Albert Ou, Daniel Lezcano, Anup Patel,
linux-kernel@vger.kernel.org List, Atish Patra, Paul Walmsley,
Palmer Dabbelt, kernel-team, kernel test robot
On Wed, Nov 25, 2020 at 11:58 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> From: Palmer Dabbelt <palmerdabbelt@google.com>
>
> The timer driver uses get_cycles64() unconditionally to obtain the current
> time. A recent refactoring lost the common definition for some configs, which
> is now the only one we need.
>
> Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
> ---
> arch/riscv/include/asm/timex.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/include/asm/timex.h b/arch/riscv/include/asm/timex.h
> index ab104905d4db..81de51e6aa32 100644
> --- a/arch/riscv/include/asm/timex.h
> +++ b/arch/riscv/include/asm/timex.h
> @@ -60,6 +60,8 @@ static inline u32 get_cycles_hi(void)
> }
> #define get_cycles_hi get_cycles_hi
>
> +#endif /* !CONFIG_RISCV_M_MODE */
> +
> #ifdef CONFIG_64BIT
> static inline u64 get_cycles64(void)
> {
> @@ -79,8 +81,6 @@ static inline u64 get_cycles64(void)
> }
> #endif /* CONFIG_64BIT */
>
> -#endif /* !CONFIG_RISCV_M_MODE */
> -
> #define ARCH_HAS_READ_CURRENT_TIMER
> static inline int read_current_timer(unsigned long *timer_val)
> {
> --
> 2.29.2.454.gaff20da3a2-goog
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Reviewed-by: Atish Patra <atish.patra@wdc.com>
--
Regards,
Atish
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] RISC-V: Define get_cycles64() regardless of M-mode
@ 2020-11-25 22:23 ` Atish Patra
0 siblings, 0 replies; 4+ messages in thread
From: Atish Patra @ 2020-11-25 22:23 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Albert Ou, Daniel Lezcano, Anup Patel,
linux-kernel@vger.kernel.org List, Atish Patra, Paul Walmsley,
Palmer Dabbelt, linux-riscv, kernel-team, kernel test robot
On Wed, Nov 25, 2020 at 11:58 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> From: Palmer Dabbelt <palmerdabbelt@google.com>
>
> The timer driver uses get_cycles64() unconditionally to obtain the current
> time. A recent refactoring lost the common definition for some configs, which
> is now the only one we need.
>
> Fixes: d5be89a8d118 ("RISC-V: Resurrect the MMIO timer implementation for M-mode systems")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
> ---
> arch/riscv/include/asm/timex.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/include/asm/timex.h b/arch/riscv/include/asm/timex.h
> index ab104905d4db..81de51e6aa32 100644
> --- a/arch/riscv/include/asm/timex.h
> +++ b/arch/riscv/include/asm/timex.h
> @@ -60,6 +60,8 @@ static inline u32 get_cycles_hi(void)
> }
> #define get_cycles_hi get_cycles_hi
>
> +#endif /* !CONFIG_RISCV_M_MODE */
> +
> #ifdef CONFIG_64BIT
> static inline u64 get_cycles64(void)
> {
> @@ -79,8 +81,6 @@ static inline u64 get_cycles64(void)
> }
> #endif /* CONFIG_64BIT */
>
> -#endif /* !CONFIG_RISCV_M_MODE */
> -
> #define ARCH_HAS_READ_CURRENT_TIMER
> static inline int read_current_timer(unsigned long *timer_val)
> {
> --
> 2.29.2.454.gaff20da3a2-goog
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Reviewed-by: Atish Patra <atish.patra@wdc.com>
--
Regards,
Atish
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-11-25 22:23 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-25 19:57 [PATCH] RISC-V: Define get_cycles64() regardless of M-mode Palmer Dabbelt
2020-11-25 19:57 ` Palmer Dabbelt
2020-11-25 22:23 ` Atish Patra
2020-11-25 22:23 ` Atish Patra
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.