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From: Sieng Piaw Liew <liew.s.piaw@gmail.com>
To: Tudor.Ambarus@microchip.com
Cc: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D
Date: Tue, 8 Dec 2020 09:19:38 +0800	[thread overview]
Message-ID: <20201208011938.GB12175@DESKTOP-8REGVGF.localdomain> (raw)
In-Reply-To: <cc1a8c52-6319-2d37-8df8-f6205bdbfb37@microchip.com>

On Mon, Dec 07, 2020 at 05:53:20PM +0000, Tudor.Ambarus@microchip.com wrote:
> Hi, Sieng,
> 
> On 12/7/20 4:46 AM, Sieng Piaw Liew wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > Enable 4-bit Block Protect support for MX256405D and its variants using
> > the same ID.
> > 
> > Tested on Innacom W3400V6 router with MX25L6406E chip.
> 
> :) What kind of tests did you exactly make?

OpenWrt cannot write into spi-nor after first boot.
After hacking 4-bit BP support into OpenWrt's kernel v5.4, writing works.

> 
> > https://github.com/openwrt/openwrt/pull/3501
> > 
> > Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com>
> > ---
> >  drivers/mtd/spi-nor/macronix.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
> > index 9203abaac229..7aa8b1ee9daa 100644
> > --- a/drivers/mtd/spi-nor/macronix.c
> > +++ b/drivers/mtd/spi-nor/macronix.c
> > @@ -42,7 +42,8 @@ static const struct flash_info macronix_parts[] = {
> >         { "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },
> >         { "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
> >         { "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
> > -       { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
> > +       { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128,
> > +                             SECT_4K | SPI_NOR_4BIT_BP) },
> 
> I assume this won't work because it misses the SPI_NOR_HAS_LOCK flag.
> 
> Cheers,
> ta

Yes, I'll have v2 patch sent shortly.

> 
> >         { "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4, SECT_4K) },
> >         { "mx25u3235f",  INFO(0xc22536, 0, 64 * 1024,  64,
> >                               SECT_4K | SPI_NOR_DUAL_READ |
> > --
> > 2.17.1
> > 
> 

WARNING: multiple messages have this Message-ID (diff)
From: Sieng Piaw Liew <liew.s.piaw@gmail.com>
To: Tudor.Ambarus@microchip.com
Cc: richard@nod.at, linux-mtd@lists.infradead.org, vigneshr@ti.com,
	linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com
Subject: Re: [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D
Date: Tue, 8 Dec 2020 09:19:38 +0800	[thread overview]
Message-ID: <20201208011938.GB12175@DESKTOP-8REGVGF.localdomain> (raw)
In-Reply-To: <cc1a8c52-6319-2d37-8df8-f6205bdbfb37@microchip.com>

On Mon, Dec 07, 2020 at 05:53:20PM +0000, Tudor.Ambarus@microchip.com wrote:
> Hi, Sieng,
> 
> On 12/7/20 4:46 AM, Sieng Piaw Liew wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > Enable 4-bit Block Protect support for MX256405D and its variants using
> > the same ID.
> > 
> > Tested on Innacom W3400V6 router with MX25L6406E chip.
> 
> :) What kind of tests did you exactly make?

OpenWrt cannot write into spi-nor after first boot.
After hacking 4-bit BP support into OpenWrt's kernel v5.4, writing works.

> 
> > https://github.com/openwrt/openwrt/pull/3501
> > 
> > Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com>
> > ---
> >  drivers/mtd/spi-nor/macronix.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
> > index 9203abaac229..7aa8b1ee9daa 100644
> > --- a/drivers/mtd/spi-nor/macronix.c
> > +++ b/drivers/mtd/spi-nor/macronix.c
> > @@ -42,7 +42,8 @@ static const struct flash_info macronix_parts[] = {
> >         { "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },
> >         { "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, SECT_4K) },
> >         { "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64, SECT_4K) },
> > -       { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
> > +       { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128,
> > +                             SECT_4K | SPI_NOR_4BIT_BP) },
> 
> I assume this won't work because it misses the SPI_NOR_HAS_LOCK flag.
> 
> Cheers,
> ta

Yes, I'll have v2 patch sent shortly.

> 
> >         { "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4, SECT_4K) },
> >         { "mx25u3235f",  INFO(0xc22536, 0, 64 * 1024,  64,
> >                               SECT_4K | SPI_NOR_DUAL_READ |
> > --
> > 2.17.1
> > 
> 

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  reply	other threads:[~2020-12-08  1:20 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-07  2:46 [PATCH] mtd: spi-nor: macronix: enable 4-bit BP support for MX25L6405D Sieng Piaw Liew
2020-12-07  2:46 ` Sieng Piaw Liew
2020-12-07 17:53 ` Tudor.Ambarus
2020-12-07 17:53   ` Tudor.Ambarus
2020-12-08  1:19   ` Sieng Piaw Liew [this message]
2020-12-08  1:19     ` Sieng Piaw Liew
2020-12-08  1:57     ` [PATCH v2] " Sieng Piaw Liew
2020-12-08  1:57       ` Sieng Piaw Liew
2021-01-23 12:18       ` Tudor.Ambarus
2021-01-23 12:18         ` Tudor.Ambarus
2021-01-23 13:04         ` Michael Walle
2021-01-23 13:04           ` Michael Walle

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