* [PATCH 1/5] drm/amd/pm: correct the gpo control for sienna cichlid
@ 2020-12-09 4:18 Evan Quan
2020-12-09 4:18 ` [PATCH 2/5] drm/amd/pm: expose the firmware_capability from firmware_info table Evan Quan
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Evan Quan @ 2020-12-09 4:18 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
New SMC message was introduced for gpo control on sienna cichlid.
Change-Id: I6f09ae96e9dd7a290c9975564740f597a08ff2fa
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/pm/inc/smu_types.h | 1 +
.../gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h | 4 +-
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 42 ++++++++++++++-----
3 files changed, 36 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_types.h b/drivers/gpu/drm/amd/pm/inc/smu_types.h
index 745b04730428..c79ad184503e 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_types.h
@@ -209,6 +209,7 @@
__SMU_DUMMY_MAP(SetSoftMinCclk), \
__SMU_DUMMY_MAP(SetSoftMaxCclk), \
__SMU_DUMMY_MAP(SetGpoFeaturePMask), \
+ __SMU_DUMMY_MAP(DisallowGpo), \
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h
index 35dd6072cc45..dad2832ff3b1 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h
@@ -134,6 +134,8 @@
#define PPSMC_MSG_SetGpoFeaturePMask 0x45
#define PPSMC_MSG_SetSMBUSInterrupt 0x46
-#define PPSMC_Message_Count 0x47
+#define PPSMC_MSG_DisallowGpo 0x56
+
+#define PPSMC_Message_Count 0x58
#endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 822ddfc42360..7e8aa5f7c0c9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -128,6 +128,7 @@ static struct cmn2asic_msg_mapping sienna_cichlid_message_map[SMU_MSG_MAX_COUNT]
MSG_MAP(Mode1Reset, PPSMC_MSG_Mode1Reset, 0),
MSG_MAP(SetMGpuFanBoostLimitRpm, PPSMC_MSG_SetMGpuFanBoostLimitRpm, 0),
MSG_MAP(SetGpoFeaturePMask, PPSMC_MSG_SetGpoFeaturePMask, 0),
+ MSG_MAP(DisallowGpo, PPSMC_MSG_DisallowGpo, 0),
};
static struct cmn2asic_mapping sienna_cichlid_clk_map[SMU_CLK_COUNT] = {
@@ -3207,19 +3208,40 @@ static int sienna_cichlid_enable_mgpu_fan_boost(struct smu_context *smu)
static int sienna_cichlid_gpo_control(struct smu_context *smu,
bool enablement)
{
+ uint32_t smu_version;
int ret = 0;
+
if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_GFX_GPO_BIT)) {
- if (enablement)
- ret = smu_cmn_send_smc_msg_with_param(smu,
- SMU_MSG_SetGpoFeaturePMask,
- GFX_GPO_PACE_MASK | GFX_GPO_DEM_MASK,
- NULL);
- else
- ret = smu_cmn_send_smc_msg_with_param(smu,
- SMU_MSG_SetGpoFeaturePMask,
- 0,
- NULL);
+ ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+ if (ret)
+ return ret;
+
+ if (enablement) {
+ if (smu_version < 0x003a2500) {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_SetGpoFeaturePMask,
+ GFX_GPO_PACE_MASK | GFX_GPO_DEM_MASK,
+ NULL);
+ } else {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_DisallowGpo,
+ 0,
+ NULL);
+ }
+ } else {
+ if (smu_version < 0x003a2500) {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_SetGpoFeaturePMask,
+ 0,
+ NULL);
+ } else {
+ ret = smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_DisallowGpo,
+ 1,
+ NULL);
+ }
+ }
}
return ret;
--
2.29.0
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/5] drm/amd/pm: expose the firmware_capability from firmware_info table
2020-12-09 4:18 [PATCH 1/5] drm/amd/pm: correct the gpo control for sienna cichlid Evan Quan
@ 2020-12-09 4:18 ` Evan Quan
2020-12-09 4:18 ` [PATCH 3/5] drm/amdgpu: new macro for determining 2ND_USB20PORT support Evan Quan
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Evan Quan @ 2020-12-09 4:18 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
That will help to determine whether 2ND_USB20_PORT workaround is
needed for Sienna Cichlid.
Change-Id: I3852e7c8cb11c12845ca81e7967e332c499cb470
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 971c7fe4af37..cb96466605d5 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -227,6 +227,7 @@ struct smu_bios_boot_up_values
uint32_t content_revision;
uint32_t fclk;
uint32_t lclk;
+ uint32_t firmware_caps;
};
enum smu_table_id
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index f2565eed469f..45ecd0386e9f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -554,6 +554,7 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu)
smu->smu_table.boot_values.vdd_gfx = v_3_1->bootup_vddgfx_mv;
smu->smu_table.boot_values.cooling_id = v_3_1->coolingsolution_id;
smu->smu_table.boot_values.pp_table_id = 0;
+ smu->smu_table.boot_values.firmware_caps = v_3_1->firmware_capability;
break;
case 3:
default:
@@ -569,6 +570,7 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu)
smu->smu_table.boot_values.vdd_gfx = v_3_3->bootup_vddgfx_mv;
smu->smu_table.boot_values.cooling_id = v_3_3->coolingsolution_id;
smu->smu_table.boot_values.pp_table_id = v_3_3->pplib_pptable_id;
+ smu->smu_table.boot_values.firmware_caps = v_3_3->firmware_capability;
}
smu->smu_table.boot_values.format_revision = header->format_revision;
--
2.29.0
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/5] drm/amdgpu: new macro for determining 2ND_USB20PORT support
2020-12-09 4:18 [PATCH 1/5] drm/amd/pm: correct the gpo control for sienna cichlid Evan Quan
2020-12-09 4:18 ` [PATCH 2/5] drm/amd/pm: expose the firmware_capability from firmware_info table Evan Quan
@ 2020-12-09 4:18 ` Evan Quan
2020-12-09 4:18 ` [PATCH 4/5] drm/amd/pm: new SMC message for 2nd usb2.0 port workaround Evan Quan
2020-12-09 4:18 ` [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid " Evan Quan
3 siblings, 0 replies; 7+ messages in thread
From: Evan Quan @ 2020-12-09 4:18 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
Used for determining 2ND_USB20PORT support from firmware_capability.
Change-Id: I3ff37f0a0dab311566bdd0aba189f2b7fa89ec2c
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/include/atomfirmware.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
index c38635992101..3cb8d4c5c1a3 100644
--- a/drivers/gpu/drm/amd/include/atomfirmware.h
+++ b/drivers/gpu/drm/amd/include/atomfirmware.h
@@ -499,6 +499,7 @@ enum atombios_firmware_capability
ATOM_FIRMWARE_CAP_HWEMU_UMC_CFG = 0x00000100,
ATOM_FIRMWARE_CAP_SRAM_ECC = 0x00000200,
ATOM_FIRMWARE_CAP_ENABLE_2STAGE_BIST_TRAINING = 0x00000400,
+ ATOM_FIRMWARE_CAP_ENABLE_2ND_USB20PORT = 0x0008000,
};
enum atom_cooling_solution_id{
--
2.29.0
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 4/5] drm/amd/pm: new SMC message for 2nd usb2.0 port workaround
2020-12-09 4:18 [PATCH 1/5] drm/amd/pm: correct the gpo control for sienna cichlid Evan Quan
2020-12-09 4:18 ` [PATCH 2/5] drm/amd/pm: expose the firmware_capability from firmware_info table Evan Quan
2020-12-09 4:18 ` [PATCH 3/5] drm/amdgpu: new macro for determining 2ND_USB20PORT support Evan Quan
@ 2020-12-09 4:18 ` Evan Quan
2020-12-09 4:18 ` [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid " Evan Quan
3 siblings, 0 replies; 7+ messages in thread
From: Evan Quan @ 2020-12-09 4:18 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
The workaround is needed by sienna cichlid.
Change-Id: Ib3d065b53dcb331d085e9bb9eeda99021a212206
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/pm/inc/smu_types.h | 1 +
drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h | 2 ++
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 1 +
3 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_types.h b/drivers/gpu/drm/amd/pm/inc/smu_types.h
index c79ad184503e..13d332a175fd 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_types.h
@@ -210,6 +210,7 @@
__SMU_DUMMY_MAP(SetSoftMaxCclk), \
__SMU_DUMMY_MAP(SetGpoFeaturePMask), \
__SMU_DUMMY_MAP(DisallowGpo), \
+ __SMU_DUMMY_MAP(Enable2ndUSB20Port), \
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h
index dad2832ff3b1..d2e10a724560 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h
@@ -136,6 +136,8 @@
#define PPSMC_MSG_DisallowGpo 0x56
+#define PPSMC_MSG_Enable2ndUSB20Port 0x57
+
#define PPSMC_Message_Count 0x58
#endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 7e8aa5f7c0c9..47d4f92d5ead 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -129,6 +129,7 @@ static struct cmn2asic_msg_mapping sienna_cichlid_message_map[SMU_MSG_MAX_COUNT]
MSG_MAP(SetMGpuFanBoostLimitRpm, PPSMC_MSG_SetMGpuFanBoostLimitRpm, 0),
MSG_MAP(SetGpoFeaturePMask, PPSMC_MSG_SetGpoFeaturePMask, 0),
MSG_MAP(DisallowGpo, PPSMC_MSG_DisallowGpo, 0),
+ MSG_MAP(Enable2ndUSB20Port, PPSMC_MSG_Enable2ndUSB20Port, 0),
};
static struct cmn2asic_mapping sienna_cichlid_clk_map[SMU_CLK_COUNT] = {
--
2.29.0
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid 2nd usb2.0 port workaround
2020-12-09 4:18 [PATCH 1/5] drm/amd/pm: correct the gpo control for sienna cichlid Evan Quan
` (2 preceding siblings ...)
2020-12-09 4:18 ` [PATCH 4/5] drm/amd/pm: new SMC message for 2nd usb2.0 port workaround Evan Quan
@ 2020-12-09 4:18 ` Evan Quan
2020-12-09 12:26 ` Lazar, Lijo
2020-12-10 2:40 ` Chen, Jiansong (Simon)
3 siblings, 2 replies; 7+ messages in thread
From: Evan Quan @ 2020-12-09 4:18 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander.Deucher, Lijo.Lazar, Evan Quan
Fulfill the 2nd usb2.0 port workaround for sienna cichlid.
Change-Id: Id5a89a468787846ed0050b56cd318a9574185567
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 38 ++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 47d4f92d5ead..74cf027e4a41 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -3247,6 +3247,42 @@ static int sienna_cichlid_gpo_control(struct smu_context *smu,
return ret;
}
+
+static int sienna_cichlid_notify_2nd_usb20_port(struct smu_context *smu)
+{
+ uint32_t smu_version;
+ int ret = 0;
+
+ ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+ if (ret)
+ return ret;
+
+ /*
+ * Message SMU_MSG_Enable2ndUSB20Port is supported by 58.45
+ * onwards PMFWs.
+ */
+ if (smu_version < 0x003A2D00)
+ return 0;
+
+ return smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_Enable2ndUSB20Port,
+ smu->smu_table.boot_values.firmware_caps & ATOM_FIRMWARE_CAP_ENABLE_2ND_USB20PORT ?
+ 1 : 0,
+ NULL);
+}
+
+static int sienna_cichlid_system_features_control(struct smu_context *smu,
+ bool en)
+{
+ int ret = 0;
+
+ ret = sienna_cichlid_notify_2nd_usb20_port(smu);
+ if (ret)
+ return ret;
+
+ return smu_v11_0_system_features_control(smu, en);
+}
+
static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,
.set_default_dpm_table = sienna_cichlid_set_default_dpm_table,
@@ -3287,7 +3323,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.set_driver_table_location = smu_v11_0_set_driver_table_location,
.set_tool_table_location = smu_v11_0_set_tool_table_location,
.notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
- .system_features_control = smu_v11_0_system_features_control,
+ .system_features_control = sienna_cichlid_system_features_control,
.send_smc_msg_with_param = smu_cmn_send_smc_msg_with_param,
.send_smc_msg = smu_cmn_send_smc_msg,
.init_display_count = NULL,
--
2.29.0
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* RE: [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid 2nd usb2.0 port workaround
2020-12-09 4:18 ` [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid " Evan Quan
@ 2020-12-09 12:26 ` Lazar, Lijo
2020-12-10 2:40 ` Chen, Jiansong (Simon)
1 sibling, 0 replies; 7+ messages in thread
From: Lazar, Lijo @ 2020-12-09 12:26 UTC (permalink / raw)
To: Quan, Evan, amd-gfx; +Cc: Deucher, Alexander
[AMD Public Use]
Nitpick - you may want to send the message only during enable workflow. Apart from that,
Series is Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
-----Original Message-----
From: Quan, Evan <Evan.Quan@amd.com>
Sent: Wednesday, December 9, 2020 9:49 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid 2nd usb2.0 port workaround
Fulfill the 2nd usb2.0 port workaround for sienna cichlid.
Change-Id: Id5a89a468787846ed0050b56cd318a9574185567
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 38 ++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 47d4f92d5ead..74cf027e4a41 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -3247,6 +3247,42 @@ static int sienna_cichlid_gpo_control(struct smu_context *smu,
return ret;
}
+
+static int sienna_cichlid_notify_2nd_usb20_port(struct smu_context
+*smu) {
+ uint32_t smu_version;
+ int ret = 0;
+
+ ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+ if (ret)
+ return ret;
+
+ /*
+ * Message SMU_MSG_Enable2ndUSB20Port is supported by 58.45
+ * onwards PMFWs.
+ */
+ if (smu_version < 0x003A2D00)
+ return 0;
+
+ return smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_Enable2ndUSB20Port,
+ smu->smu_table.boot_values.firmware_caps & ATOM_FIRMWARE_CAP_ENABLE_2ND_USB20PORT ?
+ 1 : 0,
+ NULL);
+}
+
+static int sienna_cichlid_system_features_control(struct smu_context *smu,
+ bool en)
+{
+ int ret = 0;
+
+ ret = sienna_cichlid_notify_2nd_usb20_port(smu);
+ if (ret)
+ return ret;
+
+ return smu_v11_0_system_features_control(smu, en); }
+
static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,
.set_default_dpm_table = sienna_cichlid_set_default_dpm_table,
@@ -3287,7 +3323,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.set_driver_table_location = smu_v11_0_set_driver_table_location,
.set_tool_table_location = smu_v11_0_set_tool_table_location,
.notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
- .system_features_control = smu_v11_0_system_features_control,
+ .system_features_control = sienna_cichlid_system_features_control,
.send_smc_msg_with_param = smu_cmn_send_smc_msg_with_param,
.send_smc_msg = smu_cmn_send_smc_msg,
.init_display_count = NULL,
--
2.29.0
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* RE: [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid 2nd usb2.0 port workaround
2020-12-09 4:18 ` [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid " Evan Quan
2020-12-09 12:26 ` Lazar, Lijo
@ 2020-12-10 2:40 ` Chen, Jiansong (Simon)
1 sibling, 0 replies; 7+ messages in thread
From: Chen, Jiansong (Simon) @ 2020-12-10 2:40 UTC (permalink / raw)
To: Quan, Evan, amd-gfx; +Cc: Deucher, Alexander, Lazar, Lijo, Quan, Evan
[AMD Official Use Only - Internal Distribution Only]
Hi Evan,
Besides Navi21, other Navi2x Asics reuse sienna_cichlid_ppt.c and the callbacks, have you taken their user cases into consideration?
Thanks!
Regards,
Jiansong
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Evan Quan
Sent: Wednesday, December 9, 2020 12:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid 2nd usb2.0 port workaround
Fulfill the 2nd usb2.0 port workaround for sienna cichlid.
Change-Id: Id5a89a468787846ed0050b56cd318a9574185567
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 38 ++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 47d4f92d5ead..74cf027e4a41 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -3247,6 +3247,42 @@ static int sienna_cichlid_gpo_control(struct smu_context *smu,
return ret;
}
+
+static int sienna_cichlid_notify_2nd_usb20_port(struct smu_context
+*smu) {
+uint32_t smu_version;
+int ret = 0;
+
+ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
+if (ret)
+return ret;
+
+/*
+ * Message SMU_MSG_Enable2ndUSB20Port is supported by 58.45
+ * onwards PMFWs.
+ */
+if (smu_version < 0x003A2D00)
+return 0;
+
+return smu_cmn_send_smc_msg_with_param(smu,
+ SMU_MSG_Enable2ndUSB20Port,
+ smu->smu_table.boot_values.firmware_caps & ATOM_FIRMWARE_CAP_ENABLE_2ND_USB20PORT ?
+ 1 : 0,
+ NULL);
+}
+
+static int sienna_cichlid_system_features_control(struct smu_context *smu,
+ bool en)
+{
+int ret = 0;
+
+ret = sienna_cichlid_notify_2nd_usb20_port(smu);
+if (ret)
+return ret;
+
+return smu_v11_0_system_features_control(smu, en); }
+
static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,
.set_default_dpm_table = sienna_cichlid_set_default_dpm_table,
@@ -3287,7 +3323,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.set_driver_table_location = smu_v11_0_set_driver_table_location,
.set_tool_table_location = smu_v11_0_set_tool_table_location,
.notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
-.system_features_control = smu_v11_0_system_features_control,
+.system_features_control = sienna_cichlid_system_features_control,
.send_smc_msg_with_param = smu_cmn_send_smc_msg_with_param,
.send_smc_msg = smu_cmn_send_smc_msg,
.init_display_count = NULL,
--
2.29.0
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^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2020-12-10 2:40 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-09 4:18 [PATCH 1/5] drm/amd/pm: correct the gpo control for sienna cichlid Evan Quan
2020-12-09 4:18 ` [PATCH 2/5] drm/amd/pm: expose the firmware_capability from firmware_info table Evan Quan
2020-12-09 4:18 ` [PATCH 3/5] drm/amdgpu: new macro for determining 2ND_USB20PORT support Evan Quan
2020-12-09 4:18 ` [PATCH 4/5] drm/amd/pm: new SMC message for 2nd usb2.0 port workaround Evan Quan
2020-12-09 4:18 ` [PATCH 5/5] drm/amd/pm: fulfill sienna cichlid " Evan Quan
2020-12-09 12:26 ` Lazar, Lijo
2020-12-10 2:40 ` Chen, Jiansong (Simon)
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