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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, Karthik B S <karthik.b.s@intel.com>,
	uma.shankar@intel.com, seanpaul@chromium.org,
	Anshuman Gupta <anshuman.gupta@intel.com>,
	juston.li@intel.com
Subject: [PATCH v8 13/19] drm/hdcp: Max MST content streams
Date: Fri, 11 Dec 2020 19:12:38 +0530	[thread overview]
Message-ID: <20201211134244.14588-14-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201211134244.14588-1-anshuman.gupta@intel.com>

Let's define Maximum MST content streams up to four
generically which can be supported by modern display
controllers.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Tested-by: Karthik B S <karthik.b.s@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 include/drm/drm_hdcp.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index fe58dbb46962..ac22c246542a 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -101,11 +101,11 @@
 
 /* Following Macros take a byte at a time for bit(s) masking */
 /*
- * TODO: This has to be changed for DP MST, as multiple stream on
- * same port is possible.
- * For HDCP2.2 on HDMI and DP SST this value is always 1.
+ * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual
+ * H/W MST streams capacity.
+ * This required to be moved out to platform specific header.
  */
-#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	1
+#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	4
 #define HDCP_2_2_TXCAP_MASK_LEN			2
 #define HDCP_2_2_RXCAPS_LEN			3
 #define HDCP_2_2_RX_REPEATER(x)			((x) & BIT(0))
-- 
2.26.2

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https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, seanpaul@chromium.org
Subject: [Intel-gfx] [PATCH v8 13/19] drm/hdcp: Max MST content streams
Date: Fri, 11 Dec 2020 19:12:38 +0530	[thread overview]
Message-ID: <20201211134244.14588-14-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201211134244.14588-1-anshuman.gupta@intel.com>

Let's define Maximum MST content streams up to four
generically which can be supported by modern display
controllers.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Tested-by: Karthik B S <karthik.b.s@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 include/drm/drm_hdcp.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index fe58dbb46962..ac22c246542a 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -101,11 +101,11 @@
 
 /* Following Macros take a byte at a time for bit(s) masking */
 /*
- * TODO: This has to be changed for DP MST, as multiple stream on
- * same port is possible.
- * For HDCP2.2 on HDMI and DP SST this value is always 1.
+ * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual
+ * H/W MST streams capacity.
+ * This required to be moved out to platform specific header.
  */
-#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	1
+#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT	4
 #define HDCP_2_2_TXCAP_MASK_LEN			2
 #define HDCP_2_2_RXCAPS_LEN			3
 #define HDCP_2_2_RX_REPEATER(x)			((x) & BIT(0))
-- 
2.26.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-12-11 13:57 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-11 13:42 [PATCH v8 00/19] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-12-11 13:42 ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 01/19] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 02/19] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 03/19] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 04/19] drm/i915/hdcp: No HDCP when encoder is't initialized Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-14 14:10   ` Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 05/19] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 06/19] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 07/19] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 08/19] drm/i915/hdcp: Configure HDCP1.4 MST steram encryption status Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 09/19] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 10/19] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 11/19] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 12/19] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` Anshuman Gupta [this message]
2020-12-11 13:42   ` [Intel-gfx] [PATCH v8 13/19] drm/hdcp: Max MST content streams Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 14/19] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 15/19] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 16/19] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-11 13:42 ` [PATCH v8 17/19] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-14 13:32   ` Ramalingam C
2020-12-14 13:32     ` [Intel-gfx] " Ramalingam C
2020-12-11 13:42 ` [PATCH v8 18/19] drm/i915/hdcp: Configure HDCP2.2 MST steram encryption status Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-14 13:35   ` Ramalingam C
2020-12-14 13:35     ` [Intel-gfx] " Ramalingam C
2020-12-11 13:42 ` [PATCH v8 19/19] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-12-11 13:42   ` [Intel-gfx] " Anshuman Gupta
2020-12-14 13:25   ` Ramalingam C
2020-12-14 13:25     ` [Intel-gfx] " Ramalingam C
2020-12-11 15:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev7) Patchwork
2020-12-11 15:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-12-14 15:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev8) Patchwork
2020-12-14 15:37 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork

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