* [PATCH v1 0/1] intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
@ 2020-12-14 22:21 Edgar E. Iglesias
2020-12-14 22:21 ` [PATCH v1 1/1] " Edgar E. Iglesias
2021-01-07 12:02 ` [PATCH v1 0/1] " Peter Maydell
0 siblings, 2 replies; 5+ messages in thread
From: Edgar E. Iglesias @ 2020-12-14 22:21 UTC (permalink / raw)
To: qemu-devel
Cc: damien.hedde, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
frederic.konrad, qemu-arm, figlesia, luc.michel
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Hi,
Found this while debugging an issue with lockups during boot of
Linux on Xen.
In the particular setup, I'm running without EL3 firmware so group0
interrupts are disabled on the physical interface and enabled on the
virtual interface.
Looks like we're checking the wrong CPU_CTLR reg for vCPUs. This fixes
the problem on my side.
Cheers,
Edgar
Edgar E. Iglesias (1):
intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
hw/intc/arm_gic.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v1 1/1] intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
2020-12-14 22:21 [PATCH v1 0/1] intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs Edgar E. Iglesias
@ 2020-12-14 22:21 ` Edgar E. Iglesias
2020-12-14 23:20 ` Philippe Mathieu-Daudé
2020-12-15 10:28 ` Luc Michel
2021-01-07 12:02 ` [PATCH v1 0/1] " Peter Maydell
1 sibling, 2 replies; 5+ messages in thread
From: Edgar E. Iglesias @ 2020-12-14 22:21 UTC (permalink / raw)
To: qemu-devel
Cc: damien.hedde, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
frederic.konrad, qemu-arm, figlesia, luc.michel
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Correct the indexing into s->cpu_ctlr for vCPUs.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
hw/intc/arm_gic.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index c60dc6b5e6..af41e2fb44 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -141,6 +141,8 @@ static inline void gic_get_best_virq(GICState *s, int cpu,
static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt,
int group_mask)
{
+ int cpu_iface = virt ? (cpu + GIC_NCPU) : cpu;
+
if (!virt && !(s->ctlr & group_mask)) {
return false;
}
@@ -149,7 +151,7 @@ static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt,
return false;
}
- if (!(s->cpu_ctlr[cpu] & group_mask)) {
+ if (!(s->cpu_ctlr[cpu_iface] & group_mask)) {
return false;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v1 1/1] intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
2020-12-14 22:21 ` [PATCH v1 1/1] " Edgar E. Iglesias
@ 2020-12-14 23:20 ` Philippe Mathieu-Daudé
2020-12-15 10:28 ` Luc Michel
1 sibling, 0 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-12-14 23:20 UTC (permalink / raw)
To: Edgar E. Iglesias, qemu-devel
Cc: damien.hedde, peter.maydell, Andrew Jones, sstabellini,
edgar.iglesias, sai.pavan.boddu, frasse.iglesias, alistair,
richard.henderson, frederic.konrad, qemu-arm, figlesia,
luc.michel
On 12/14/20 11:21 PM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Correct the indexing into s->cpu_ctlr for vCPUs.
>
Fixes: cbe1282b568 ("intc/arm_gic: Implement gic_update_virt() function")
LGTM but better double-check with GIC specialist ;)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
> hw/intc/arm_gic.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
> index c60dc6b5e6..af41e2fb44 100644
> --- a/hw/intc/arm_gic.c
> +++ b/hw/intc/arm_gic.c
> @@ -141,6 +141,8 @@ static inline void gic_get_best_virq(GICState *s, int cpu,
> static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt,
> int group_mask)
> {
> + int cpu_iface = virt ? (cpu + GIC_NCPU) : cpu;
> +
> if (!virt && !(s->ctlr & group_mask)) {
> return false;
> }
> @@ -149,7 +151,7 @@ static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt,
> return false;
> }
>
> - if (!(s->cpu_ctlr[cpu] & group_mask)) {
> + if (!(s->cpu_ctlr[cpu_iface] & group_mask)) {
> return false;
> }
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 1/1] intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
2020-12-14 22:21 ` [PATCH v1 1/1] " Edgar E. Iglesias
2020-12-14 23:20 ` Philippe Mathieu-Daudé
@ 2020-12-15 10:28 ` Luc Michel
1 sibling, 0 replies; 5+ messages in thread
From: Luc Michel @ 2020-12-15 10:28 UTC (permalink / raw)
To: Edgar E. Iglesias, qemu-devel
Cc: damien.hedde, peter.maydell, sstabellini, edgar.iglesias,
sai.pavan.boddu, frasse.iglesias, alistair, richard.henderson,
frederic.konrad, qemu-arm, figlesia
On 12/14/20 11:21 PM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Correct the indexing into s->cpu_ctlr for vCPUs.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Hi Edgar,
Nice catch! Thanks.
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
--
Luc
> ---
> hw/intc/arm_gic.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
> index c60dc6b5e6..af41e2fb44 100644
> --- a/hw/intc/arm_gic.c
> +++ b/hw/intc/arm_gic.c
> @@ -141,6 +141,8 @@ static inline void gic_get_best_virq(GICState *s, int cpu,
> static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt,
> int group_mask)
> {
> + int cpu_iface = virt ? (cpu + GIC_NCPU) : cpu;
> +
> if (!virt && !(s->ctlr & group_mask)) {
> return false;
> }
> @@ -149,7 +151,7 @@ static inline bool gic_irq_signaling_enabled(GICState *s, int cpu, bool virt,
> return false;
> }
>
> - if (!(s->cpu_ctlr[cpu] & group_mask)) {
> + if (!(s->cpu_ctlr[cpu_iface] & group_mask)) {
> return false;
> }
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v1 0/1] intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
2020-12-14 22:21 [PATCH v1 0/1] intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs Edgar E. Iglesias
2020-12-14 22:21 ` [PATCH v1 1/1] " Edgar E. Iglesias
@ 2021-01-07 12:02 ` Peter Maydell
1 sibling, 0 replies; 5+ messages in thread
From: Peter Maydell @ 2021-01-07 12:02 UTC (permalink / raw)
To: Edgar E. Iglesias
Cc: Damien Hedde, Francisco Eduardo Iglesias, Stefano Stabellini,
Edgar Iglesias, Sai Pavan Boddu, Francisco Iglesias,
Alistair Francis, Richard Henderson, QEMU Developers,
KONRAD Frederic, qemu-arm, Luc Michel
On Mon, 14 Dec 2020 at 22:21, Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
>
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Hi,
>
> Found this while debugging an issue with lockups during boot of
> Linux on Xen.
>
> In the particular setup, I'm running without EL3 firmware so group0
> interrupts are disabled on the physical interface and enabled on the
> virtual interface.
>
> Looks like we're checking the wrong CPU_CTLR reg for vCPUs. This fixes
> the problem on my side.
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-01-07 12:03 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-14 22:21 [PATCH v1 0/1] intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs Edgar E. Iglesias
2020-12-14 22:21 ` [PATCH v1 1/1] " Edgar E. Iglesias
2020-12-14 23:20 ` Philippe Mathieu-Daudé
2020-12-15 10:28 ` Luc Michel
2021-01-07 12:02 ` [PATCH v1 0/1] " Peter Maydell
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