From: Pratyush Yadav <p.yadav@ti.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<broonie@kernel.org>, <robh+dt@kernel.org>, <lukas@wunner.de>,
<bbrezillon@kernel.org>, <tudor.ambarus@microchip.com>,
<linux-spi@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: Re: [PATCH v4 5/9] spi: spi-mem: Mark dummy transfers by setting dummy_data bit
Date: Fri, 18 Dec 2020 14:51:08 +0530 [thread overview]
Message-ID: <20201218092106.skwej2g6bk3oksbb@ti.com> (raw)
In-Reply-To: <1608236927-28701-6-git-send-email-skomatineni@nvidia.com>
Hi Sowjanya,
On 17/12/20 12:28PM, Sowjanya Komatineni wrote:
> This patch marks dummy transfer by setting dummy_data bit to 1.
>
> Controllers supporting dummy transfer by hardware use this bit field
> to skip software transfer of dummy bytes and use hardware dummy bytes
> transfer.
What is the benefit you get from this change? You add complexity in
spi-mem and the controller driver, so that must come with some benefits.
Here I don't see any. The transfer will certainly take the same amount
of time because the number or period of the dummy cycles has not
changed. So why is this needed?
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> drivers/spi/spi-mem.c | 1 +
> include/linux/spi/spi.h | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index f3a3f19..c64371c 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -354,6 +354,7 @@ int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
> xfers[xferpos].len = op->dummy.nbytes;
> xfers[xferpos].tx_nbits = op->dummy.buswidth;
> + xfers[xferpos].dummy_data = 1;
> spi_message_add_tail(&xfers[xferpos], &msg);
> xferpos++;
> totalxferlen += op->dummy.nbytes;
> diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
> index aa09fdc..708f2f5 100644
> --- a/include/linux/spi/spi.h
> +++ b/include/linux/spi/spi.h
> @@ -827,6 +827,7 @@ extern void spi_res_release(struct spi_controller *ctlr,
> * transfer. If 0 the default (from @spi_device) is used.
> * @bits_per_word: select a bits_per_word other than the device default
> * for this transfer. If 0 the default (from @spi_device) is used.
> + * @dummy_data: indicates transfer is dummy bytes transfer.
> * @cs_change: affects chipselect after this transfer completes
> * @cs_change_delay: delay between cs deassert and assert when
> * @cs_change is set and @spi_transfer is not the last in @spi_message
> @@ -939,6 +940,7 @@ struct spi_transfer {
> struct sg_table tx_sg;
> struct sg_table rx_sg;
>
> + unsigned dummy_data:1;
> unsigned cs_change:1;
> unsigned tx_nbits:3;
> unsigned rx_nbits:3;
> --
> 2.7.4
>
--
Regards,
Pratyush Yadav
Texas Instruments India
next prev parent reply other threads:[~2020-12-18 9:23 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-17 20:28 [PATCH v4 0/9] Add Tegra Quad SPI driver Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 2/9] dt-bindings: spi: Add Tegra Quad SPI device tree binding Sowjanya Komatineni
2020-12-22 0:20 ` Rob Herring
2020-12-17 20:28 ` [PATCH v4 3/9] MAINTAINERS: Add Tegra Quad SPI driver section Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 4/9] spi: tegra210-quad: Add support for Tegra210 QSPI controller Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 5/9] spi: spi-mem: Mark dummy transfers by setting dummy_data bit Sowjanya Komatineni
2020-12-18 9:21 ` Pratyush Yadav [this message]
2020-12-18 9:57 ` Boris Brezillon
2020-12-18 18:09 ` Sowjanya Komatineni
2020-12-18 19:19 ` Pratyush Yadav
2020-12-18 20:41 ` Mark Brown
2020-12-18 20:44 ` Mark Brown
2020-12-18 22:01 ` Sowjanya Komatineni
2020-12-21 16:50 ` Mark Brown
2020-12-17 20:28 ` [PATCH v4 6/9] spi: tegra210-quad: Add support for hardware dummy cycles transfer Sowjanya Komatineni
2020-12-18 10:20 ` Boris Brezillon
2020-12-17 20:28 ` [PATCH v4 7/9] arm64: tegra: Enable QSPI on Jetson Nano Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 8/9] arm64: tegra: Add QSPI nodes on Tegra194 Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 9/9] arm64: tegra: Enable QSPI on Jetson Xavier NX Sowjanya Komatineni
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