[Intel-gfx] [PATCH 0/3] Multi DSB instance support

[Intel-gfx] [PATCH 0/3] Multi DSB instance support

[Animesh Manna]

As an enhancement of dsb multi instance support added which can be
used by color framework for big lut programming in future.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (3):
  drm/i915/dsb: multi dsb instance support in prepare() and cleanup()
  drm/i915/dsb: multi dsb instance support in dsb-write()
  drm/i915/dsb: multi dsb instance support in dsb-commit()

 drivers/gpu/drm/i915/display/intel_atomic.c   |   9 +-
 drivers/gpu/drm/i915/display/intel_color.c    |  40 ++--
 drivers/gpu/drm/i915/display/intel_display.c  |   6 +-
 .../drm/i915/display/intel_display_types.h    |   2 +-
 drivers/gpu/drm/i915/display/intel_dsb.c      | 185 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_dsb.h      |   4 +-
 6 files changed, 136 insertions(+), 110 deletions(-)

-- 
2.26.0

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[Intel-gfx] [PATCH 1/3] drm/i915/dsb: multi dsb instance support in prepare() and cleanup()

[Animesh Manna]

Command buffer allocation is done for all 3 dsb instances for every
pipe and cleanup code is modified accordingly.

v1: Initial version.
v2: Improved commit description.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_atomic.c   |  9 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  6 +-
 .../drm/i915/display/intel_display_types.h    |  2 +-
 drivers/gpu/drm/i915/display/intel_dsb.c      | 99 ++++++++++---------
 4 files changed, 65 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index e00fdc47c0eb..3833f3b4851b 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -226,6 +226,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
 {
 	const struct intel_crtc_state *old_crtc_state = to_intel_crtc_state(crtc->state);
 	struct intel_crtc_state *crtc_state;
+	int i;
 
 	crtc_state = kmemdup(old_crtc_state, sizeof(*crtc_state), GFP_KERNEL);
 	if (!crtc_state)
@@ -252,7 +253,9 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
 	crtc_state->wm.need_postvbl_update = false;
 	crtc_state->fb_bits = 0;
 	crtc_state->update_planes = 0;
-	crtc_state->dsb = NULL;
+
+	for (i = 0; i < MAX_DSB_PER_PIPE; i++)
+		crtc_state->dsb[i] = NULL;
 
 	return &crtc_state->uapi;
 }
@@ -293,8 +296,10 @@ intel_crtc_destroy_state(struct drm_crtc *crtc,
 			 struct drm_crtc_state *state)
 {
 	struct intel_crtc_state *crtc_state = to_intel_crtc_state(state);
+	int i;
 
-	drm_WARN_ON(crtc->dev, crtc_state->dsb);
+	for (i = 0; i < MAX_DSB_PER_PIPE; i++)
+		drm_WARN_ON(crtc->dev, crtc_state->dsb[i]);
 
 	__drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi);
 	intel_crtc_free_hw_state(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 78452de5e12f..3afe8a22c784 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16256,7 +16256,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
 	struct intel_crtc *crtc;
 	u64 put_domains[I915_MAX_PIPES] = {};
 	intel_wakeref_t wakeref = 0;
-	int i;
+	int i, j;
 
 	intel_atomic_commit_fence_wait(state);
 
@@ -16386,7 +16386,9 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
 		 * cleanup. So copy and reset the dsb structure to sync with
 		 * commit_done and later do dsb cleanup in cleanup_work.
 		 */
-		old_crtc_state->dsb = fetch_and_zero(&new_crtc_state->dsb);
+		for (j = 0; j < MAX_DSB_PER_PIPE; j++)
+			old_crtc_state->dsb[j] =
+				fetch_and_zero(&new_crtc_state->dsb[j]);
 	}
 
 	/* Underruns don't always raise interrupts, so check manually */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5bc5bfbc4551..06ae7470ab8c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1124,7 +1124,7 @@ struct intel_crtc_state {
 	enum transcoder mst_master_transcoder;
 
 	/* For DSB related info */
-	struct intel_dsb *dsb;
+	struct intel_dsb *dsb[MAX_DSB_PER_PIPE];
 
 	u32 psr2_man_track_ctl;
 };
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 566fa72427b3..cef1015cc04f 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -92,7 +92,7 @@ static bool intel_dsb_disable_engine(struct drm_i915_private *i915,
 void intel_dsb_indexed_reg_write(const struct intel_crtc_state *crtc_state,
 				 i915_reg_t reg, u32 val)
 {
-	struct intel_dsb *dsb = crtc_state->dsb;
+	struct intel_dsb *dsb = crtc_state->dsb[0];
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	u32 *buf;
@@ -174,7 +174,7 @@ void intel_dsb_reg_write(const struct intel_crtc_state *crtc_state,
 	struct intel_dsb *dsb;
 	u32 *buf;
 
-	dsb = crtc_state->dsb;
+	dsb = crtc_state->dsb[0];
 	if (!dsb) {
 		intel_de_write(dev_priv, reg, val);
 		return;
@@ -202,7 +202,7 @@ void intel_dsb_reg_write(const struct intel_crtc_state *crtc_state,
  */
 void intel_dsb_commit(const struct intel_crtc_state *crtc_state)
 {
-	struct intel_dsb *dsb = crtc_state->dsb;
+	struct intel_dsb *dsb = crtc_state->dsb[0];
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
@@ -266,49 +266,52 @@ void intel_dsb_prepare(struct intel_crtc_state *crtc_state)
 	struct i915_vma *vma;
 	u32 *buf;
 	intel_wakeref_t wakeref;
+	int i;
 
 	if (!HAS_DSB(i915))
 		return;
 
-	dsb = kmalloc(sizeof(*dsb), GFP_KERNEL);
-	if (!dsb) {
-		drm_err(&i915->drm, "DSB object creation failed\n");
-		return;
-	}
-
-	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
-
-	obj = i915_gem_object_create_internal(i915, DSB_BUF_SIZE);
-	if (IS_ERR(obj)) {
-		drm_err(&i915->drm, "Gem object creation failed\n");
-		kfree(dsb);
-		goto out;
-	}
-
-	vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
-	if (IS_ERR(vma)) {
-		drm_err(&i915->drm, "Vma creation failed\n");
-		i915_gem_object_put(obj);
-		kfree(dsb);
-		goto out;
-	}
-
-	buf = i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
-	if (IS_ERR(buf)) {
-		drm_err(&i915->drm, "Command buffer creation failed\n");
-		i915_vma_unpin_and_release(&vma, I915_VMA_RELEASE_MAP);
-		kfree(dsb);
-		goto out;
-	}
-
-	dsb->id = DSB1;
-	dsb->vma = vma;
-	dsb->cmd_buf = buf;
-	dsb->free_pos = 0;
-	dsb->ins_start_offset = 0;
-	crtc_state->dsb = dsb;
+	for (i = 0 ; i < MAX_DSB_PER_PIPE; i++)	{
+		dsb = kmalloc(sizeof(*dsb), GFP_KERNEL);
+		if (!dsb) {
+			drm_err(&i915->drm, "DSB%d obj creation failed\n", i);
+			continue;
+		}
+
+		wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+		obj = i915_gem_object_create_internal(i915, DSB_BUF_SIZE);
+		if (IS_ERR(obj)) {
+			drm_err(&i915->drm, "Gem object creation failed\n");
+			kfree(dsb);
+			goto out;
+		}
+
+		vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
+		if (IS_ERR(vma)) {
+			drm_err(&i915->drm, "Vma creation failed\n");
+			i915_gem_object_put(obj);
+			kfree(dsb);
+			goto out;
+		}
+
+		buf = i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
+		if (IS_ERR(buf)) {
+			drm_err(&i915->drm, "Command buffer creation failed\n");
+			i915_vma_unpin_and_release(&vma, I915_VMA_RELEASE_MAP);
+			kfree(dsb);
+			goto out;
+		}
+
+		dsb->id = i;
+		dsb->vma = vma;
+		dsb->cmd_buf = buf;
+		dsb->free_pos = 0;
+		dsb->ins_start_offset = 0;
+		crtc_state->dsb[i] = dsb;
 out:
-	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+		intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+	}
 }
 
 /**
@@ -320,10 +323,14 @@ void intel_dsb_prepare(struct intel_crtc_state *crtc_state)
  */
 void intel_dsb_cleanup(struct intel_crtc_state *crtc_state)
 {
-	if (!crtc_state->dsb)
-		return;
+	int i;
 
-	i915_vma_unpin_and_release(&crtc_state->dsb->vma, I915_VMA_RELEASE_MAP);
-	kfree(crtc_state->dsb);
-	crtc_state->dsb = NULL;
+	for (i = 0; i < MAX_DSB_PER_PIPE; i++) {
+		if (!crtc_state->dsb[i])
+			continue;
+
+		i915_vma_unpin_and_release(&crtc_state->dsb[i]->vma, I915_VMA_RELEASE_MAP);
+		kfree(crtc_state->dsb[i]);
+		crtc_state->dsb[i] = NULL;
+	}
 }
-- 
2.26.0

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[Intel-gfx] [PATCH 2/3] drm/i915/dsb: multi dsb instance support in dsb-write()

[Animesh Manna]

To support multiple dsb instances per pipe dsb-id is passed
as argumnet in dsb-write() which will write into respective
dsb cmd-buffer.

v1: Initial version.
v2: Improved commit description.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 40 +++++++++++++---------
 drivers/gpu/drm/i915/display/intel_dsb.c   | 10 +++---
 drivers/gpu/drm/i915/display/intel_dsb.h   |  4 +--
 3 files changed, 31 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 172d398081ee..02f31bcf0d24 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -728,9 +728,12 @@ static void ivb_load_lut_ext_max(const struct intel_crtc_state *crtc_state)
 	enum pipe pipe = crtc->pipe;
 
 	/* Program the max register to clamp values > 1.0. */
-	intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 0), 1 << 16);
-	intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 1), 1 << 16);
-	intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 2), 1 << 16);
+	intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 0), 1 << 16,
+			    DSB1);
+	intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 1), 1 << 16,
+			    DSB1);
+	intel_dsb_reg_write(crtc_state, PREC_PAL_EXT_GC_MAX(pipe, 2), 1 << 16,
+			    DSB1);
 
 	/*
 	 * Program the gc max 2 register to clamp values > 1.0.
@@ -739,11 +742,11 @@ static void ivb_load_lut_ext_max(const struct intel_crtc_state *crtc_state)
 	 */
 	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
 		intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 0),
-				    1 << 16);
+				    1 << 16, DSB1);
 		intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 1),
-				    1 << 16);
+				    1 << 16, DSB1);
 		intel_dsb_reg_write(crtc_state, PREC_PAL_EXT2_GC_MAX(pipe, 2),
-				    1 << 16);
+				    1 << 16, DSB1);
 	}
 }
 
@@ -931,9 +934,12 @@ icl_load_gcmax(const struct intel_crtc_state *crtc_state,
 	enum pipe pipe = crtc->pipe;
 
 	/* FIXME LUT entries are 16 bit only, so we can prog 0xFFFF max */
-	intel_dsb_reg_write(crtc_state, PREC_PAL_GC_MAX(pipe, 0), color->red);
-	intel_dsb_reg_write(crtc_state, PREC_PAL_GC_MAX(pipe, 1), color->green);
-	intel_dsb_reg_write(crtc_state, PREC_PAL_GC_MAX(pipe, 2), color->blue);
+	intel_dsb_reg_write(crtc_state, PREC_PAL_GC_MAX(pipe, 0), color->red,
+			    DSB1);
+	intel_dsb_reg_write(crtc_state, PREC_PAL_GC_MAX(pipe, 1), color->green,
+			    DSB1);
+	intel_dsb_reg_write(crtc_state, PREC_PAL_GC_MAX(pipe, 2), color->blue,
+			    DSB1);
 }
 
 static void
@@ -953,15 +959,15 @@ icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state)
 	 * 2/(8 * 128 * 256) ... 8/(8 * 128 * 256).
 	 */
 	intel_dsb_reg_write(crtc_state, PREC_PAL_MULTI_SEG_INDEX(pipe),
-			    PAL_PREC_AUTO_INCREMENT);
+			    PAL_PREC_AUTO_INCREMENT, DSB1);
 
 	for (i = 0; i < 9; i++) {
 		const struct drm_color_lut *entry = &lut[i];
 
 		intel_dsb_indexed_reg_write(crtc_state, PREC_PAL_MULTI_SEG_DATA(pipe),
-					    ilk_lut_12p4_ldw(entry));
+					    ilk_lut_12p4_ldw(entry), DSB1);
 		intel_dsb_indexed_reg_write(crtc_state, PREC_PAL_MULTI_SEG_DATA(pipe),
-					    ilk_lut_12p4_udw(entry));
+					    ilk_lut_12p4_udw(entry), DSB1);
 	}
 }
 
@@ -986,13 +992,13 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state)
 	 * seg2[0] being unused by the hardware.
 	 */
 	intel_dsb_reg_write(crtc_state, PREC_PAL_INDEX(pipe),
-			    PAL_PREC_AUTO_INCREMENT);
+			    PAL_PREC_AUTO_INCREMENT, DSB1);
 	for (i = 1; i < 257; i++) {
 		entry = &lut[i * 8];
 		intel_dsb_indexed_reg_write(crtc_state, PREC_PAL_DATA(pipe),
-					    ilk_lut_12p4_ldw(entry));
+					    ilk_lut_12p4_ldw(entry), DSB1);
 		intel_dsb_indexed_reg_write(crtc_state, PREC_PAL_DATA(pipe),
-					    ilk_lut_12p4_udw(entry));
+					    ilk_lut_12p4_udw(entry), DSB1);
 	}
 
 	/*
@@ -1010,9 +1016,9 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state)
 	for (i = 0; i < 256; i++) {
 		entry = &lut[i * 8 * 128];
 		intel_dsb_indexed_reg_write(crtc_state, PREC_PAL_DATA(pipe),
-					    ilk_lut_12p4_ldw(entry));
+					    ilk_lut_12p4_ldw(entry), DSB1);
 		intel_dsb_indexed_reg_write(crtc_state, PREC_PAL_DATA(pipe),
-					    ilk_lut_12p4_udw(entry));
+					    ilk_lut_12p4_udw(entry), DSB1);
 	}
 
 	/* The last entry in the LUT is to be programmed in GCMAX */
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index cef1015cc04f..2a9df1d7cbc5 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -82,6 +82,7 @@ static bool intel_dsb_disable_engine(struct drm_i915_private *i915,
  * @crtc_state: intel_crtc_state structure
  * @reg: register address.
  * @val: value.
+ * @id: dsb id.
  *
  * This function is used for writing register-value pair in command
  * buffer of DSB for auto-increment register. During command buffer overflow,
@@ -90,9 +91,9 @@ static bool intel_dsb_disable_engine(struct drm_i915_private *i915,
  */
 
 void intel_dsb_indexed_reg_write(const struct intel_crtc_state *crtc_state,
-				 i915_reg_t reg, u32 val)
+				 i915_reg_t reg, u32 val, enum dsb_id id)
 {
-	struct intel_dsb *dsb = crtc_state->dsb[0];
+	struct intel_dsb *dsb = crtc_state->dsb[id];
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	u32 *buf;
@@ -160,6 +161,7 @@ void intel_dsb_indexed_reg_write(const struct intel_crtc_state *crtc_state,
  * @crtc_state: intel_crtc_state structure
  * @reg: register address.
  * @val: value.
+ * @id: dsb id.
  *
  * This function is used for writing register-value pair in command
  * buffer of DSB. During command buffer overflow, a warning  is thrown
@@ -167,14 +169,14 @@ void intel_dsb_indexed_reg_write(const struct intel_crtc_state *crtc_state,
  * through mmio write.
  */
 void intel_dsb_reg_write(const struct intel_crtc_state *crtc_state,
-			 i915_reg_t reg, u32 val)
+			 i915_reg_t reg, u32 val, enum dsb_id id)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	struct intel_dsb *dsb;
 	u32 *buf;
 
-	dsb = crtc_state->dsb[0];
+	dsb = crtc_state->dsb[id];
 	if (!dsb) {
 		intel_de_write(dev_priv, reg, val);
 		return;
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h
index 654a11f24b80..0040941d6a56 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.h
+++ b/drivers/gpu/drm/i915/display/intel_dsb.h
@@ -43,9 +43,9 @@ struct intel_dsb {
 void intel_dsb_prepare(struct intel_crtc_state *crtc_state);
 void intel_dsb_cleanup(struct intel_crtc_state *crtc_state);
 void intel_dsb_reg_write(const struct intel_crtc_state *crtc_state,
-			 i915_reg_t reg, u32 val);
+			 i915_reg_t reg, u32 val, enum dsb_id id);
 void intel_dsb_indexed_reg_write(const struct intel_crtc_state *crtc_state,
-				 i915_reg_t reg, u32 val);
+				 i915_reg_t reg, u32 val, enum dsb_id id);
 void intel_dsb_commit(const struct intel_crtc_state *crtc_state);
 
 #endif
-- 
2.26.0

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[Intel-gfx] [PATCH 3/3] drm/i915/dsb: multi dsb instance support in dsb-commit()

[Animesh Manna]

To support multiple dsb instances per pipe dsb-id is passed
as argumnet in dsb-commit() and respective cmd-buffer will
be updated in actual hardware.

v1: Initial version.
v2: Improved commit description.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 74 +++++++++++++-----------
 1 file changed, 39 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 2a9df1d7cbc5..be301cb292dc 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -210,46 +210,50 @@ void intel_dsb_commit(const struct intel_crtc_state *crtc_state)
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	enum pipe pipe = crtc->pipe;
 	u32 tail;
+	int i;
 
-	if (!(dsb && dsb->free_pos))
-		return;
+	for (i = 0; i < MAX_DSB_PER_PIPE; i++) {
+		dsb = crtc_state->dsb[i];
+		if (!(dsb && dsb->free_pos))
+			continue;
 
-	if (!intel_dsb_enable_engine(dev_priv, pipe, dsb->id))
-		goto reset;
+		if (!intel_dsb_enable_engine(dev_priv, pipe, dsb->id))
+			goto reset;
 
-	if (is_dsb_busy(dev_priv, pipe, dsb->id)) {
-		drm_err(&dev_priv->drm,
-			"HEAD_PTR write failed - dsb engine is busy.\n");
-		goto reset;
-	}
-	intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id),
-		       i915_ggtt_offset(dsb->vma));
-
-	tail = ALIGN(dsb->free_pos * 4, CACHELINE_BYTES);
-	if (tail > dsb->free_pos * 4)
-		memset(&dsb->cmd_buf[dsb->free_pos], 0,
-		       (tail - dsb->free_pos * 4));
-
-	if (is_dsb_busy(dev_priv, pipe, dsb->id)) {
-		drm_err(&dev_priv->drm,
-			"TAIL_PTR write failed - dsb engine is busy.\n");
-		goto reset;
-	}
-	drm_dbg_kms(&dev_priv->drm,
-		    "DSB execution started - head 0x%x, tail 0x%x\n",
-		    i915_ggtt_offset(dsb->vma), tail);
-	intel_de_write(dev_priv, DSB_TAIL(pipe, dsb->id),
-		       i915_ggtt_offset(dsb->vma) + tail);
-	if (wait_for(!is_dsb_busy(dev_priv, pipe, dsb->id), 1)) {
-		drm_err(&dev_priv->drm,
-			"Timed out waiting for DSB workload completion.\n");
-		goto reset;
-	}
+		if (is_dsb_busy(dev_priv, pipe, dsb->id)) {
+			drm_err(&dev_priv->drm,
+				"HEAD_PTR write failed - dsb engine is busy\n");
+			goto reset;
+		}
+		intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id),
+			       i915_ggtt_offset(dsb->vma));
+
+		tail = ALIGN(dsb->free_pos * 4, CACHELINE_BYTES);
+		if (tail > dsb->free_pos * 4)
+			memset(&dsb->cmd_buf[dsb->free_pos], 0,
+			       (tail - dsb->free_pos * 4));
+
+		if (is_dsb_busy(dev_priv, pipe, dsb->id)) {
+			drm_err(&dev_priv->drm,
+				"TAIL_PTR write failed - dsb engine is busy\n");
+			goto reset;
+		}
+		drm_dbg_kms(&dev_priv->drm,
+			    "DSB execution started - head 0x%x, tail 0x%x\n",
+			    i915_ggtt_offset(dsb->vma), tail);
+		intel_de_write(dev_priv, DSB_TAIL(pipe, dsb->id),
+			       i915_ggtt_offset(dsb->vma) + tail);
+		if (wait_for(!is_dsb_busy(dev_priv, pipe, dsb->id), 1)) {
+			drm_err(&dev_priv->drm,
+				"Timed out waiting for DSB workload completion\n");
+			goto reset;
+		}
 
 reset:
-	dsb->free_pos = 0;
-	dsb->ins_start_offset = 0;
-	intel_dsb_disable_engine(dev_priv, pipe, dsb->id);
+		dsb->free_pos = 0;
+		dsb->ins_start_offset = 0;
+		intel_dsb_disable_engine(dev_priv, pipe, dsb->id);
+	}
 }
 
 /**
-- 
2.26.0

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Multi DSB instance support (rev2)

[Patchwork]

== Series Details ==

Series: Multi DSB instance support (rev2)
URL   : https://patchwork.freedesktop.org/series/84934/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
0c7de4da8b93 drm/i915/dsb: multi dsb instance support in prepare() and cleanup()
-:167: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
#167: FILE: drivers/gpu/drm/i915/display/intel_dsb.c:277:
+		if (!dsb) {
+			drm_err(&i915->drm, "DSB%d obj creation failed\n", i);

total: 0 errors, 1 warnings, 0 checks, 187 lines checked
7701fb147537 drm/i915/dsb: multi dsb instance support in dsb-write()
cfe4b9b4b20b drm/i915/dsb: multi dsb instance support in dsb-commit()


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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Multi DSB instance support (rev2)

[Patchwork]

== Series Details ==

Series: Multi DSB instance support (rev2)
URL   : https://patchwork.freedesktop.org/series/84934/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_reset.c:1310:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:20:    expected void *in
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:20:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:20: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:102:46:    expected void const *src
+drivers/gpu/drm/i915/gt/selftest_reset.c:102:46:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:102:46: warning: incorrect type in argument 2 (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:20:    expected void *in
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:20:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:20: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:138:46:    expected void const *src
+drivers/gpu/drm/i915/gt/selftest_reset.c:138:46:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:138:46: warning: incorrect type in argument 2 (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:99:34:    expected unsigned int [usertype] *s
+drivers/gpu/drm/i915/gt/selftest_reset.c:99:34:    got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:99:34: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/gvt/mmio.c:295:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1449:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1503:15: warning: memset with byte count of 16777216
+./include/linux/seqlock.h:838:24: warning: trying to copy expression type 31
+./include/linux/seqlock.h:838:24: warning: trying to copy expression type 31
+./include/linux/seqlock.h:864:16: warning: trying to copy expression type 31
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block


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[Intel-gfx] ✓ Fi.CI.BAT: success for Multi DSB instance support (rev2)

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 3282 bytes --]

== Series Details ==

Series: Multi DSB instance support (rev2)
URL   : https://patchwork.freedesktop.org/series/84934/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9509 -> Patchwork_19195
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/index.html

Known issues
------------

  Here are the changes found in Patchwork_19195 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@fork-compute0:
    - fi-tgl-u2:          NOTRUN -> [SKIP][1] ([fdo#109315] / [i915#2575]) +17 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/fi-tgl-u2/igt@amdgpu/amd_cs_nop@fork-compute0.html

  * igt@prime_vgem@basic-read:
    - fi-tgl-y:           [PASS][2] -> [DMESG-WARN][3] ([i915#402]) +1 similar issue
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-tgl-y/igt@prime_vgem@basic-read.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/fi-tgl-y/igt@prime_vgem@basic-read.html

  
#### Possible fixes ####

  * igt@gem_tiled_blits@basic:
    - fi-tgl-y:           [DMESG-WARN][4] ([i915#402]) -> [PASS][5] +2 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-tgl-y/igt@gem_tiled_blits@basic.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/fi-tgl-y/igt@gem_tiled_blits@basic.html

  * igt@i915_selftest@live@hangcheck:
    - fi-tgl-u2:          [INCOMPLETE][6] -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-tgl-u2/igt@i915_selftest@live@hangcheck.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/fi-tgl-u2/igt@i915_selftest@live@hangcheck.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-cml-u2:          [FAIL][8] ([i915#2679]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html

  
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2679]: https://gitlab.freedesktop.org/drm/intel/issues/2679
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402


Participating hosts (42 -> 38)
------------------------------

  Missing    (4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u 


Build changes
-------------

  * Linux: CI_DRM_9509 -> Patchwork_19195

  CI-20190529: 20190529
  CI_DRM_9509: 66ecfb1df07b703dc4e83e8c520b186dffe6d2b3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5913: b30bdfecaf1ff38b83c0bfbcf5981732a968a464 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19195: cfe4b9b4b20bf17a2d6f581b02b722ce310b94f1 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

cfe4b9b4b20b drm/i915/dsb: multi dsb instance support in dsb-commit()
7701fb147537 drm/i915/dsb: multi dsb instance support in dsb-write()
0c7de4da8b93 drm/i915/dsb: multi dsb instance support in prepare() and cleanup()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/index.html

[-- Attachment #1.2: Type: text/html, Size: 4083 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

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[Intel-gfx] ✓ Fi.CI.IGT: success for Multi DSB instance support (rev2)

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 16574 bytes --]

== Series Details ==

Series: Multi DSB instance support (rev2)
URL   : https://patchwork.freedesktop.org/series/84934/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9509_full -> Patchwork_19195_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_19195_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_persistence@legacy-engines-cleanup:
    - shard-hsw:          NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-hsw4/igt@gem_ctx_persistence@legacy-engines-cleanup.html

  * igt@gem_exec_balancer@bonded-slice:
    - shard-tglb:         [PASS][2] -> [FAIL][3] ([i915#1292])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-tglb7/igt@gem_exec_balancer@bonded-slice.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-tglb5/igt@gem_exec_balancer@bonded-slice.html

  * igt@gem_exec_whisper@basic-queues-forked:
    - shard-glk:          [PASS][4] -> [DMESG-WARN][5] ([i915#118] / [i915#95])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-glk8/igt@gem_exec_whisper@basic-queues-forked.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-glk5/igt@gem_exec_whisper@basic-queues-forked.html

  * igt@i915_pm_rps@waitboost:
    - shard-glk:          [PASS][6] -> [FAIL][7] ([i915#39])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-glk2/igt@i915_pm_rps@waitboost.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-glk1/igt@i915_pm_rps@waitboost.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-skl:          [PASS][8] -> [FAIL][9] ([i915#2521])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl9/igt@kms_async_flips@alternate-sync-async-flip.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl1/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-hsw:          NOTRUN -> [SKIP][10] ([fdo#109271]) +64 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-hsw4/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_chamelium@hdmi-hpd-enable-disable-mode:
    - shard-hsw:          NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-hsw4/igt@kms_chamelium@hdmi-hpd-enable-disable-mode.html

  * igt@kms_color@pipe-b-ctm-red-to-blue:
    - shard-skl:          [PASS][12] -> [DMESG-WARN][13] ([i915#1982])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl9/igt@kms_color@pipe-b-ctm-red-to-blue.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl1/igt@kms_color@pipe-b-ctm-red-to-blue.html

  * igt@kms_color_chamelium@pipe-c-degamma:
    - shard-skl:          NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +4 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl7/igt@kms_color_chamelium@pipe-c-degamma.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen:
    - shard-skl:          [PASS][15] -> [FAIL][16] ([i915#54]) +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl4/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-hsw:          [PASS][17] -> [FAIL][18] ([i915#2370])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-hsw4/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-skl:          [PASS][19] -> [INCOMPLETE][20] ([i915#198])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl6/igt@kms_fbcon_fbt@psr-suspend.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl5/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@bc-vga1-hdmi-a1:
    - shard-hsw:          [PASS][21] -> [INCOMPLETE][22] ([i915#2055])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-hsw8/igt@kms_flip@2x-flip-vs-suspend-interruptible@bc-vga1-hdmi-a1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-hsw1/igt@kms_flip@2x-flip-vs-suspend-interruptible@bc-vga1-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend@a-edp1:
    - shard-skl:          [PASS][23] -> [INCOMPLETE][24] ([i915#198] / [i915#1982])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl9/igt@kms_flip@flip-vs-suspend@a-edp1.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl1/igt@kms_flip@flip-vs-suspend@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
    - shard-skl:          NOTRUN -> [SKIP][25] ([fdo#109271]) +29 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][26] -> [FAIL][27] ([fdo#108145] / [i915#265])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          NOTRUN -> [FAIL][28] ([fdo#108145] / [i915#265])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#109441]) +2 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-suspend:
    - shard-skl:          [INCOMPLETE][31] ([i915#1037] / [i915#198]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl1/igt@gem_eio@in-flight-suspend.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl7/igt@gem_eio@in-flight-suspend.html

  * {igt@gem_exec_schedule@u-fairslice@vcs0}:
    - shard-skl:          [DMESG-WARN][33] ([i915#1610]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl8/igt@gem_exec_schedule@u-fairslice@vcs0.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl10/igt@gem_exec_schedule@u-fairslice@vcs0.html

  * igt@kms_async_flips@test-time-stamp:
    - shard-tglb:         [FAIL][35] ([i915#2597]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-tglb2/igt@kms_async_flips@test-time-stamp.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-tglb2/igt@kms_async_flips@test-time-stamp.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-180:
    - shard-snb:          [SKIP][37] ([fdo#109271]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-snb5/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-snb2/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding:
    - shard-skl:          [FAIL][39] ([i915#54]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl4/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-tglb:         [FAIL][41] ([i915#2346]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-tglb5/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-tglb7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a1:
    - shard-glk:          [FAIL][43] ([i915#2122]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-glk9/igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a1.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-glk1/igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a1.html

  * igt@kms_flip@plain-flip-fb-recreate@b-edp1:
    - shard-skl:          [FAIL][45] ([i915#2122]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl2/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [FAIL][47] ([fdo#108145] / [i915#265]) -> [PASS][48] +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-b-tiling-yf:
    - shard-kbl:          [DMESG-WARN][49] ([i915#165] / [i915#180] / [i915#78]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-kbl2/igt@kms_plane_lowres@pipe-b-tiling-yf.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-kbl3/igt@kms_plane_lowres@pipe-b-tiling-yf.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][51] ([fdo#109441]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-iclb8/igt@kms_psr@psr2_primary_mmap_cpu.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html

  
#### Warnings ####

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-iclb:         [WARN][53] ([i915#2684]) -> [WARN][54] ([i915#2681] / [i915#2684])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-iclb5/igt@i915_pm_rc6_residency@rc6-fence.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-iclb:         [WARN][55] ([i915#2684]) -> [WARN][56] ([i915#1804] / [i915#2684])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-iclb3/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][57], [FAIL][58]) ([i915#1814] / [i915#2295] / [i915#483]) -> ([FAIL][59], [FAIL][60], [FAIL][61]) ([i915#1814] / [i915#2295] / [i915#2426] / [i915#483])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-kbl7/igt@runner@aborted.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-kbl6/igt@runner@aborted.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-kbl7/igt@runner@aborted.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-kbl3/igt@runner@aborted.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-kbl6/igt@runner@aborted.html
    - shard-glk:          ([FAIL][62], [FAIL][63]) ([i915#1814] / [i915#2295] / [k.org#202321]) -> ([FAIL][64], [FAIL][65], [FAIL][66]) ([i915#1814] / [i915#2295] / [i915#2426] / [k.org#202321])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-glk9/igt@runner@aborted.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-glk2/igt@runner@aborted.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-glk4/igt@runner@aborted.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-glk1/igt@runner@aborted.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-glk1/igt@runner@aborted.html
    - shard-tglb:         ([FAIL][67], [FAIL][68]) ([i915#1602] / [i915#2295]) -> ([FAIL][69], [FAIL][70], [FAIL][71]) ([i915#1602] / [i915#2295] / [i915#2426])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-tglb7/igt@runner@aborted.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9509/shard-tglb5/igt@runner@aborted.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-tglb5/igt@runner@aborted.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-tglb8/igt@runner@aborted.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/shard-tglb5/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1037]: https://gitlab.freedesktop.org/drm/intel/issues/1037
  [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1292]: https://gitlab.freedesktop.org/drm/intel/issues/1292
  [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
  [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
  [i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
  [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2055]: https://gitlab.freedesktop.org/drm/intel/issues/2055
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2370]: https://gitlab.freedesktop.org/drm/intel/issues/2370
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#2597]: https://gitlab.freedesktop.org/drm/intel/issues/2597
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
  [i915#2803]: https://gitlab.freedesktop.org/drm/intel/issues/2803
  [i915#2804]: https://gitlab.freedesktop.org/drm/intel/issues/2804
  [i915#39]: https://gitlab.freedesktop.org/drm/intel/issues/39
  [i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#78]: https://gitlab.freedesktop.org/drm/intel/issues/78
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
  [k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_9509 -> Patchwork_19195

  CI-20190529: 20190529
  CI_DRM_9509: 66ecfb1df07b703dc4e83e8c520b186dffe6d2b3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5913: b30bdfecaf1ff38b83c0bfbcf5981732a968a464 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19195: cfe4b9b4b20bf17a2d6f581b02b722ce310b94f1 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19195/index.html

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_______________________________________________
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[Intel-gfx] [PATCH 0/3] Multi DSB instance support

[Animesh Manna]

As an enhancement of dsb multi instance support added which can be
used by color framework for big lut programming in future.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (3):
  drm/i915/dsb: multi dsb instance support in prepare() and cleanup()
  drm/i915/dsb: multi dsb instance support in dsb-write()
  drm/i915/dsb: multi dsb instance support in dsb-commit()

 drivers/gpu/drm/i915/display/intel_atomic.c   |   9 +-
 drivers/gpu/drm/i915/display/intel_color.c    |  40 ++--
 drivers/gpu/drm/i915/display/intel_display.c  |   6 +-
 .../drm/i915/display/intel_display_types.h    |   2 +-
 drivers/gpu/drm/i915/display/intel_dsb.c      | 183 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_dsb.h      |   4 +-
 6 files changed, 134 insertions(+), 110 deletions(-)

-- 
2.26.0

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