[PATCH 0/5] v3u: add support for RWDT

[PATCH 0/5] v3u: add support for RWDT

[Wolfram Sang]

Here is the series to enable the RWDT on V3U. I took the DTS patches
from the BSP, the rest was developed on mainline tree. Note that
currently, the bootloader does not unmask the RWDT reset for us. This is
why patch #5 is needed if you want a reboot. We need to see if this is
going to be added to the bootloader later. Also, while the normal
watchdog trigger works flawlessly, the 'reboot' command will triger a
OOPS. This is a known issue also present on other Gen3 SoCs and will
be addressed seperately soon.

Other than that, patch #1 should go in via watchdog, the rest via
Geert's various trees :)

Looking forward to comments.

Happy hacking and have a nice weekend!


Hoang Vo (2):
  arm64: dts: renesas: r8a779a0: Add RWDT node
  arm64: dts: renesas: falcon: Enable watchdog timer

Wolfram Sang (3):
  dt-bindings: watchdog: renesas,wdt: add r8a779a0 (V3U) support
  clk: renesas: r8a779a0: Add RWDT clocks
  WIP soc: v3u: allow WDT reset

 .../devicetree/bindings/watchdog/renesas,wdt.yaml      |  1 +
 arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts        |  5 +++++
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi              | 10 ++++++++++
 drivers/clk/renesas/r8a779a0-cpg-mssr.c                |  9 +++++++++
 drivers/soc/renesas/rcar-rst.c                         |  8 ++++++++
 5 files changed, 33 insertions(+)

-- 
2.29.2

[PATCH 1/5] dt-bindings: watchdog: renesas,wdt: add r8a779a0 (V3U) support

[Wolfram Sang]

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---

Please apply it to the watchdog-tree.

 Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
index 6933005b52bd..ab66d3f0c476 100644
--- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
@@ -50,6 +50,7 @@ properties:
               - renesas,r8a77980-wdt     # R-Car V3H
               - renesas,r8a77990-wdt     # R-Car E3
               - renesas,r8a77995-wdt     # R-Car D3
+              - renesas,r8a779a0-wdt     # R-Car V3U
           - const: renesas,rcar-gen3-wdt # R-Car Gen3 and RZ/G2
 
   reg:
-- 
2.29.2

Re: [PATCH 1/5] dt-bindings: watchdog: renesas,wdt: add r8a779a0 (V3U) support

[Geert Uytterhoeven]

On Fri, Dec 18, 2020 at 6:37 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 1/5] dt-bindings: watchdog: renesas,wdt: add r8a779a0 (V3U) support

[Rob Herring]

On Fri, 18 Dec 2020 18:37:26 +0100, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
> 
> Please apply it to the watchdog-tree.
> 
>  Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 1/5] dt-bindings: watchdog: renesas,wdt: add r8a779a0 (V3U) support

[Wolfram Sang]

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On Fri, Dec 18, 2020 at 06:37:26PM +0100, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
> 
> Please apply it to the watchdog-tree.

Guenter, could you pick/ack it, please?

> 
>  Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> index 6933005b52bd..ab66d3f0c476 100644
> --- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> @@ -50,6 +50,7 @@ properties:
>                - renesas,r8a77980-wdt     # R-Car V3H
>                - renesas,r8a77990-wdt     # R-Car E3
>                - renesas,r8a77995-wdt     # R-Car D3
> +              - renesas,r8a779a0-wdt     # R-Car V3U
>            - const: renesas,rcar-gen3-wdt # R-Car Gen3 and RZ/G2
>  
>    reg:
> -- 
> 2.29.2
> 

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Re: [PATCH 1/5] dt-bindings: watchdog: renesas,wdt: add r8a779a0 (V3U) support

[Guenter Roeck]

On Fri, Dec 18, 2020 at 06:37:26PM +0100, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Acked-by: Rob Herring <robh@kernel.org>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
> 
> Please apply it to the watchdog-tree.
> 
>  Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> index 6933005b52bd..ab66d3f0c476 100644
> --- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> @@ -50,6 +50,7 @@ properties:
>                - renesas,r8a77980-wdt     # R-Car V3H
>                - renesas,r8a77990-wdt     # R-Car E3
>                - renesas,r8a77995-wdt     # R-Car D3
> +              - renesas,r8a779a0-wdt     # R-Car V3U
>            - const: renesas,rcar-gen3-wdt # R-Car Gen3 and RZ/G2
>  
>    reg:

[PATCH 2/5] clk: renesas: r8a779a0: Add RWDT clocks

[Wolfram Sang]

And introduce critical clocks, too, because RWDT is one.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/clk/renesas/r8a779a0-cpg-mssr.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index aa5389b04d74..bf9fdcdd7d85 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -188,6 +188,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
 	DEF_MOD("vin35",	827,	R8A779A0_CLK_S1D1),
 	DEF_MOD("vin36",	828,	R8A779A0_CLK_S1D1),
 	DEF_MOD("vin37",	829,	R8A779A0_CLK_S1D1),
+	DEF_MOD("rwdt",		907,	R8A779A0_CLK_R),
 };
 
 static spinlock_t cpg_lock;
@@ -261,6 +262,10 @@ static struct clk * __init rcar_r8a779a0_cpg_clk_register(struct device *dev,
 					 __clk_get_name(parent), 0, mult, div);
 }
 
+static const unsigned int r8a779a0_crit_mod_clks[] __initconst = {
+	MOD_CLK_ID(907),	/* RWDT */
+};
+
 /*
  * CPG Clock Data
  */
@@ -311,6 +316,10 @@ const struct cpg_mssr_info r8a779a0_cpg_mssr_info __initconst = {
 	.num_mod_clks = ARRAY_SIZE(r8a779a0_mod_clks),
 	.num_hw_mod_clks = 15 * 32,
 
+	/* Critical Module Clocks */
+	.crit_mod_clks		= r8a779a0_crit_mod_clks,
+	.num_crit_mod_clks	= ARRAY_SIZE(r8a779a0_crit_mod_clks),
+
 	/* Callbacks */
 	.init = r8a779a0_cpg_mssr_init,
 	.cpg_clk_register = rcar_r8a779a0_cpg_clk_register,
-- 
2.29.2

Re: [PATCH 2/5] clk: renesas: r8a779a0: Add RWDT clocks

[Geert Uytterhoeven]

On Fri, Dec 18, 2020 at 6:37 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> And introduce critical clocks, too, because RWDT is one.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v5.12.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH 3/5] arm64: dts: renesas: r8a779a0: Add RWDT node

[Wolfram Sang]

From: Hoang Vo <hoang.vo.eb@renesas.com>

Add a device node for the Watchdog Timer (WDT) controller on the
R8A779A0 SoC.

Signed-off-by: Hoang Vo <hoang.vo.eb@renesas.com>
[wsa: rebased to mainline]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 6cf77ce9aa93..1ca500f55096 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -85,6 +85,16 @@ rst: reset-controller@e6160000 {
 			reg = <0 0xe6160000 0 0x4000>;
 		};
 
+		rwdt: watchdog@e6020000 {
+			compatible = "renesas,r8a779a0-wdt",
+				     "renesas,rcar-gen3-wdt";
+			reg = <0 0xe6020000 0 0x0c>;
+			clocks = <&cpg CPG_MOD 907>;
+			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+			resets = <&cpg 907>;
+			status = "disabled";
+		};
+
 		sysc: system-controller@e6180000 {
 			compatible = "renesas,r8a779a0-sysc";
 			reg = <0 0xe6180000 0 0x4000>;
-- 
2.29.2

Re: [PATCH 3/5] arm64: dts: renesas: r8a779a0: Add RWDT node

[Wolfram Sang]

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> +			reg = <0 0xe6020000 0 0x0c>;

I just understood that we sort by reg value and not by name. So, this
needs to be moved to another place then.



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Re: [PATCH 3/5] arm64: dts: renesas: r8a779a0: Add RWDT node

[Geert Uytterhoeven]

On Fri, Dec 18, 2020 at 6:37 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Hoang Vo <hoang.vo.eb@renesas.com>
>
> Add a device node for the Watchdog Timer (WDT) controller on the
> R8A779A0 SoC.
>
> Signed-off-by: Hoang Vo <hoang.vo.eb@renesas.com>
> [wsa: rebased to mainline]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.12 (with sort order fixed).

> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -85,6 +85,16 @@ rst: reset-controller@e6160000 {
>                         reg = <0 0xe6160000 0 0x4000>;
>                 };
>
> +               rwdt: watchdog@e6020000 {
> +                       compatible = "renesas,r8a779a0-wdt",
> +                                    "renesas,rcar-gen3-wdt";
> +                       reg = <0 0xe6020000 0 0x0c>;
> +                       clocks = <&cpg CPG_MOD 907>;
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       resets = <&cpg 907>;
> +                       status = "disabled";

No interrupts property? ;-)
As we don't have it described yet for the other R-Car Gen3 SoCs, I
suggest we do that in one batch...

> +               };
> +
>                 sysc: system-controller@e6180000 {
>                         compatible = "renesas,r8a779a0-sysc";
>                         reg = <0 0xe6180000 0 0x4000>;

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 3/5] arm64: dts: renesas: r8a779a0: Add RWDT node

[Wolfram Sang]

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> No interrupts property? ;-)
> As we don't have it described yet for the other R-Car Gen3 SoCs, I
> suggest we do that in one batch...

Yes, I'll try to find some time for this as a seperate series.


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[PATCH 4/5] arm64: dts: renesas: falcon: Enable watchdog timer

[Wolfram Sang]

From: Hoang Vo <hoang.vo.eb@renesas.com>

Enable the watchdog on the Falcon board.

Signed-off-by: Hoang Vo <hoang.vo.eb@renesas.com>
[wsa: rebased to mainline]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index 8eda70e5a82b..fb9978ea18f4 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -20,3 +20,8 @@ chosen {
 		stdout-path = "serial0:115200n8";
 	};
 };
+
+&rwdt {
+	timeout-sec = <60>;
+	status = "okay";
+};
-- 
2.29.2

Re: [PATCH 4/5] arm64: dts: renesas: falcon: Enable watchdog timer

[Geert Uytterhoeven]

On Fri, Dec 18, 2020 at 6:37 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Hoang Vo <hoang.vo.eb@renesas.com>
>
> Enable the watchdog on the Falcon board.
>
> Signed-off-by: Hoang Vo <hoang.vo.eb@renesas.com>
> [wsa: rebased to mainline]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.12.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH 5/5] WIP soc: v3u: allow WDT reset

[Wolfram Sang]

Other Gen3 SoCs do this in the bootloader. Maybe V3U will also later?
For now, add it so we can properly reboot via remote.

Not to be applied yet, just for demonstration.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/soc/renesas/rcar-rst.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index 8a1e402ea799..d3364fe57150 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -12,6 +12,13 @@
 
 #define WDTRSTCR_RESET		0xA55A0002
 #define WDTRSTCR		0x0054
+#define V3U_WDTRSTCR		0x0010
+
+static int v3u_rst_enable_wdt_reset(void __iomem *base)
+{
+	iowrite32(WDTRSTCR_RESET, base + V3U_WDTRSTCR);
+	return 0;
+}
 
 static int rcar_rst_enable_wdt_reset(void __iomem *base)
 {
@@ -39,6 +46,7 @@ static const struct rst_config rcar_rst_gen3 __initconst = {
 
 static const struct rst_config rcar_rst_r8a779a0 __initconst = {
 	.modemr = 0x00,		/* MODEMR0 and it has CPG related bits */
+	.configure = v3u_rst_enable_wdt_reset,
 };
 
 static const struct of_device_id rcar_rst_matches[] __initconst = {
-- 
2.29.2

Re: [PATCH 5/5] WIP soc: v3u: allow WDT reset

[Geert Uytterhoeven]

On Fri, Dec 18, 2020 at 6:37 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Other Gen3 SoCs do this in the bootloader. Maybe V3U will also later?
> For now, add it so we can properly reboot via remote.
>
> Not to be applied yet, just for demonstration.

Agreed.

> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds