From: Alexandre Ghiti <alex@ghiti.fr> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>, Anup Patel <anup@brainfault.org>, Christoph Hellwig <hch@lst.de>, Ard Biesheuvel <ardb@kernel.org>, Arnd Bergmann <arnd@arndb.de>, linux-efi@vger.kernel.org, linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti <alex@ghiti.fr> Subject: [RFC PATCH 09/12] riscv: Allow user to downgrade to sv39 when hw supports sv48 Date: Mon, 4 Jan 2021 14:58:37 -0500 [thread overview] Message-ID: <20210104195840.1593-10-alex@ghiti.fr> (raw) In-Reply-To: <20210104195840.1593-1-alex@ghiti.fr> This is made possible by using the mmu-type property of the cpu node of the device tree. By default, the kernel will boot with 4-level page table if the hw supports it but it can be interesting for the user to select 3-level page table as it is less memory consuming and faster since it requires less memory accesses in case of a TLB miss. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Reviewed-by: Anup Patel <anup@brainfault.org> --- arch/riscv/mm/init.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index cb23a30d9af3..f9a99cb1870b 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -550,10 +550,32 @@ void disable_pgtable_l4(void) * then read SATP to see if the configuration was taken into account * meaning sv48 is supported. */ -asmlinkage __init void set_satp_mode(uintptr_t load_pa) +asmlinkage __init void set_satp_mode(uintptr_t load_pa, uintptr_t dtb_pa) { u64 identity_satp, hw_satp; + int cpus_node; + /* 1/ Check if the user asked for sv39 explicitly in the device tree */ + cpus_node = fdt_path_offset((void *)dtb_pa, "/cpus"); + if (cpus_node >= 0) { + int node; + + fdt_for_each_subnode(node, (void *)dtb_pa, cpus_node) { + const char *mmu_type = fdt_getprop((void *)dtb_pa, node, + "mmu-type", NULL); + if (!mmu_type) + continue; + + if (!strcmp(mmu_type, "riscv,sv39")) { + disable_pgtable_l4(); + return; + } + + break; + } + } + + /* 2/ Determine if the HW supports sv48: if not, fallback to sv39 */ create_pgd_mapping(early_pg_dir, load_pa, (uintptr_t)early_pud, PGDIR_SIZE, PAGE_TABLE); create_pud_mapping(early_pud, load_pa, (uintptr_t)early_pmd, @@ -611,7 +633,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) #endif #if defined(CONFIG_64BIT) && !defined(CONFIG_MAXPHYSMEM_2GB) - set_satp_mode(load_pa); + set_satp_mode(load_pa, dtb_pa); #endif kernel_virt_addr = KERNEL_VIRT_ADDR; -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Alexandre Ghiti <alex@ghiti.fr> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>, Anup Patel <anup@brainfault.org>, Christoph Hellwig <hch@lst.de>, Ard Biesheuvel <ardb@kernel.org>, Arnd Bergmann <arnd@arndb.de>, linux-efi@vger.kernel.org, linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti <alex@ghiti.fr> Subject: [RFC PATCH 09/12] riscv: Allow user to downgrade to sv39 when hw supports sv48 Date: Mon, 4 Jan 2021 14:58:37 -0500 [thread overview] Message-ID: <20210104195840.1593-10-alex@ghiti.fr> (raw) In-Reply-To: <20210104195840.1593-1-alex@ghiti.fr> This is made possible by using the mmu-type property of the cpu node of the device tree. By default, the kernel will boot with 4-level page table if the hw supports it but it can be interesting for the user to select 3-level page table as it is less memory consuming and faster since it requires less memory accesses in case of a TLB miss. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Reviewed-by: Anup Patel <anup@brainfault.org> --- arch/riscv/mm/init.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index cb23a30d9af3..f9a99cb1870b 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -550,10 +550,32 @@ void disable_pgtable_l4(void) * then read SATP to see if the configuration was taken into account * meaning sv48 is supported. */ -asmlinkage __init void set_satp_mode(uintptr_t load_pa) +asmlinkage __init void set_satp_mode(uintptr_t load_pa, uintptr_t dtb_pa) { u64 identity_satp, hw_satp; + int cpus_node; + /* 1/ Check if the user asked for sv39 explicitly in the device tree */ + cpus_node = fdt_path_offset((void *)dtb_pa, "/cpus"); + if (cpus_node >= 0) { + int node; + + fdt_for_each_subnode(node, (void *)dtb_pa, cpus_node) { + const char *mmu_type = fdt_getprop((void *)dtb_pa, node, + "mmu-type", NULL); + if (!mmu_type) + continue; + + if (!strcmp(mmu_type, "riscv,sv39")) { + disable_pgtable_l4(); + return; + } + + break; + } + } + + /* 2/ Determine if the HW supports sv48: if not, fallback to sv39 */ create_pgd_mapping(early_pg_dir, load_pa, (uintptr_t)early_pud, PGDIR_SIZE, PAGE_TABLE); create_pud_mapping(early_pud, load_pa, (uintptr_t)early_pmd, @@ -611,7 +633,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) #endif #if defined(CONFIG_64BIT) && !defined(CONFIG_MAXPHYSMEM_2GB) - set_satp_mode(load_pa); + set_satp_mode(load_pa, dtb_pa); #endif kernel_virt_addr = KERNEL_VIRT_ADDR; -- 2.20.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-01-04 20:09 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-04 19:58 [RFC PATCH 00/12] Introduce sv48 support without relocable kernel Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-04 19:58 ` [RFC PATCH 01/12] riscv: Move kernel mapping outside of linear mapping Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-05 11:40 ` Anup Patel 2021-01-05 11:40 ` Anup Patel 2021-01-06 6:36 ` Alex Ghiti 2021-01-06 6:36 ` Alex Ghiti 2021-01-06 6:44 ` Anup Patel 2021-01-06 6:44 ` Anup Patel 2021-01-06 8:16 ` Alex Ghiti 2021-01-06 8:16 ` Alex Ghiti 2021-01-04 19:58 ` [RFC PATCH 02/12] riscv: Protect the kernel " Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-05 11:50 ` Anup Patel 2021-01-05 11:50 ` Anup Patel 2021-01-04 19:58 ` [RFC PATCH 03/12] riscv: Get rid of compile time logic with MAX_EARLY_MAPPING_SIZE Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-04 19:58 ` [RFC PATCH 04/12] riscv: Allow to dynamically define VA_BITS Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-05 12:06 ` Anup Patel 2021-01-05 12:06 ` Anup Patel 2021-01-06 6:38 ` Alex Ghiti 2021-01-06 6:38 ` Alex Ghiti 2021-01-04 19:58 ` [RFC PATCH 05/12] riscv: Simplify MAXPHYSMEM config Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-04 19:58 ` [RFC PATCH 06/12] riscv: Prepare ptdump for vm layout dynamic addresses Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-04 19:58 ` [RFC PATCH 07/12] asm-generic: Prepare for riscv use of pud_alloc_one and pud_free Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-04 19:58 ` [RFC PATCH 08/12] riscv: Implement sv48 support Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-05 5:28 ` kernel test robot 2021-01-04 19:58 ` Alexandre Ghiti [this message] 2021-01-04 19:58 ` [RFC PATCH 09/12] riscv: Allow user to downgrade to sv39 when hw supports sv48 Alexandre Ghiti 2021-01-04 19:58 ` [RFC PATCH 10/12] riscv: Use pgtable_l4_enabled to output mmu type in cpuinfo Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-04 19:58 ` [RFC PATCH 11/12] riscv: Explicit comment about user virtual address space size Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-04 19:58 ` [RFC PATCH 12/12] riscv: Improve virtual kernel memory layout dump Alexandre Ghiti 2021-01-04 19:58 ` Alexandre Ghiti 2021-01-05 0:33 ` kernel test robot 2021-01-05 2:44 ` kernel test robot 2021-01-05 5:30 ` kernel test robot 2021-01-30 9:33 ` [RFC PATCH 00/12] Introduce sv48 support without relocable kernel Alex Ghiti 2021-01-30 9:33 ` Alex Ghiti 2021-02-03 3:04 ` Palmer Dabbelt 2021-02-03 3:04 ` Palmer Dabbelt
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