All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Paul Burton" <paulburton@kernel.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v3 09/15] target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5
Date: Mon,  4 Jan 2021 23:11:48 +0100	[thread overview]
Message-ID: <20210104221154.3127610-10-f4bug@amsat.org> (raw)
In-Reply-To: <20210104221154.3127610-1-f4bug@amsat.org>

Use the single ISA_MIPS32R5 definition to check if the Release 5
ISA is supported, whether the CPU support 32/64-bit.

For now we keep '32' in the definition name, we will rename it
as ISA_MIPS_R5 in few commits.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/mips-defs.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index ccdde0b4a43..b71127ddd7c 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -20,7 +20,6 @@
 #define ISA_MIPS32R2      0x0000000000000040ULL
 #define ISA_MIPS32R3      0x0000000000000200ULL
 #define ISA_MIPS32R5      0x0000000000000800ULL
-#define ISA_MIPS64R5      0x0000000000001000ULL
 #define ISA_MIPS32R6      0x0000000000002000ULL
 #define ISA_MIPS64R6      0x0000000000004000ULL
 #define ISA_NANOMIPS32    0x0000000000008000ULL
@@ -84,7 +83,7 @@
 
 /* MIPS Technologies "Release 5" */
 #define CPU_MIPS32R5    (CPU_MIPS32R3 | ISA_MIPS32R5)
-#define CPU_MIPS64R5    (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
+#define CPU_MIPS64R5    (CPU_MIPS64R3 | CPU_MIPS32R5)
 
 /* MIPS Technologies "Release 6" */
 #define CPU_MIPS32R6    (CPU_MIPS32R5 | ISA_MIPS32R6)
-- 
2.26.2



  parent reply	other threads:[~2021-01-04 22:25 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-04 22:11 [PATCH v3 00/15] target/mips/mips-defs: Simplify ISA definitions Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 01/15] target/mips/mips-defs: Remove USE_HOST_FLOAT_REGS comment Philippe Mathieu-Daudé
2021-01-04 23:24   ` Richard Henderson
2021-01-04 22:11 ` [PATCH v3 02/15] target/mips/mips-defs: Reorder CPU_MIPS5 definition Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 03/15] target/mips/mips-defs: Rename CPU_MIPSxx Release 1 as CPU_MIPSxxR1 Philippe Mathieu-Daudé
2021-01-04 23:25   ` Richard Henderson
2021-01-04 22:11 ` [PATCH v3 04/15] target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit() Philippe Mathieu-Daudé
2021-01-04 23:30   ` Richard Henderson
2021-01-05  8:34     ` Philippe Mathieu-Daudé
2021-01-05 10:05       ` Philippe Mathieu-Daudé
2021-01-05 16:01         ` Richard Henderson
2021-01-06 17:55           ` Philippe Mathieu-Daudé
2021-01-06  4:23         ` Jiaxun Yang
2021-01-06  5:22           ` Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 05/15] hw/mips/boston: Check 64-bit support with cpu_type_is_64bit() Philippe Mathieu-Daudé
2021-01-04 23:32   ` Richard Henderson
2021-01-04 22:11 ` [PATCH v3 06/15] target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 07/15] target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 08/15] target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3 Philippe Mathieu-Daudé
2021-01-04 22:11 ` Philippe Mathieu-Daudé [this message]
2021-01-04 22:11 ` [PATCH v3 10/15] target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 11/15] target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 12/15] target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 13/15] target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 14/15] target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 15/15] target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6 Philippe Mathieu-Daudé
2021-01-06 17:56 ` [PATCH v3 00/15] target/mips/mips-defs: Simplify ISA definitions Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210104221154.3127610-10-f4bug@amsat.org \
    --to=f4bug@amsat.org \
    --cc=aleksandar.rikalo@syrmia.com \
    --cc=aurelien@aurel32.net \
    --cc=paulburton@kernel.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.