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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Paul Burton" <paulburton@kernel.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v3 14/15] target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5
Date: Mon,  4 Jan 2021 23:11:53 +0100	[thread overview]
Message-ID: <20210104221154.3127610-15-f4bug@amsat.org> (raw)
In-Reply-To: <20210104221154.3127610-1-f4bug@amsat.org>

The MIPS ISA release 5 is common to 32/64-bit CPUs.

To avoid holes in the insn_flags type, update the
definition with the next available bit.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/mips-defs.h | 4 ++--
 target/mips/translate.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index 12ff2b3280c..181f3715472 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -19,7 +19,7 @@
 #define ISA_MIPS_R1       0x0000000000000020ULL
 #define ISA_MIPS_R2       0x0000000000000040ULL
 #define ISA_MIPS_R3       0x0000000000000080ULL
-#define ISA_MIPS32R5      0x0000000000000800ULL
+#define ISA_MIPS_R5       0x0000000000000100ULL
 #define ISA_MIPS32R6      0x0000000000002000ULL
 #define ISA_NANOMIPS32    0x0000000000008000ULL
 /*
@@ -81,7 +81,7 @@
 #define CPU_MIPS64R3    (CPU_MIPS64R2 | CPU_MIPS32R3)
 
 /* MIPS Technologies "Release 5" */
-#define CPU_MIPS32R5    (CPU_MIPS32R3 | ISA_MIPS32R5)
+#define CPU_MIPS32R5    (CPU_MIPS32R3 | ISA_MIPS_R5)
 #define CPU_MIPS64R5    (CPU_MIPS64R3 | CPU_MIPS32R5)
 
 /* MIPS Technologies "Release 6" */
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 9c71d306ee5..83fd6c473a5 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -10993,7 +10993,7 @@ static void gen_cp0(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
             if (ctx->opcode & (1 << bit_shift)) {
                 /* OPC_ERETNC */
                 opn = "eretnc";
-                check_insn(ctx, ISA_MIPS32R5);
+                check_insn(ctx, ISA_MIPS_R5);
                 gen_helper_eretnc(cpu_env);
             } else {
                 /* OPC_ERET */
-- 
2.26.2



  parent reply	other threads:[~2021-01-04 22:28 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-04 22:11 [PATCH v3 00/15] target/mips/mips-defs: Simplify ISA definitions Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 01/15] target/mips/mips-defs: Remove USE_HOST_FLOAT_REGS comment Philippe Mathieu-Daudé
2021-01-04 23:24   ` Richard Henderson
2021-01-04 22:11 ` [PATCH v3 02/15] target/mips/mips-defs: Reorder CPU_MIPS5 definition Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 03/15] target/mips/mips-defs: Rename CPU_MIPSxx Release 1 as CPU_MIPSxxR1 Philippe Mathieu-Daudé
2021-01-04 23:25   ` Richard Henderson
2021-01-04 22:11 ` [PATCH v3 04/15] target/mips/mips-defs: Introduce CPU_MIPS64 and cpu_type_is_64bit() Philippe Mathieu-Daudé
2021-01-04 23:30   ` Richard Henderson
2021-01-05  8:34     ` Philippe Mathieu-Daudé
2021-01-05 10:05       ` Philippe Mathieu-Daudé
2021-01-05 16:01         ` Richard Henderson
2021-01-06 17:55           ` Philippe Mathieu-Daudé
2021-01-06  4:23         ` Jiaxun Yang
2021-01-06  5:22           ` Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 05/15] hw/mips/boston: Check 64-bit support with cpu_type_is_64bit() Philippe Mathieu-Daudé
2021-01-04 23:32   ` Richard Henderson
2021-01-04 22:11 ` [PATCH v3 06/15] target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 07/15] target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 08/15] target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 09/15] target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 10/15] target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 11/15] target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 12/15] target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2 Philippe Mathieu-Daudé
2021-01-04 22:11 ` [PATCH v3 13/15] target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3 Philippe Mathieu-Daudé
2021-01-04 22:11 ` Philippe Mathieu-Daudé [this message]
2021-01-04 22:11 ` [PATCH v3 15/15] target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6 Philippe Mathieu-Daudé
2021-01-06 17:56 ` [PATCH v3 00/15] target/mips/mips-defs: Simplify ISA definitions Philippe Mathieu-Daudé

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