Re: [Intel-gfx] [PATCH] drm/i915/pps: Reuse POWER_DOMAIN_DISPLAY_CORE in pps_{lock, unlock}

[Imre Deak <imre.deak@intel.com>]

On Fri, Jan 08, 2021 at 11:38:04AM +0200, Jani Nikula wrote:
> On Thu, 07 Jan 2021, Anshuman Gupta <anshuman.gupta@intel.com> wrote:
> > We need a power_domain wakeref in pps_{lock,unlock} to prevent
> > a race while resetting pps state in intel_power_sequencer_reset().
> >
> > intel_power_sequencer_reset() need a pps_mutex to access pps_pipe
> > but it can't grab pps_mutex due to deadlock with power_well
> > functions are called while holding pps_mutex.
> > intel_power_sequencer_reset() is called by power_well function
> > associated with legacy platforms like vlv and chv therefore re-use
> > the POWER_DOMAIN_DISPLAY_CORE power domain, which only used
> > by vlv and chv display power domain.
> >
> > This will avoids the unnecessary noise of unrelated power wells
> > in pps_{lock,unlock}.
> >
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> 
> Imre convinced me yesterday on irc that this should work.
> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> On the surface, this reduces the need to enable/disable the aux power so
> much. It's unnecessary, so it stands to reason to optimize it. We should
> only grab the domain references we actually need.
> 
> However, this *also* papers over an issue we've been seeing [1]. We need
> to be aware the root cause for that remains unknown, and needs to be
> figured out.
> 
> I presume simply doing aux transfers won't reproduce the problem,
> because that disables the power asynchronously since commit f39194a7a8b9
> ("drm/i915: Disable power asynchronously during DP AUX
> transfers"). Perhaps we wouldn't have seen this at all if pps_unlock()
> also did that as suggested in the commit message.
> 
> Anyway, I'd like to get acks or rb's from Imre and Ville before merging
> this.

Looks ok to me:
Acked-by: Imre Deak <imre.deak@intel.com>

> 
> 
> BR,
> Jani.
> 
> 
> [1] http://lore.kernel.org/r/20201204081845.26528-1-anshuman.gupta@intel.com
> 
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c | 8 ++------
> >  1 file changed, 2 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 8a00e609085f..4f190a82d4ad 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -895,9 +895,7 @@ pps_lock(struct intel_dp *intel_dp)
> >  	 * See intel_power_sequencer_reset() why we need
> >  	 * a power domain reference here.
> >  	 */
> > -	wakeref = intel_display_power_get(dev_priv,
> > -					  intel_aux_power_domain(dp_to_dig_port(intel_dp)));
> > -
> > +	wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
> >  	mutex_lock(&dev_priv->pps_mutex);
> >  
> >  	return wakeref;
> > @@ -909,9 +907,7 @@ pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref)
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >  
> >  	mutex_unlock(&dev_priv->pps_mutex);
> > -	intel_display_power_put(dev_priv,
> > -				intel_aux_power_domain(dp_to_dig_port(intel_dp)),
> > -				wakeref);
> > +	intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
> >  	return 0;
> >  }
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center
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