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From: Leif Lindholm <leif@nuviainc.com>
To: qemu-devel@nongnu.org
Cc: Laurent Desnogues <laurent.desnogues@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org
Subject: [PATCH v3 4/6] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h
Date: Fri,  8 Jan 2021 18:51:52 +0000	[thread overview]
Message-ID: <20210108185154.8108-5-leif@nuviainc.com> (raw)
In-Reply-To: <20210108185154.8108-1-leif@nuviainc.com>

Signed-off-by: Leif Lindholm <leif@nuviainc.com>
---
 target/arm/cpu.h | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 063228de2a..18c1cb02bb 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1736,6 +1736,37 @@ FIELD(V7M_FPCCR, ASPEN, 31, 1)
 /*
  * System register ID fields.
  */
+FIELD(CLIDR_EL1, CTYPE1, 0, 3)
+FIELD(CLIDR_EL1, CTYPE2, 3, 3)
+FIELD(CLIDR_EL1, CTYPE3, 6, 3)
+FIELD(CLIDR_EL1, CTYPE4, 9, 3)
+FIELD(CLIDR_EL1, CTYPE5, 12, 3)
+FIELD(CLIDR_EL1, CTYPE6, 15, 3)
+FIELD(CLIDR_EL1, CTYPE7, 18, 3)
+FIELD(CLIDR_EL1, LOUIS, 21, 3)
+FIELD(CLIDR_EL1, LOC, 24, 3)
+FIELD(CLIDR_EL1, LOUU, 27, 3)
+FIELD(CLIDR_EL1, ICB, 30, 3)
+
+/* When FEAT_CCIDX is implemented */
+FIELD(CCSIDR_EL1, CCIDX_LINESIZE, 0, 3)
+FIELD(CCSIDR_EL1, CCIDX_ASSOCIATIVITY, 3, 21)
+FIELD(CCSIDR_EL1, CCIDX_NUMSETS, 32, 24)
+
+/* When FEAT_CCIDX is not implemented */
+FIELD(CCSIDR_EL1, LINESIZE, 0, 3)
+FIELD(CCSIDR_EL1, ASSOCIATIVITY, 3, 10)
+FIELD(CCSIDR_EL1, NUMSETS, 13, 15)
+
+FIELD(CTR_EL0,  IMINLINE, 0, 4)
+FIELD(CTR_EL0,  L1IP, 14, 2)
+FIELD(CTR_EL0,  DMINLINE, 16, 4)
+FIELD(CTR_EL0,  ERG, 20, 4)
+FIELD(CTR_EL0,  CWG, 24, 4)
+FIELD(CTR_EL0,  IDC, 28, 1)
+FIELD(CTR_EL0,  DIC, 29, 1)
+FIELD(CTR_EL0,  TMINLINE, 32, 6)
+
 FIELD(MIDR_EL1, REVISION, 0, 4)
 FIELD(MIDR_EL1, PARTNUM, 4, 12)
 FIELD(MIDR_EL1, ARCHITECTURE, 16, 4)
-- 
2.20.1



  parent reply	other threads:[~2021-01-08 18:56 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-08 18:51 [PATCH v3 0/6] target/arm: various changes to cpu.h Leif Lindholm
2021-01-08 18:51 ` [PATCH v3 1/6] target/arm: fix typo in cpu.h ID_AA64PFR1 field name Leif Lindholm
2021-01-08 18:51 ` [PATCH v3 2/6] target/arm: make ARMCPU.clidr 64-bit Leif Lindholm
2021-01-08 18:51 ` [PATCH v3 3/6] target/arm: make ARMCPU.ctr 64-bit Leif Lindholm
2021-01-08 19:03   ` Hao Wu via
2021-01-08 22:33   ` Richard Henderson
2021-01-11 10:31   ` Laurent Desnogues
2021-01-08 18:51 ` Leif Lindholm [this message]
2021-01-11 10:30   ` [PATCH v3 4/6] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h Laurent Desnogues
2021-01-08 18:51 ` [PATCH v3 5/6] target/arm: add aarch64 ID register fields " Leif Lindholm
2021-01-08 18:51 ` [PATCH v3 6/6] target/arm: add aarch32 " Leif Lindholm
2021-01-12 10:12 ` [PATCH v3 0/6] target/arm: various changes " Peter Maydell

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