* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-11 8:53 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2021-01-11 8:53 UTC (permalink / raw)
To: Jeremy Cline, Harry Wentland, Leo Li
Cc: David Airlie, linux-kernel, dri-devel, Timothy Pearson, amd-gfx,
Daniel Vetter, Alex Deucher
Am 08.01.21 um 22:58 schrieb Jeremy Cline:
> dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
> calls which can sleep, but kernel_fpu_begin() disables preemption and
> sleeping in this context is invalid.
>
> The only places the FPU appears to be required is in the
> init_soc_bounding_box() function and when calculating the
> {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
> avoid sleeping while using the FPU.
>
> Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
> Cc: Timothy Pearson <tpearson@raptorengineering.com>
> Signed-off-by: Jeremy Cline <jcline@redhat.com>
Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
kzalloc(GFP_ATOMIC) for now.
We have tons of problems with this DC_FP_START()/DC_FP_END() annotations
and are even in the process of moving them out of the file because the
compiles tend to clutter FP registers even outside of the annotated
ranges on some architectures.
Regards,
Christian.
> ---
> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> index e04ecf0fc0db..a4fa5bf016c1 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
> int i;
>
> + DC_FP_START();
> dcn2_0_nv12_soc.sr_exit_time_us =
> fixed16_to_double_to_cpu(bb->sr_exit_time_us);
> dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
> @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
> fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
> }
> + DC_FP_END();
> }
>
> if (pool->base.pp_smu) {
> @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
> enum dml_project dml_project_version =
> get_dml_project_version(ctx->asic_id.hw_internal_rev);
>
> - DC_FP_START();
> -
> ctx->dc_bios->regs = &bios_regs;
> pool->base.funcs = &dcn20_res_pool_funcs;
>
> @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
> ranges.reader_wm_sets[i].wm_inst = i;
> ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
> ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
> + DC_FP_START();
> ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
> ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
> + DC_FP_END();
>
> ranges.num_reader_wm_sets = i + 1;
> }
> @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
> pool->base.oem_device = NULL;
> }
>
> - DC_FP_END();
> return true;
>
> create_fail:
>
> - DC_FP_END();
> dcn20_resource_destruct(pool);
>
> return false;
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-11 8:53 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2021-01-11 8:53 UTC (permalink / raw)
To: Jeremy Cline, Harry Wentland, Leo Li
Cc: David Airlie, linux-kernel, dri-devel, Timothy Pearson, amd-gfx,
Alex Deucher
Am 08.01.21 um 22:58 schrieb Jeremy Cline:
> dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
> calls which can sleep, but kernel_fpu_begin() disables preemption and
> sleeping in this context is invalid.
>
> The only places the FPU appears to be required is in the
> init_soc_bounding_box() function and when calculating the
> {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
> avoid sleeping while using the FPU.
>
> Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
> Cc: Timothy Pearson <tpearson@raptorengineering.com>
> Signed-off-by: Jeremy Cline <jcline@redhat.com>
Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
kzalloc(GFP_ATOMIC) for now.
We have tons of problems with this DC_FP_START()/DC_FP_END() annotations
and are even in the process of moving them out of the file because the
compiles tend to clutter FP registers even outside of the annotated
ranges on some architectures.
Regards,
Christian.
> ---
> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> index e04ecf0fc0db..a4fa5bf016c1 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
> int i;
>
> + DC_FP_START();
> dcn2_0_nv12_soc.sr_exit_time_us =
> fixed16_to_double_to_cpu(bb->sr_exit_time_us);
> dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
> @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
> fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
> }
> + DC_FP_END();
> }
>
> if (pool->base.pp_smu) {
> @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
> enum dml_project dml_project_version =
> get_dml_project_version(ctx->asic_id.hw_internal_rev);
>
> - DC_FP_START();
> -
> ctx->dc_bios->regs = &bios_regs;
> pool->base.funcs = &dcn20_res_pool_funcs;
>
> @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
> ranges.reader_wm_sets[i].wm_inst = i;
> ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
> ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
> + DC_FP_START();
> ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
> ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
> + DC_FP_END();
>
> ranges.num_reader_wm_sets = i + 1;
> }
> @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
> pool->base.oem_device = NULL;
> }
>
> - DC_FP_END();
> return true;
>
> create_fail:
>
> - DC_FP_END();
> dcn20_resource_destruct(pool);
>
> return false;
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
2021-01-11 8:53 ` Christian König
(?)
@ 2021-01-11 15:39 ` Jeremy Cline
-1 siblings, 0 replies; 18+ messages in thread
From: Jeremy Cline @ 2021-01-11 15:39 UTC (permalink / raw)
To: Christian König
Cc: Harry Wentland, Leo Li, Alex Deucher, David Airlie,
Daniel Vetter, amd-gfx, dri-devel, linux-kernel, Timothy Pearson
Hi,
On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
> > dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
> > calls which can sleep, but kernel_fpu_begin() disables preemption and
> > sleeping in this context is invalid.
> >
> > The only places the FPU appears to be required is in the
> > init_soc_bounding_box() function and when calculating the
> > {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
> > avoid sleeping while using the FPU.
> >
> > Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
> > Cc: Timothy Pearson <tpearson@raptorengineering.com>
> > Signed-off-by: Jeremy Cline <jcline@redhat.com>
>
> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
> kzalloc(GFP_ATOMIC) for now.
>
> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
> are even in the process of moving them out of the file because the compiles
> tend to clutter FP registers even outside of the annotated ranges on some
> architectures.
>
Thanks for the review. Is it acceptable to move the DC_FP_END()
annotation up to the last usage? Keeping it where it is is probably
do-able, but covers things like calls to resource_construct() which
makes use of struct resource_create_funcs. I'm guessing only a sub-set
of the implementations are called via this function, but having an
interface which can't sleep sometimes doesn't sound appealing.
Happy to do it, but before I go down that road I just wanted to make
sure that's what you had in mind.
Thanks,
Jeremy
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > index e04ecf0fc0db..a4fa5bf016c1 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
> > int i;
> > + DC_FP_START();
> > dcn2_0_nv12_soc.sr_exit_time_us =
> > fixed16_to_double_to_cpu(bb->sr_exit_time_us);
> > dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
> > @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
> > fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
> > }
> > + DC_FP_END();
> > }
> > if (pool->base.pp_smu) {
> > @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
> > enum dml_project dml_project_version =
> > get_dml_project_version(ctx->asic_id.hw_internal_rev);
> > - DC_FP_START();
> > -
> > ctx->dc_bios->regs = &bios_regs;
> > pool->base.funcs = &dcn20_res_pool_funcs;
> > @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
> > ranges.reader_wm_sets[i].wm_inst = i;
> > ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
> > ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
> > + DC_FP_START();
> > ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
> > ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
> > + DC_FP_END();
> > ranges.num_reader_wm_sets = i + 1;
> > }
> > @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
> > pool->base.oem_device = NULL;
> > }
> > - DC_FP_END();
> > return true;
> > create_fail:
> > - DC_FP_END();
> > dcn20_resource_destruct(pool);
> > return false;
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-11 15:39 ` Jeremy Cline
0 siblings, 0 replies; 18+ messages in thread
From: Jeremy Cline @ 2021-01-11 15:39 UTC (permalink / raw)
To: Christian König
Cc: Leo Li, linux-kernel, amd-gfx, David Airlie, Timothy Pearson,
dri-devel, Daniel Vetter, Alex Deucher, Harry Wentland
Hi,
On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
> > dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
> > calls which can sleep, but kernel_fpu_begin() disables preemption and
> > sleeping in this context is invalid.
> >
> > The only places the FPU appears to be required is in the
> > init_soc_bounding_box() function and when calculating the
> > {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
> > avoid sleeping while using the FPU.
> >
> > Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
> > Cc: Timothy Pearson <tpearson@raptorengineering.com>
> > Signed-off-by: Jeremy Cline <jcline@redhat.com>
>
> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
> kzalloc(GFP_ATOMIC) for now.
>
> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
> are even in the process of moving them out of the file because the compiles
> tend to clutter FP registers even outside of the annotated ranges on some
> architectures.
>
Thanks for the review. Is it acceptable to move the DC_FP_END()
annotation up to the last usage? Keeping it where it is is probably
do-able, but covers things like calls to resource_construct() which
makes use of struct resource_create_funcs. I'm guessing only a sub-set
of the implementations are called via this function, but having an
interface which can't sleep sometimes doesn't sound appealing.
Happy to do it, but before I go down that road I just wanted to make
sure that's what you had in mind.
Thanks,
Jeremy
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > index e04ecf0fc0db..a4fa5bf016c1 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
> > int i;
> > + DC_FP_START();
> > dcn2_0_nv12_soc.sr_exit_time_us =
> > fixed16_to_double_to_cpu(bb->sr_exit_time_us);
> > dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
> > @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
> > fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
> > }
> > + DC_FP_END();
> > }
> > if (pool->base.pp_smu) {
> > @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
> > enum dml_project dml_project_version =
> > get_dml_project_version(ctx->asic_id.hw_internal_rev);
> > - DC_FP_START();
> > -
> > ctx->dc_bios->regs = &bios_regs;
> > pool->base.funcs = &dcn20_res_pool_funcs;
> > @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
> > ranges.reader_wm_sets[i].wm_inst = i;
> > ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
> > ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
> > + DC_FP_START();
> > ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
> > ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
> > + DC_FP_END();
> > ranges.num_reader_wm_sets = i + 1;
> > }
> > @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
> > pool->base.oem_device = NULL;
> > }
> > - DC_FP_END();
> > return true;
> > create_fail:
> > - DC_FP_END();
> > dcn20_resource_destruct(pool);
> > return false;
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-11 15:39 ` Jeremy Cline
0 siblings, 0 replies; 18+ messages in thread
From: Jeremy Cline @ 2021-01-11 15:39 UTC (permalink / raw)
To: Christian König
Cc: Leo Li, linux-kernel, amd-gfx, David Airlie, Timothy Pearson,
dri-devel, Alex Deucher
Hi,
On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
> > dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
> > calls which can sleep, but kernel_fpu_begin() disables preemption and
> > sleeping in this context is invalid.
> >
> > The only places the FPU appears to be required is in the
> > init_soc_bounding_box() function and when calculating the
> > {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
> > avoid sleeping while using the FPU.
> >
> > Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
> > Cc: Timothy Pearson <tpearson@raptorengineering.com>
> > Signed-off-by: Jeremy Cline <jcline@redhat.com>
>
> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
> kzalloc(GFP_ATOMIC) for now.
>
> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
> are even in the process of moving them out of the file because the compiles
> tend to clutter FP registers even outside of the annotated ranges on some
> architectures.
>
Thanks for the review. Is it acceptable to move the DC_FP_END()
annotation up to the last usage? Keeping it where it is is probably
do-able, but covers things like calls to resource_construct() which
makes use of struct resource_create_funcs. I'm guessing only a sub-set
of the implementations are called via this function, but having an
interface which can't sleep sometimes doesn't sound appealing.
Happy to do it, but before I go down that road I just wanted to make
sure that's what you had in mind.
Thanks,
Jeremy
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > index e04ecf0fc0db..a4fa5bf016c1 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
> > int i;
> > + DC_FP_START();
> > dcn2_0_nv12_soc.sr_exit_time_us =
> > fixed16_to_double_to_cpu(bb->sr_exit_time_us);
> > dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
> > @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
> > fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
> > }
> > + DC_FP_END();
> > }
> > if (pool->base.pp_smu) {
> > @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
> > enum dml_project dml_project_version =
> > get_dml_project_version(ctx->asic_id.hw_internal_rev);
> > - DC_FP_START();
> > -
> > ctx->dc_bios->regs = &bios_regs;
> > pool->base.funcs = &dcn20_res_pool_funcs;
> > @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
> > ranges.reader_wm_sets[i].wm_inst = i;
> > ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
> > ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
> > + DC_FP_START();
> > ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
> > ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
> > + DC_FP_END();
> > ranges.num_reader_wm_sets = i + 1;
> > }
> > @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
> > pool->base.oem_device = NULL;
> > }
> > - DC_FP_END();
> > return true;
> > create_fail:
> > - DC_FP_END();
> > dcn20_resource_destruct(pool);
> > return false;
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
2021-01-11 15:39 ` Jeremy Cline
(?)
@ 2021-01-12 11:01 ` Christian König
-1 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2021-01-12 11:01 UTC (permalink / raw)
To: Jeremy Cline
Cc: Harry Wentland, Leo Li, Alex Deucher, David Airlie,
Daniel Vetter, amd-gfx, dri-devel, linux-kernel, Timothy Pearson
Am 11.01.21 um 16:39 schrieb Jeremy Cline:
> Hi,
>
> On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
>> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
>>> dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
>>> calls which can sleep, but kernel_fpu_begin() disables preemption and
>>> sleeping in this context is invalid.
>>>
>>> The only places the FPU appears to be required is in the
>>> init_soc_bounding_box() function and when calculating the
>>> {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
>>> avoid sleeping while using the FPU.
>>>
>>> Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
>>> Cc: Timothy Pearson <tpearson@raptorengineering.com>
>>> Signed-off-by: Jeremy Cline <jcline@redhat.com>
>> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
>> kzalloc(GFP_ATOMIC) for now.
>>
>> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
>> are even in the process of moving them out of the file because the compiles
>> tend to clutter FP registers even outside of the annotated ranges on some
>> architectures.
>>
> Thanks for the review. Is it acceptable to move the DC_FP_END()
> annotation up to the last usage? Keeping it where it is is probably
> do-able, but covers things like calls to resource_construct() which
> makes use of struct resource_create_funcs. I'm guessing only a sub-set
> of the implementations are called via this function, but having an
> interface which can't sleep sometimes doesn't sound appealing.
>
> Happy to do it, but before I go down that road I just wanted to make
> sure that's what you had in mind.
I can't fully judge that either. Harry and the rest of our DC team needs
to decide that.
Thanks,
Christian.
>
> Thanks,
> Jeremy
>
>>> ---
>>> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> index e04ecf0fc0db..a4fa5bf016c1 100644
>>> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
>>> int i;
>>> + DC_FP_START();
>>> dcn2_0_nv12_soc.sr_exit_time_us =
>>> fixed16_to_double_to_cpu(bb->sr_exit_time_us);
>>> dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
>>> @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
>>> fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
>>> }
>>> + DC_FP_END();
>>> }
>>> if (pool->base.pp_smu) {
>>> @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
>>> enum dml_project dml_project_version =
>>> get_dml_project_version(ctx->asic_id.hw_internal_rev);
>>> - DC_FP_START();
>>> -
>>> ctx->dc_bios->regs = &bios_regs;
>>> pool->base.funcs = &dcn20_res_pool_funcs;
>>> @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
>>> ranges.reader_wm_sets[i].wm_inst = i;
>>> ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
>>> ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
>>> + DC_FP_START();
>>> ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
>>> ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
>>> + DC_FP_END();
>>> ranges.num_reader_wm_sets = i + 1;
>>> }
>>> @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
>>> pool->base.oem_device = NULL;
>>> }
>>> - DC_FP_END();
>>> return true;
>>> create_fail:
>>> - DC_FP_END();
>>> dcn20_resource_destruct(pool);
>>> return false;
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-12 11:01 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2021-01-12 11:01 UTC (permalink / raw)
To: Jeremy Cline
Cc: Leo Li, linux-kernel, amd-gfx, David Airlie, Timothy Pearson,
dri-devel, Daniel Vetter, Alex Deucher, Harry Wentland
Am 11.01.21 um 16:39 schrieb Jeremy Cline:
> Hi,
>
> On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
>> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
>>> dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
>>> calls which can sleep, but kernel_fpu_begin() disables preemption and
>>> sleeping in this context is invalid.
>>>
>>> The only places the FPU appears to be required is in the
>>> init_soc_bounding_box() function and when calculating the
>>> {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
>>> avoid sleeping while using the FPU.
>>>
>>> Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
>>> Cc: Timothy Pearson <tpearson@raptorengineering.com>
>>> Signed-off-by: Jeremy Cline <jcline@redhat.com>
>> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
>> kzalloc(GFP_ATOMIC) for now.
>>
>> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
>> are even in the process of moving them out of the file because the compiles
>> tend to clutter FP registers even outside of the annotated ranges on some
>> architectures.
>>
> Thanks for the review. Is it acceptable to move the DC_FP_END()
> annotation up to the last usage? Keeping it where it is is probably
> do-able, but covers things like calls to resource_construct() which
> makes use of struct resource_create_funcs. I'm guessing only a sub-set
> of the implementations are called via this function, but having an
> interface which can't sleep sometimes doesn't sound appealing.
>
> Happy to do it, but before I go down that road I just wanted to make
> sure that's what you had in mind.
I can't fully judge that either. Harry and the rest of our DC team needs
to decide that.
Thanks,
Christian.
>
> Thanks,
> Jeremy
>
>>> ---
>>> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> index e04ecf0fc0db..a4fa5bf016c1 100644
>>> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
>>> int i;
>>> + DC_FP_START();
>>> dcn2_0_nv12_soc.sr_exit_time_us =
>>> fixed16_to_double_to_cpu(bb->sr_exit_time_us);
>>> dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
>>> @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
>>> fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
>>> }
>>> + DC_FP_END();
>>> }
>>> if (pool->base.pp_smu) {
>>> @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
>>> enum dml_project dml_project_version =
>>> get_dml_project_version(ctx->asic_id.hw_internal_rev);
>>> - DC_FP_START();
>>> -
>>> ctx->dc_bios->regs = &bios_regs;
>>> pool->base.funcs = &dcn20_res_pool_funcs;
>>> @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
>>> ranges.reader_wm_sets[i].wm_inst = i;
>>> ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
>>> ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
>>> + DC_FP_START();
>>> ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
>>> ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
>>> + DC_FP_END();
>>> ranges.num_reader_wm_sets = i + 1;
>>> }
>>> @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
>>> pool->base.oem_device = NULL;
>>> }
>>> - DC_FP_END();
>>> return true;
>>> create_fail:
>>> - DC_FP_END();
>>> dcn20_resource_destruct(pool);
>>> return false;
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-12 11:01 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2021-01-12 11:01 UTC (permalink / raw)
To: Jeremy Cline
Cc: Leo Li, linux-kernel, amd-gfx, David Airlie, Timothy Pearson,
dri-devel, Alex Deucher
Am 11.01.21 um 16:39 schrieb Jeremy Cline:
> Hi,
>
> On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
>> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
>>> dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
>>> calls which can sleep, but kernel_fpu_begin() disables preemption and
>>> sleeping in this context is invalid.
>>>
>>> The only places the FPU appears to be required is in the
>>> init_soc_bounding_box() function and when calculating the
>>> {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
>>> avoid sleeping while using the FPU.
>>>
>>> Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
>>> Cc: Timothy Pearson <tpearson@raptorengineering.com>
>>> Signed-off-by: Jeremy Cline <jcline@redhat.com>
>> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
>> kzalloc(GFP_ATOMIC) for now.
>>
>> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
>> are even in the process of moving them out of the file because the compiles
>> tend to clutter FP registers even outside of the annotated ranges on some
>> architectures.
>>
> Thanks for the review. Is it acceptable to move the DC_FP_END()
> annotation up to the last usage? Keeping it where it is is probably
> do-able, but covers things like calls to resource_construct() which
> makes use of struct resource_create_funcs. I'm guessing only a sub-set
> of the implementations are called via this function, but having an
> interface which can't sleep sometimes doesn't sound appealing.
>
> Happy to do it, but before I go down that road I just wanted to make
> sure that's what you had in mind.
I can't fully judge that either. Harry and the rest of our DC team needs
to decide that.
Thanks,
Christian.
>
> Thanks,
> Jeremy
>
>>> ---
>>> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> index e04ecf0fc0db..a4fa5bf016c1 100644
>>> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
>>> int i;
>>> + DC_FP_START();
>>> dcn2_0_nv12_soc.sr_exit_time_us =
>>> fixed16_to_double_to_cpu(bb->sr_exit_time_us);
>>> dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
>>> @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
>>> fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
>>> }
>>> + DC_FP_END();
>>> }
>>> if (pool->base.pp_smu) {
>>> @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
>>> enum dml_project dml_project_version =
>>> get_dml_project_version(ctx->asic_id.hw_internal_rev);
>>> - DC_FP_START();
>>> -
>>> ctx->dc_bios->regs = &bios_regs;
>>> pool->base.funcs = &dcn20_res_pool_funcs;
>>> @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
>>> ranges.reader_wm_sets[i].wm_inst = i;
>>> ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
>>> ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
>>> + DC_FP_START();
>>> ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
>>> ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
>>> + DC_FP_END();
>>> ranges.num_reader_wm_sets = i + 1;
>>> }
>>> @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
>>> pool->base.oem_device = NULL;
>>> }
>>> - DC_FP_END();
>>> return true;
>>> create_fail:
>>> - DC_FP_END();
>>> dcn20_resource_destruct(pool);
>>> return false;
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
2021-01-11 8:53 ` Christian König
(?)
@ 2021-01-11 16:32 ` Daniel Vetter
-1 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2021-01-11 16:32 UTC (permalink / raw)
To: Christian König
Cc: Jeremy Cline, Harry Wentland, Leo Li, Alex Deucher, David Airlie,
Daniel Vetter, amd-gfx, dri-devel, linux-kernel, Timothy Pearson
On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
> > dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
> > calls which can sleep, but kernel_fpu_begin() disables preemption and
> > sleeping in this context is invalid.
> >
> > The only places the FPU appears to be required is in the
> > init_soc_bounding_box() function and when calculating the
> > {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
> > avoid sleeping while using the FPU.
> >
> > Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
> > Cc: Timothy Pearson <tpearson@raptorengineering.com>
> > Signed-off-by: Jeremy Cline <jcline@redhat.com>
>
> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
> kzalloc(GFP_ATOMIC) for now.
>
> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
> are even in the process of moving them out of the file because the compiles
> tend to clutter FP registers even outside of the annotated ranges on some
> architectures.
Out of curiosity, what's the plan? Soft-fp implementation for DC so you
can keep the algorithms all unchanged, or redoing them as some fixed point
with careful review and retesting everything? Something else?
-Daniel
>
> Regards,
> Christian.
>
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > index e04ecf0fc0db..a4fa5bf016c1 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
> > int i;
> > + DC_FP_START();
> > dcn2_0_nv12_soc.sr_exit_time_us =
> > fixed16_to_double_to_cpu(bb->sr_exit_time_us);
> > dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
> > @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
> > fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
> > }
> > + DC_FP_END();
> > }
> > if (pool->base.pp_smu) {
> > @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
> > enum dml_project dml_project_version =
> > get_dml_project_version(ctx->asic_id.hw_internal_rev);
> > - DC_FP_START();
> > -
> > ctx->dc_bios->regs = &bios_regs;
> > pool->base.funcs = &dcn20_res_pool_funcs;
> > @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
> > ranges.reader_wm_sets[i].wm_inst = i;
> > ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
> > ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
> > + DC_FP_START();
> > ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
> > ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
> > + DC_FP_END();
> > ranges.num_reader_wm_sets = i + 1;
> > }
> > @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
> > pool->base.oem_device = NULL;
> > }
> > - DC_FP_END();
> > return true;
> > create_fail:
> > - DC_FP_END();
> > dcn20_resource_destruct(pool);
> > return false;
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-11 16:32 ` Daniel Vetter
0 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2021-01-11 16:32 UTC (permalink / raw)
To: Christian König
Cc: Leo Li, David Airlie, linux-kernel, amd-gfx, Jeremy Cline,
Timothy Pearson, dri-devel, Daniel Vetter, Alex Deucher,
Harry Wentland
On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
> > dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
> > calls which can sleep, but kernel_fpu_begin() disables preemption and
> > sleeping in this context is invalid.
> >
> > The only places the FPU appears to be required is in the
> > init_soc_bounding_box() function and when calculating the
> > {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
> > avoid sleeping while using the FPU.
> >
> > Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
> > Cc: Timothy Pearson <tpearson@raptorengineering.com>
> > Signed-off-by: Jeremy Cline <jcline@redhat.com>
>
> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
> kzalloc(GFP_ATOMIC) for now.
>
> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
> are even in the process of moving them out of the file because the compiles
> tend to clutter FP registers even outside of the annotated ranges on some
> architectures.
Out of curiosity, what's the plan? Soft-fp implementation for DC so you
can keep the algorithms all unchanged, or redoing them as some fixed point
with careful review and retesting everything? Something else?
-Daniel
>
> Regards,
> Christian.
>
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > index e04ecf0fc0db..a4fa5bf016c1 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
> > int i;
> > + DC_FP_START();
> > dcn2_0_nv12_soc.sr_exit_time_us =
> > fixed16_to_double_to_cpu(bb->sr_exit_time_us);
> > dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
> > @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
> > fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
> > }
> > + DC_FP_END();
> > }
> > if (pool->base.pp_smu) {
> > @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
> > enum dml_project dml_project_version =
> > get_dml_project_version(ctx->asic_id.hw_internal_rev);
> > - DC_FP_START();
> > -
> > ctx->dc_bios->regs = &bios_regs;
> > pool->base.funcs = &dcn20_res_pool_funcs;
> > @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
> > ranges.reader_wm_sets[i].wm_inst = i;
> > ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
> > ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
> > + DC_FP_START();
> > ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
> > ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
> > + DC_FP_END();
> > ranges.num_reader_wm_sets = i + 1;
> > }
> > @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
> > pool->base.oem_device = NULL;
> > }
> > - DC_FP_END();
> > return true;
> > create_fail:
> > - DC_FP_END();
> > dcn20_resource_destruct(pool);
> > return false;
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-11 16:32 ` Daniel Vetter
0 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2021-01-11 16:32 UTC (permalink / raw)
To: Christian König
Cc: Leo Li, David Airlie, linux-kernel, amd-gfx, Jeremy Cline,
Timothy Pearson, dri-devel, Alex Deucher
On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
> > dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
> > calls which can sleep, but kernel_fpu_begin() disables preemption and
> > sleeping in this context is invalid.
> >
> > The only places the FPU appears to be required is in the
> > init_soc_bounding_box() function and when calculating the
> > {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
> > avoid sleeping while using the FPU.
> >
> > Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
> > Cc: Timothy Pearson <tpearson@raptorengineering.com>
> > Signed-off-by: Jeremy Cline <jcline@redhat.com>
>
> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
> kzalloc(GFP_ATOMIC) for now.
>
> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
> are even in the process of moving them out of the file because the compiles
> tend to clutter FP registers even outside of the annotated ranges on some
> architectures.
Out of curiosity, what's the plan? Soft-fp implementation for DC so you
can keep the algorithms all unchanged, or redoing them as some fixed point
with careful review and retesting everything? Something else?
-Daniel
>
> Regards,
> Christian.
>
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > index e04ecf0fc0db..a4fa5bf016c1 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
> > @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
> > int i;
> > + DC_FP_START();
> > dcn2_0_nv12_soc.sr_exit_time_us =
> > fixed16_to_double_to_cpu(bb->sr_exit_time_us);
> > dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
> > @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
> > dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
> > fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
> > }
> > + DC_FP_END();
> > }
> > if (pool->base.pp_smu) {
> > @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
> > enum dml_project dml_project_version =
> > get_dml_project_version(ctx->asic_id.hw_internal_rev);
> > - DC_FP_START();
> > -
> > ctx->dc_bios->regs = &bios_regs;
> > pool->base.funcs = &dcn20_res_pool_funcs;
> > @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
> > ranges.reader_wm_sets[i].wm_inst = i;
> > ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
> > ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
> > + DC_FP_START();
> > ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
> > ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
> > + DC_FP_END();
> > ranges.num_reader_wm_sets = i + 1;
> > }
> > @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
> > pool->base.oem_device = NULL;
> > }
> > - DC_FP_END();
> > return true;
> > create_fail:
> > - DC_FP_END();
> > dcn20_resource_destruct(pool);
> > return false;
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
2021-01-11 16:32 ` Daniel Vetter
(?)
@ 2021-01-12 10:58 ` Christian König
-1 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2021-01-12 10:58 UTC (permalink / raw)
To: Christian König, Jeremy Cline, Harry Wentland, Leo Li,
Alex Deucher, David Airlie, amd-gfx, dri-devel, linux-kernel,
Timothy Pearson
Am 11.01.21 um 17:32 schrieb Daniel Vetter:
> On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
>> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
>>> dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
>>> calls which can sleep, but kernel_fpu_begin() disables preemption and
>>> sleeping in this context is invalid.
>>>
>>> The only places the FPU appears to be required is in the
>>> init_soc_bounding_box() function and when calculating the
>>> {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
>>> avoid sleeping while using the FPU.
>>>
>>> Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
>>> Cc: Timothy Pearson <tpearson@raptorengineering.com>
>>> Signed-off-by: Jeremy Cline <jcline@redhat.com>
>> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
>> kzalloc(GFP_ATOMIC) for now.
>>
>> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
>> are even in the process of moving them out of the file because the compiles
>> tend to clutter FP registers even outside of the annotated ranges on some
>> architectures.
> Out of curiosity, what's the plan? Soft-fp implementation for DC so you
> can keep the algorithms all unchanged, or redoing them as some fixed point
> with careful review and retesting everything? Something else?
My last status is that we want to move all FP related functions into a
separate C file.
Then compile only that file with FP enabled and all callers of those
functions must protected the function calls with FP enable/disable.
That's the only way we can guarantee that no FP state is corrupted.
Regards,
Christian.
> -Daniel
>
>> Regards,
>> Christian.
>>
>>> ---
>>> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> index e04ecf0fc0db..a4fa5bf016c1 100644
>>> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
>>> int i;
>>> + DC_FP_START();
>>> dcn2_0_nv12_soc.sr_exit_time_us =
>>> fixed16_to_double_to_cpu(bb->sr_exit_time_us);
>>> dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
>>> @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
>>> fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
>>> }
>>> + DC_FP_END();
>>> }
>>> if (pool->base.pp_smu) {
>>> @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
>>> enum dml_project dml_project_version =
>>> get_dml_project_version(ctx->asic_id.hw_internal_rev);
>>> - DC_FP_START();
>>> -
>>> ctx->dc_bios->regs = &bios_regs;
>>> pool->base.funcs = &dcn20_res_pool_funcs;
>>> @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
>>> ranges.reader_wm_sets[i].wm_inst = i;
>>> ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
>>> ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
>>> + DC_FP_START();
>>> ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
>>> ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
>>> + DC_FP_END();
>>> ranges.num_reader_wm_sets = i + 1;
>>> }
>>> @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
>>> pool->base.oem_device = NULL;
>>> }
>>> - DC_FP_END();
>>> return true;
>>> create_fail:
>>> - DC_FP_END();
>>> dcn20_resource_destruct(pool);
>>> return false;
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-12 10:58 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2021-01-12 10:58 UTC (permalink / raw)
To: Christian König, Jeremy Cline, Harry Wentland, Leo Li,
Alex Deucher, David Airlie, amd-gfx, dri-devel, linux-kernel,
Timothy Pearson
Am 11.01.21 um 17:32 schrieb Daniel Vetter:
> On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
>> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
>>> dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
>>> calls which can sleep, but kernel_fpu_begin() disables preemption and
>>> sleeping in this context is invalid.
>>>
>>> The only places the FPU appears to be required is in the
>>> init_soc_bounding_box() function and when calculating the
>>> {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
>>> avoid sleeping while using the FPU.
>>>
>>> Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
>>> Cc: Timothy Pearson <tpearson@raptorengineering.com>
>>> Signed-off-by: Jeremy Cline <jcline@redhat.com>
>> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
>> kzalloc(GFP_ATOMIC) for now.
>>
>> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
>> are even in the process of moving them out of the file because the compiles
>> tend to clutter FP registers even outside of the annotated ranges on some
>> architectures.
> Out of curiosity, what's the plan? Soft-fp implementation for DC so you
> can keep the algorithms all unchanged, or redoing them as some fixed point
> with careful review and retesting everything? Something else?
My last status is that we want to move all FP related functions into a
separate C file.
Then compile only that file with FP enabled and all callers of those
functions must protected the function calls with FP enable/disable.
That's the only way we can guarantee that no FP state is corrupted.
Regards,
Christian.
> -Daniel
>
>> Regards,
>> Christian.
>>
>>> ---
>>> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> index e04ecf0fc0db..a4fa5bf016c1 100644
>>> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
>>> int i;
>>> + DC_FP_START();
>>> dcn2_0_nv12_soc.sr_exit_time_us =
>>> fixed16_to_double_to_cpu(bb->sr_exit_time_us);
>>> dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
>>> @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
>>> fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
>>> }
>>> + DC_FP_END();
>>> }
>>> if (pool->base.pp_smu) {
>>> @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
>>> enum dml_project dml_project_version =
>>> get_dml_project_version(ctx->asic_id.hw_internal_rev);
>>> - DC_FP_START();
>>> -
>>> ctx->dc_bios->regs = &bios_regs;
>>> pool->base.funcs = &dcn20_res_pool_funcs;
>>> @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
>>> ranges.reader_wm_sets[i].wm_inst = i;
>>> ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
>>> ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
>>> + DC_FP_START();
>>> ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
>>> ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
>>> + DC_FP_END();
>>> ranges.num_reader_wm_sets = i + 1;
>>> }
>>> @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
>>> pool->base.oem_device = NULL;
>>> }
>>> - DC_FP_END();
>>> return true;
>>> create_fail:
>>> - DC_FP_END();
>>> dcn20_resource_destruct(pool);
>>> return false;
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH] amdgpu: Avoid sleeping during FPU critical sections
@ 2021-01-12 10:58 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2021-01-12 10:58 UTC (permalink / raw)
To: Christian König, Jeremy Cline, Harry Wentland, Leo Li,
Alex Deucher, David Airlie, amd-gfx, dri-devel, linux-kernel,
Timothy Pearson
Am 11.01.21 um 17:32 schrieb Daniel Vetter:
> On Mon, Jan 11, 2021 at 09:53:56AM +0100, Christian König wrote:
>> Am 08.01.21 um 22:58 schrieb Jeremy Cline:
>>> dcn20_resource_construct() includes a number of kzalloc(GFP_KERNEL)
>>> calls which can sleep, but kernel_fpu_begin() disables preemption and
>>> sleeping in this context is invalid.
>>>
>>> The only places the FPU appears to be required is in the
>>> init_soc_bounding_box() function and when calculating the
>>> {min,max}_fill_clk_mhz. Narrow the scope to just these two parts to
>>> avoid sleeping while using the FPU.
>>>
>>> Fixes: 7a8a3430be15 ("amdgpu: Wrap FPU dependent functions in dc20")
>>> Cc: Timothy Pearson <tpearson@raptorengineering.com>
>>> Signed-off-by: Jeremy Cline <jcline@redhat.com>
>> Good catch, but I would rather replace the kzalloc(GFP_KERNEL) with a
>> kzalloc(GFP_ATOMIC) for now.
>>
>> We have tons of problems with this DC_FP_START()/DC_FP_END() annotations and
>> are even in the process of moving them out of the file because the compiles
>> tend to clutter FP registers even outside of the annotated ranges on some
>> architectures.
> Out of curiosity, what's the plan? Soft-fp implementation for DC so you
> can keep the algorithms all unchanged, or redoing them as some fixed point
> with careful review and retesting everything? Something else?
My last status is that we want to move all FP related functions into a
separate C file.
Then compile only that file with FP enabled and all callers of those
functions must protected the function calls with FP enable/disable.
That's the only way we can guarantee that no FP state is corrupted.
Regards,
Christian.
> -Daniel
>
>> Regards,
>> Christian.
>>
>>> ---
>>> drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> index e04ecf0fc0db..a4fa5bf016c1 100644
>>> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
>>> @@ -3622,6 +3622,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
>>> int i;
>>> + DC_FP_START();
>>> dcn2_0_nv12_soc.sr_exit_time_us =
>>> fixed16_to_double_to_cpu(bb->sr_exit_time_us);
>>> dcn2_0_nv12_soc.sr_enter_plus_exit_time_us =
>>> @@ -3721,6 +3722,7 @@ static bool init_soc_bounding_box(struct dc *dc,
>>> dcn2_0_nv12_soc.clock_limits[i].dram_speed_mts =
>>> fixed16_to_double_to_cpu(bb->clock_limits[i].dram_speed_mts);
>>> }
>>> + DC_FP_END();
>>> }
>>> if (pool->base.pp_smu) {
>>> @@ -3777,8 +3779,6 @@ static bool dcn20_resource_construct(
>>> enum dml_project dml_project_version =
>>> get_dml_project_version(ctx->asic_id.hw_internal_rev);
>>> - DC_FP_START();
>>> -
>>> ctx->dc_bios->regs = &bios_regs;
>>> pool->base.funcs = &dcn20_res_pool_funcs;
>>> @@ -3959,8 +3959,10 @@ static bool dcn20_resource_construct(
>>> ranges.reader_wm_sets[i].wm_inst = i;
>>> ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
>>> ranges.reader_wm_sets[i].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
>>> + DC_FP_START();
>>> ranges.reader_wm_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0;
>>> ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16;
>>> + DC_FP_END();
>>> ranges.num_reader_wm_sets = i + 1;
>>> }
>>> @@ -4125,12 +4127,10 @@ static bool dcn20_resource_construct(
>>> pool->base.oem_device = NULL;
>>> }
>>> - DC_FP_END();
>>> return true;
>>> create_fail:
>>> - DC_FP_END();
>>> dcn20_resource_destruct(pool);
>>> return false;
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 18+ messages in thread