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From: Bin Meng <bmeng.cn@gmail.com>
To: "Peter Maydell" <peter.maydell@linaro.org>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Xuzhou Cheng <xuzhou.cheng@windriver.com>,
	Bin Meng <bin.meng@windriver.com>
Subject: [PATCH v4 3/6] hw/ssi: imx_spi: Disable chip selects when controller is disabled
Date: Sun, 10 Jan 2021 16:14:26 +0800	[thread overview]
Message-ID: <20210110081429.10126-4-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210110081429.10126-1-bmeng.cn@gmail.com>

From: Xuzhou Cheng <xuzhou.cheng@windriver.com>

When a write to ECSPI_CONREG register to disable the SPI controller,
imx_spi_reset() is called to reset the controller, but chip select
lines should have been disabled, otherwise the state machine of any
devices (e.g.: SPI flashes) connected to the SPI master is stuck to
its last state and responds incorrectly to any follow-up commands.

Fixes: c906a3a01582 ("i.MX: Add the Freescale SPI Controller")
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>

---

(no changes since v3)

Changes in v3:
- Move the chip selects disable out of imx_spi_reset()

Changes in v2:
- Fix the "Fixes" tag in the commit message

 hw/ssi/imx_spi.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 2c4c5ec1b8..168ea95440 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -246,9 +246,15 @@ static void imx_spi_reset(DeviceState *dev)
 
 static void imx_spi_hard_reset(IMXSPIState *s)
 {
+    int i;
+
     imx_spi_reset(DEVICE(s));
 
     imx_spi_update_irq(s);
+
+    for (i = 0; i < ECSPI_NUM_CS; i++) {
+        qemu_set_irq(s->cs_lines[i], 1);
+    }
 }
 
 static uint64_t imx_spi_read(void *opaque, hwaddr offset, unsigned size)
-- 
2.25.1



  parent reply	other threads:[~2021-01-10  8:19 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-10  8:14 [PATCH v4 0/6] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-10  8:14 ` [PATCH v4 1/6] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2021-01-10  8:14 ` [PATCH v4 2/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() Bin Meng
2021-01-10 11:15   ` Philippe Mathieu-Daudé
2021-01-10 12:04     ` Bin Meng
2021-01-12 10:48   ` Peter Maydell
2021-01-12 12:54     ` Bin Meng
2021-01-12 13:19       ` Peter Maydell
2021-01-12 13:22         ` Bin Meng
2021-01-12 15:06           ` Philippe Mathieu-Daudé
2021-01-10  8:14 ` Bin Meng [this message]
2021-01-10 11:16   ` [PATCH v4 3/6] hw/ssi: imx_spi: Disable chip selects when controller is disabled Philippe Mathieu-Daudé
2021-01-10  8:14 ` [PATCH v4 4/6] hw/ssi: imx_spi: Log unimplemented burst length Bin Meng
2021-01-10  8:14 ` [PATCH v4 5/6] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Bin Meng
2021-01-10  8:14 ` [PATCH v4 6/6] hw/ssi: imx_spi: Correct tx and rx fifo endianness Bin Meng
2021-01-12 10:46   ` Peter Maydell
2021-01-12 12:48     ` Bin Meng
2021-01-12 18:44       ` Philippe Mathieu-Daudé

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