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From: Peter Maydell <peter.maydell@linaro.org>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: "Bin Meng" <bin.meng@windriver.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>
Subject: Re: [PATCH v4 2/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset()
Date: Tue, 12 Jan 2021 13:19:16 +0000	[thread overview]
Message-ID: <CAFEAcA8Yc9d5d0R3_m5FQE6NE6Gk3_RnDrX45eg0D0nCgaW4WA@mail.gmail.com> (raw)
In-Reply-To: <CAEUhbmW2NaTNusZ123D7FPAK6uJZtCuak=UOtEE6Nc5fNfnsHQ@mail.gmail.com>

On Tue, 12 Jan 2021 at 12:54, Bin Meng <bmeng.cn@gmail.com> wrote:
>
> On Tue, Jan 12, 2021 at 6:49 PM Peter Maydell <peter.maydell@linaro.org> wrote:
> >
> > On Sun, 10 Jan 2021 at 08:15, Bin Meng <bmeng.cn@gmail.com> wrote:
> > >
> > > From: Bin Meng <bin.meng@windriver.com>
> > >
> > > Usually the approach is that the device on the other end of the line
> > > is going to reset its state anyway, so there's no need to actively
> > > signal an irq line change during the reset hook.
> > >
> > > Move imx_spi_update_irq() out of imx_spi_reset(), to a new function
> > > imx_spi_hard_reset() that is called when the controller is disabled.
> > >
> > > Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > >
> > > ---
> > >
> > > Changes in v4:
> > > - adujst the patch 2,3 order
> > > - rename imx_spi_soft_reset() to imx_spi_hard_reset() to avoid confusion
> > >
> > > Changes in v3:
> > > - new patch: remove imx_spi_update_irq() in imx_spi_reset()
> > >
> > >  hw/ssi/imx_spi.c | 14 ++++++++++----
> > >  1 file changed, 10 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
> > > index e605049a21..2c4c5ec1b8 100644
> > > --- a/hw/ssi/imx_spi.c
> > > +++ b/hw/ssi/imx_spi.c
> > > @@ -241,11 +241,16 @@ static void imx_spi_reset(DeviceState *dev)
> > >      imx_spi_rxfifo_reset(s);
> > >      imx_spi_txfifo_reset(s);
> > >
> > > -    imx_spi_update_irq(s);
> > > -
> > >      s->burst_length = 0;
> > >  }
> > >
> > > +static void imx_spi_hard_reset(IMXSPIState *s)
> > > +{
> > > +    imx_spi_reset(DEVICE(s));
> > > +
> > > +    imx_spi_update_irq(s);
> > > +}
> > > +
> > >  static uint64_t imx_spi_read(void *opaque, hwaddr offset, unsigned size)
> > >  {
> > >      uint32_t value = 0;
> > > @@ -351,8 +356,9 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value,
> > >          s->regs[ECSPI_CONREG] = value;
> > >
> > >          if (!imx_spi_is_enabled(s)) {
> > > -            /* device is disabled, so this is a reset */
> > > -            imx_spi_reset(DEVICE(s));
> > > +            /* device is disabled, so this is a hard reset */
> > > +            imx_spi_hard_reset(s);
> > > +
> > >              return;
> > >          }
> >
> > The function of the code is correct, but you seem to have the function
> > naming backwards here. Generally:
> >  * soft reset == the reset triggered by the register write
> >  * hard reset == power-on reset == the dc->reset function
> >
> > I think this is what Philippe was trying to say.
>
> Philippe said: "Hmm usually hard reset include soft reset."

True in hardware, but for QEMU there are some things we don't
want to do in what we would call a hard or power-on reset.

> Since we are moving imx_spi_update_irq() out of imx_spi_reset() to a
> new function called imx_spi_soft_reset() (what I did in v3), that
> confused him (and I felt the same thing), so I renamed
> imx_spi_soft_reset() to imx_spi_hard_reset() in v4..

thanks
-- PMM


  reply	other threads:[~2021-01-12 13:23 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-10  8:14 [PATCH v4 0/6] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-10  8:14 ` [PATCH v4 1/6] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2021-01-10  8:14 ` [PATCH v4 2/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() Bin Meng
2021-01-10 11:15   ` Philippe Mathieu-Daudé
2021-01-10 12:04     ` Bin Meng
2021-01-12 10:48   ` Peter Maydell
2021-01-12 12:54     ` Bin Meng
2021-01-12 13:19       ` Peter Maydell [this message]
2021-01-12 13:22         ` Bin Meng
2021-01-12 15:06           ` Philippe Mathieu-Daudé
2021-01-10  8:14 ` [PATCH v4 3/6] hw/ssi: imx_spi: Disable chip selects when controller is disabled Bin Meng
2021-01-10 11:16   ` Philippe Mathieu-Daudé
2021-01-10  8:14 ` [PATCH v4 4/6] hw/ssi: imx_spi: Log unimplemented burst length Bin Meng
2021-01-10  8:14 ` [PATCH v4 5/6] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Bin Meng
2021-01-10  8:14 ` [PATCH v4 6/6] hw/ssi: imx_spi: Correct tx and rx fifo endianness Bin Meng
2021-01-12 10:46   ` Peter Maydell
2021-01-12 12:48     ` Bin Meng
2021-01-12 18:44       ` Philippe Mathieu-Daudé

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