From: Ben Widawsky <ben.widawsky@intel.com> To: <linux-cxl@vger.kernel.org> Cc: Ben Widawsky <ben.widawsky@intel.com>, <linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>, "linux-acpi@vger.kernel.org, Ira Weiny" <ira.weiny@intel.com>, Dan Williams <dan.j.williams@intel.com>, Vishal Verma <vishal.l.verma@intel.com>, "Kelley, Sean V" <sean.v.kelley@intel.com>, Rafael Wysocki <rafael.j.wysocki@intel.com>, Bjorn Helgaas <helgaas@kernel.org>, Jonathan Cameron <Jonathan.Cameron@Huawei.com>, "Jon Masters" <jcm@jonmasters.org>, Chris Browy <cbrowy@avery-design.com>, "Randy Dunlap" <rdunlap@infradead.org>, Christoph Hellwig <hch@infradead.org>, <daniel.lll@alibaba-inc.com> Subject: [RFC PATCH v3 01/16] docs: cxl: Add basic documentation Date: Mon, 11 Jan 2021 14:51:05 -0800 [thread overview] Message-ID: <20210111225121.820014-2-ben.widawsky@intel.com> (raw) In-Reply-To: <20210111225121.820014-1-ben.widawsky@intel.com> This starts a new cxl directory because CXL is a new bus and it is expected that the documentation will grow large over time. Currently only memory devices are documented as they are all that's supported. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> --- Documentation/cxl/index.rst | 12 ++++++++++++ Documentation/cxl/memory-devices.rst | 15 +++++++++++++++ Documentation/index.rst | 1 + 3 files changed, 28 insertions(+) create mode 100644 Documentation/cxl/index.rst create mode 100644 Documentation/cxl/memory-devices.rst diff --git a/Documentation/cxl/index.rst b/Documentation/cxl/index.rst new file mode 100644 index 000000000000..036e49553542 --- /dev/null +++ b/Documentation/cxl/index.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +Compute Express Link +==================== + +.. toctree:: + :maxdepth: 1 + + memory-devices + +.. only:: subproject and html diff --git a/Documentation/cxl/memory-devices.rst b/Documentation/cxl/memory-devices.rst new file mode 100644 index 000000000000..aa4262280c67 --- /dev/null +++ b/Documentation/cxl/memory-devices.rst @@ -0,0 +1,15 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +=================================== +Compute Express Link Memory Devices +=================================== + +A Compute Express Link Memory Device is a CXL component that implements the +CXL.mem protocol. It contains some amount of volatile memory, persistent memory, +or both. + +Driver Infrastructure +===================== + +This sections covers the driver infrastructure for a CXL memory device. diff --git a/Documentation/index.rst b/Documentation/index.rst index 5888e8a7272f..7e5ab77264e9 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -137,6 +137,7 @@ needed). misc-devices/index scheduler/index mhi/index + cxl/index Architecture-agnostic documentation ----------------------------------- -- 2.30.0
WARNING: multiple messages have this Message-ID (diff)
From: Ben Widawsky <ben.widawsky@intel.com> To: linux-cxl@vger.kernel.org Cc: Ben Widawsky <ben.widawsky@intel.com>, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, "linux-acpi@vger.kernel.org, Ira Weiny" <ira.weiny@intel.com>, Dan Williams <dan.j.williams@intel.com>, Vishal Verma <vishal.l.verma@intel.com>, "Kelley, Sean V" <sean.v.kelley@intel.com>, Rafael Wysocki <rafael.j.wysocki@intel.com>, Bjorn Helgaas <helgaas@kernel.org>, Jonathan Cameron <Jonathan.Cameron@Huawei.com>, Jon Masters <jcm@jonmasters.org>, Chris Browy <cbrowy@avery-design.com>, Randy Dunlap <rdunlap@infradead.org>, Christoph Hellwig <hch@infradead.org>, daniel.lll@alibaba-inc.com Subject: [RFC PATCH v3 01/16] docs: cxl: Add basic documentation Date: Mon, 11 Jan 2021 14:51:05 -0800 [thread overview] Message-ID: <20210111225121.820014-2-ben.widawsky@intel.com> (raw) In-Reply-To: <20210111225121.820014-1-ben.widawsky@intel.com> This starts a new cxl directory because CXL is a new bus and it is expected that the documentation will grow large over time. Currently only memory devices are documented as they are all that's supported. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> --- Documentation/cxl/index.rst | 12 ++++++++++++ Documentation/cxl/memory-devices.rst | 15 +++++++++++++++ Documentation/index.rst | 1 + 3 files changed, 28 insertions(+) create mode 100644 Documentation/cxl/index.rst create mode 100644 Documentation/cxl/memory-devices.rst diff --git a/Documentation/cxl/index.rst b/Documentation/cxl/index.rst new file mode 100644 index 000000000000..036e49553542 --- /dev/null +++ b/Documentation/cxl/index.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0 + +==================== +Compute Express Link +==================== + +.. toctree:: + :maxdepth: 1 + + memory-devices + +.. only:: subproject and html diff --git a/Documentation/cxl/memory-devices.rst b/Documentation/cxl/memory-devices.rst new file mode 100644 index 000000000000..aa4262280c67 --- /dev/null +++ b/Documentation/cxl/memory-devices.rst @@ -0,0 +1,15 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. include:: <isonum.txt> + +=================================== +Compute Express Link Memory Devices +=================================== + +A Compute Express Link Memory Device is a CXL component that implements the +CXL.mem protocol. It contains some amount of volatile memory, persistent memory, +or both. + +Driver Infrastructure +===================== + +This sections covers the driver infrastructure for a CXL memory device. diff --git a/Documentation/index.rst b/Documentation/index.rst index 5888e8a7272f..7e5ab77264e9 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -137,6 +137,7 @@ needed). misc-devices/index scheduler/index mhi/index + cxl/index Architecture-agnostic documentation ----------------------------------- -- 2.30.0
next prev parent reply other threads:[~2021-01-12 0:29 UTC|newest] Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-11 22:51 [RFC PATCH v3 00/16] CXL 2.0 Support Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky [this message] 2021-01-11 22:51 ` [RFC PATCH v3 01/16] docs: cxl: Add basic documentation Ben Widawsky 2021-01-11 22:51 ` [RFC PATCH v3 02/16] cxl/acpi: Add an acpi_cxl module for the CXL interconnect Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 7:08 ` Randy Dunlap 2021-01-12 18:43 ` Jonathan Cameron 2021-01-12 19:43 ` Dan Williams 2021-01-12 22:06 ` Jonathan Cameron 2021-01-13 17:55 ` Kaneda, Erik 2021-01-20 19:27 ` Dan Williams 2021-01-20 19:18 ` Verma, Vishal L 2021-01-13 12:40 ` Rafael J. Wysocki 2021-01-20 19:21 ` Verma, Vishal L 2021-01-11 22:51 ` [RFC PATCH v3 03/16] cxl/acpi: add OSC support Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 15:09 ` Rafael J. Wysocki 2021-01-12 18:48 ` Jonathan Cameron 2021-01-11 22:51 ` [RFC PATCH v3 04/16] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 7:08 ` Randy Dunlap 2021-01-12 19:01 ` Jonathan Cameron 2021-01-12 20:06 ` Dan Williams 2021-01-11 22:51 ` [RFC PATCH v3 05/16] cxl/mem: Map memory device registers Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 19:13 ` Jonathan Cameron 2021-01-12 19:21 ` Ben Widawsky 2021-01-12 20:40 ` Dan Williams 2021-01-11 22:51 ` [RFC PATCH v3 06/16] cxl/mem: Find device capabilities Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 19:17 ` Jonathan Cameron 2021-01-12 19:22 ` Ben Widawsky 2021-01-11 22:51 ` [RFC PATCH v3 07/16] cxl/mem: Implement polled mode mailbox Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-13 18:26 ` Jonathan Cameron 2021-01-14 17:40 ` Jonathan Cameron 2021-01-14 17:50 ` Ben Widawsky 2021-01-14 18:13 ` Jonathan Cameron 2021-01-11 22:51 ` [RFC PATCH v3 08/16] cxl/mem: Register CXL memX devices Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-14 16:28 ` Jonathan Cameron 2021-01-11 22:51 ` [RFC PATCH v3 09/16] cxl/mem: Add basic IOCTL interface Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 4:39 ` kernel test robot 2021-01-14 16:19 ` Jonathan Cameron 2021-01-11 22:51 ` [RFC PATCH v3 10/16] cxl/mem: Add send command Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 6:06 ` kernel test robot 2021-01-14 17:10 ` Jonathan Cameron 2021-01-21 18:15 ` Ben Widawsky 2021-01-22 11:43 ` Jonathan Cameron 2021-01-22 17:08 ` Ben Widawsky 2021-01-11 22:51 ` [RFC PATCH v3 11/16] taint: add taint for direct hardware access Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-11 22:51 ` [RFC PATCH v3 11/16] taint: add taint for unfettered " Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 3:31 ` Ben Widawsky 2021-01-11 22:51 ` [RFC PATCH v3 12/16] cxl/mem: Add a "RAW" send command Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 7:41 ` kernel test robot 2021-01-11 22:51 ` [RFC PATCH v3 13/16] cxl/mem: Create concept of enabled commands Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-14 17:25 ` Jonathan Cameron 2021-01-21 18:40 ` Ben Widawsky 2021-01-22 11:28 ` Jonathan Cameron 2021-01-11 22:51 ` [RFC PATCH v3 14/16] cxl/mem: Use CEL for enabling commands Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-14 18:02 ` Jonathan Cameron 2021-01-14 18:13 ` Ben Widawsky 2021-01-14 18:32 ` Jonathan Cameron 2021-01-14 19:04 ` Ben Widawsky 2021-01-14 19:24 ` Jonathan Cameron 2021-01-11 22:51 ` [RFC PATCH v3 15/16] cxl/mem: Add limited Get Log command (0401h) Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-14 18:08 ` Jonathan Cameron 2021-01-23 0:14 ` Ben Widawsky 2021-01-11 22:51 ` [RFC PATCH v3 16/16] MAINTAINERS: Add maintainers of the CXL driver Ben Widawsky 2021-01-11 22:51 ` Ben Widawsky 2021-01-12 1:12 ` Joe Perches [not found] ` <0f2a6d62-09d8-416f-e972-3e9869c3e1a6@alibaba-inc.com> 2021-01-12 15:17 ` [RFC PATCH v3 00/16] CXL 2.0 Support Ben Widawsky 2021-01-12 16:19 ` Bjorn Helgaas
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