From: Samuel Holland <samuel@sholland.org> To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@siol.net> Cc: Ondrej Jirman <megous@megous.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland <samuel@sholland.org> Subject: [PATCH v4 08/10] ARM: dts: sunxi: Move wakeup-capable IRQs to r_intc Date: Mon, 11 Jan 2021 23:59:48 -0600 [thread overview] Message-ID: <20210112055950.21209-9-samuel@sholland.org> (raw) In-Reply-To: <20210112055950.21209-1-samuel@sholland.org> All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. In addition to the external NMI input, which is already routed through r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC. Signed-off-by: Samuel Holland <samuel@sholland.org> --- arch/arm/boot/dts/sun6i-a31.dtsi | 4 ++++ arch/arm/boot/dts/sun8i-a23-a33.dtsi | 4 ++++ arch/arm/boot/dts/sun8i-a83t.dtsi | 3 +++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 +++ 4 files changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index faf85c5f4e1e..50324688c28a 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -611,6 +611,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { compatible = "allwinner,sun6i-a31-pinctrl"; reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, @@ -802,6 +803,7 @@ i2s1: i2s@1c22400 { lradc: lradc@1c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -1299,6 +1301,7 @@ rtc: rtc@1f00000 { #clock-cells = <1>; compatible = "allwinner,sun6i-a31-rtc"; reg = <0x01f00000 0x54>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clocks = <&osc32k>; @@ -1383,6 +1386,7 @@ ir: ir@1f02000 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun6i-a31-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index a84c90a660ca..4461d5098b20 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -338,6 +338,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { /* compatible gets set in SoC specific dtsi file */ reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; /* interrupts get set in SoC specific dtsi file */ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; @@ -473,6 +474,7 @@ pwm: pwm@1c21400 { lradc: lradc@1c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -709,6 +711,7 @@ drc0_out_tcon0: endpoint { rtc: rtc@1f00000 { compatible = "allwinner,sun8i-a23-rtc"; reg = <0x01f00000 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clock-output-names = "osc32k", "osc32k-out"; @@ -805,6 +808,7 @@ r_i2c: i2c@1f02400 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a23-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 0fce227f56d4..2c05e296b3d8 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -708,6 +708,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { compatible = "allwinner,sun8i-a83t-pinctrl"; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; @@ -1150,6 +1151,7 @@ r_cir: ir@1f02000 { r_lradc: lradc@1f03c00 { compatible = "allwinner,sun8i-a83t-r-lradc"; reg = <0x01f03c00 0x100>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -1157,6 +1159,7 @@ r_lradc: lradc@1f03c00 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a83t-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc16Md512>; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 4bf25c5b873e..c7428df9469e 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -395,6 +395,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { /* compatible is in per SoC .dtsi file */ reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; @@ -852,6 +853,7 @@ hdmi_phy: hdmi-phy@1ef0000 { rtc: rtc@1f00000 { /* compatible is in per SoC .dtsi file */ reg = <0x01f00000 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clock-output-names = "osc32k", "osc32k-out", "iosc"; @@ -909,6 +911,7 @@ r_i2c: i2c@1f02400 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; -- 2.26.2
WARNING: multiple messages have this Message-ID (diff)
From: Samuel Holland <samuel@sholland.org> To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@siol.net> Cc: Ondrej Jirman <megous@megous.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Samuel Holland <samuel@sholland.org> Subject: [PATCH v4 08/10] ARM: dts: sunxi: Move wakeup-capable IRQs to r_intc Date: Mon, 11 Jan 2021 23:59:48 -0600 [thread overview] Message-ID: <20210112055950.21209-9-samuel@sholland.org> (raw) In-Reply-To: <20210112055950.21209-1-samuel@sholland.org> All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. In addition to the external NMI input, which is already routed through r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC. Signed-off-by: Samuel Holland <samuel@sholland.org> --- arch/arm/boot/dts/sun6i-a31.dtsi | 4 ++++ arch/arm/boot/dts/sun8i-a23-a33.dtsi | 4 ++++ arch/arm/boot/dts/sun8i-a83t.dtsi | 3 +++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 +++ 4 files changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index faf85c5f4e1e..50324688c28a 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -611,6 +611,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { compatible = "allwinner,sun6i-a31-pinctrl"; reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, @@ -802,6 +803,7 @@ i2s1: i2s@1c22400 { lradc: lradc@1c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -1299,6 +1301,7 @@ rtc: rtc@1f00000 { #clock-cells = <1>; compatible = "allwinner,sun6i-a31-rtc"; reg = <0x01f00000 0x54>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clocks = <&osc32k>; @@ -1383,6 +1386,7 @@ ir: ir@1f02000 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun6i-a31-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index a84c90a660ca..4461d5098b20 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -338,6 +338,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { /* compatible gets set in SoC specific dtsi file */ reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; /* interrupts get set in SoC specific dtsi file */ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; @@ -473,6 +474,7 @@ pwm: pwm@1c21400 { lradc: lradc@1c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -709,6 +711,7 @@ drc0_out_tcon0: endpoint { rtc: rtc@1f00000 { compatible = "allwinner,sun8i-a23-rtc"; reg = <0x01f00000 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clock-output-names = "osc32k", "osc32k-out"; @@ -805,6 +808,7 @@ r_i2c: i2c@1f02400 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a23-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 0fce227f56d4..2c05e296b3d8 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -708,6 +708,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { compatible = "allwinner,sun8i-a83t-pinctrl"; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; @@ -1150,6 +1151,7 @@ r_cir: ir@1f02000 { r_lradc: lradc@1f03c00 { compatible = "allwinner,sun8i-a83t-r-lradc"; reg = <0x01f03c00 0x100>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -1157,6 +1159,7 @@ r_lradc: lradc@1f03c00 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a83t-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc16Md512>; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 4bf25c5b873e..c7428df9469e 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -395,6 +395,7 @@ ccu: clock@1c20000 { pio: pinctrl@1c20800 { /* compatible is in per SoC .dtsi file */ reg = <0x01c20800 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; @@ -852,6 +853,7 @@ hdmi_phy: hdmi-phy@1ef0000 { rtc: rtc@1f00000 { /* compatible is in per SoC .dtsi file */ reg = <0x01f00000 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clock-output-names = "osc32k", "osc32k-out", "iosc"; @@ -909,6 +911,7 @@ r_i2c: i2c@1f02400 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; + interrupt-parent = <&r_intc>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-12 6:01 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-12 5:59 [PATCH v4 00/10] sunxi: Support IRQ wakeup from deep sleep Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-12 5:59 ` [PATCH v4 01/10] dt-bindings: irq: sun6i-r: Split the binding from sun7i-nmi Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-14 20:11 ` Rob Herring 2021-01-14 20:11 ` Rob Herring 2021-01-12 5:59 ` [PATCH v4 02/10] dt-bindings: irq: sun6i-r: Add a compatible for the H3 Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-12 5:59 ` [PATCH v4 03/10] irqchip/sun6i-r: Use a stacked irqchip driver Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-14 21:06 ` Marc Zyngier 2021-01-14 21:06 ` Marc Zyngier 2021-01-15 4:01 ` Samuel Holland 2021-01-15 4:01 ` Samuel Holland 2021-01-15 9:30 ` Marc Zyngier 2021-01-15 9:30 ` Marc Zyngier 2021-01-12 5:59 ` [PATCH v4 04/10] irqchip/sun6i-r: Add wakeup support Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-14 21:44 ` Marc Zyngier 2021-01-14 21:44 ` Marc Zyngier 2021-01-15 4:04 ` Samuel Holland 2021-01-15 4:04 ` Samuel Holland 2021-01-12 5:59 ` [PATCH v4 05/10] ARM: dts: sunxi: Rename nmi_intc to r_intc Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-12 5:59 ` [PATCH v4 06/10] ARM: dts: sunxi: Use the new r_intc binding Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-12 5:59 ` [PATCH v4 07/10] ARM: dts: sunxi: h3/h5: Add r_intc node Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-12 5:59 ` Samuel Holland [this message] 2021-01-12 5:59 ` [PATCH v4 08/10] ARM: dts: sunxi: Move wakeup-capable IRQs to r_intc Samuel Holland 2021-01-12 5:59 ` [PATCH v4 09/10] arm64: dts: allwinner: Use the new r_intc binding Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-12 5:59 ` [PATCH v4 10/10] arm64: dts: allwinner: Move wakeup-capable IRQs to r_intc Samuel Holland 2021-01-12 5:59 ` Samuel Holland 2021-01-14 12:16 ` [PATCH v4 00/10] sunxi: Support IRQ wakeup from deep sleep Maxime Ripard 2021-01-14 12:16 ` Maxime Ripard
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