From: Vinicius Costa Gomes <vinicius.gomes@intel.com> To: netdev@vger.kernel.org Cc: Vinicius Costa Gomes <vinicius.gomes@intel.com>, jhs@mojatatu.com, xiyou.wangcong@gmail.com, jiri@resnulli.us, kuba@kernel.org, m-karicheri2@ti.com, vladimir.oltean@nxp.com, Jose.Abreu@synopsys.com, po.liu@nxp.com, intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com, mkubecek@suse.cz Subject: [PATCH net-next v2 3/8] igc: Set the RX packet buffer size for TSN mode Date: Mon, 18 Jan 2021 16:40:23 -0800 [thread overview] Message-ID: <20210119004028.2809425-4-vinicius.gomes@intel.com> (raw) In-Reply-To: <20210119004028.2809425-1-vinicius.gomes@intel.com> In preparation for supporting frame preemption, when entering TSN mode set the receive packet buffer to 16KB for the Express MAC, 16KB for the Preemptible MAC and 2KB for the BMC, according to the datasheet section 7.1.3.2. Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> --- drivers/net/ethernet/intel/igc/igc_defines.h | 2 ++ drivers/net/ethernet/intel/igc/igc_tsn.c | 14 ++++++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 32f5fd684139..0e78abfd99ee 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -351,6 +351,8 @@ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ #define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */ +#define IGC_RXPBSIZE_TSN 0x00010090 /* 16KB for EXP + 16KB for BE + 2KB for BMC */ +#define IGC_RXPBSIZE_SIZE_MASK 0x0001FFFF #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 174103c4bea6..38451cf05ac6 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -24,7 +24,7 @@ static bool is_any_launchtime(struct igc_adapter *adapter) static int igc_tsn_disable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; - u32 tqavctrl; + u32 tqavctrl, rxpbs; int i; if (!(adapter->flags & IGC_FLAG_TSN_QBV_ENABLED)) @@ -35,6 +35,11 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter) wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= I225_RXPBSIZE_DEFAULT; + + wr32(IGC_RXPBS, rxpbs); + tqavctrl = rd32(IGC_TQAVCTRL); tqavctrl &= ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV); @@ -64,7 +69,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; u32 tqavctrl, baset_l, baset_h; - u32 sec, nsec, cycle; + u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; int i; @@ -79,6 +84,11 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN); tqavctrl = rd32(IGC_TQAVCTRL); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= IGC_RXPBSIZE_TSN; + + wr32(IGC_RXPBS, rxpbs); + tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV; wr32(IGC_TQAVCTRL, tqavctrl); -- 2.30.0
WARNING: multiple messages have this Message-ID (diff)
From: Vinicius Costa Gomes <vinicius.gomes@intel.com> To: intel-wired-lan@osuosl.org Subject: [Intel-wired-lan] [PATCH net-next v2 3/8] igc: Set the RX packet buffer size for TSN mode Date: Mon, 18 Jan 2021 16:40:23 -0800 [thread overview] Message-ID: <20210119004028.2809425-4-vinicius.gomes@intel.com> (raw) In-Reply-To: <20210119004028.2809425-1-vinicius.gomes@intel.com> In preparation for supporting frame preemption, when entering TSN mode set the receive packet buffer to 16KB for the Express MAC, 16KB for the Preemptible MAC and 2KB for the BMC, according to the datasheet section 7.1.3.2. Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> --- drivers/net/ethernet/intel/igc/igc_defines.h | 2 ++ drivers/net/ethernet/intel/igc/igc_tsn.c | 14 ++++++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 32f5fd684139..0e78abfd99ee 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -351,6 +351,8 @@ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ #define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */ +#define IGC_RXPBSIZE_TSN 0x00010090 /* 16KB for EXP + 16KB for BE + 2KB for BMC */ +#define IGC_RXPBSIZE_SIZE_MASK 0x0001FFFF #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 174103c4bea6..38451cf05ac6 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -24,7 +24,7 @@ static bool is_any_launchtime(struct igc_adapter *adapter) static int igc_tsn_disable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; - u32 tqavctrl; + u32 tqavctrl, rxpbs; int i; if (!(adapter->flags & IGC_FLAG_TSN_QBV_ENABLED)) @@ -35,6 +35,11 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter) wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= I225_RXPBSIZE_DEFAULT; + + wr32(IGC_RXPBS, rxpbs); + tqavctrl = rd32(IGC_TQAVCTRL); tqavctrl &= ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV); @@ -64,7 +69,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; u32 tqavctrl, baset_l, baset_h; - u32 sec, nsec, cycle; + u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; int i; @@ -79,6 +84,11 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN); tqavctrl = rd32(IGC_TQAVCTRL); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= IGC_RXPBSIZE_TSN; + + wr32(IGC_RXPBS, rxpbs); + tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV; wr32(IGC_TQAVCTRL, tqavctrl); -- 2.30.0
next prev parent reply other threads:[~2021-01-19 0:41 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-19 0:40 [PATCH net-next v2 0/8] ethtool: Add support for frame preemption Vinicius Costa Gomes 2021-01-19 0:40 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-19 0:40 ` [PATCH net-next v2 1/8] ethtool: Add support for configuring " Vinicius Costa Gomes 2021-01-19 0:40 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-19 0:52 ` Vladimir Oltean 2021-01-19 0:52 ` [Intel-wired-lan] " Vladimir Oltean 2021-01-19 23:03 ` Vinicius Costa Gomes 2021-01-19 23:03 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-20 2:17 ` Jakub Kicinski 2021-01-20 2:17 ` [Intel-wired-lan] " Jakub Kicinski 2021-01-21 23:18 ` Vinicius Costa Gomes 2021-01-21 23:18 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-19 0:40 ` [PATCH net-next v2 2/8] taprio: Add support for frame preemption offload Vinicius Costa Gomes 2021-01-19 0:40 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-20 2:21 ` Jakub Kicinski 2021-01-20 2:21 ` [Intel-wired-lan] " Jakub Kicinski 2021-01-21 23:17 ` Vinicius Costa Gomes 2021-01-21 23:17 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-19 0:40 ` Vinicius Costa Gomes [this message] 2021-01-19 0:40 ` [Intel-wired-lan] [PATCH net-next v2 3/8] igc: Set the RX packet buffer size for TSN mode Vinicius Costa Gomes 2021-01-19 0:40 ` [PATCH net-next v2 4/8] igc: Only dump registers if configured to dump HW information Vinicius Costa Gomes 2021-01-19 0:40 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-19 0:40 ` [PATCH net-next v2 5/8] igc: Avoid TX Hangs because long cycles Vinicius Costa Gomes 2021-01-19 0:40 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-19 0:40 ` [PATCH net-next v2 6/8] igc: Add support for tuning frame preemption via ethtool Vinicius Costa Gomes 2021-01-19 0:40 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-20 2:23 ` Jakub Kicinski 2021-01-20 2:23 ` [Intel-wired-lan] " Jakub Kicinski 2021-01-21 23:18 ` Vinicius Costa Gomes 2021-01-21 23:18 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-19 0:40 ` [PATCH net-next v2 7/8] igc: Add support for Frame Preemption offload Vinicius Costa Gomes 2021-01-19 0:40 ` [Intel-wired-lan] " Vinicius Costa Gomes 2021-01-19 0:40 ` [PATCH net-next v2 8/8] igc: Separate TSN configurations that can be updated Vinicius Costa Gomes 2021-01-19 0:40 ` [Intel-wired-lan] " Vinicius Costa Gomes
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210119004028.2809425-4-vinicius.gomes@intel.com \ --to=vinicius.gomes@intel.com \ --cc=Jose.Abreu@synopsys.com \ --cc=anthony.l.nguyen@intel.com \ --cc=intel-wired-lan@lists.osuosl.org \ --cc=jhs@mojatatu.com \ --cc=jiri@resnulli.us \ --cc=kuba@kernel.org \ --cc=m-karicheri2@ti.com \ --cc=mkubecek@suse.cz \ --cc=netdev@vger.kernel.org \ --cc=po.liu@nxp.com \ --cc=vladimir.oltean@nxp.com \ --cc=xiyou.wangcong@gmail.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.