* [PATCH 0/2] irqchip: Remove obsolete drivers @ 2021-01-20 13:30 ` Arnd Bergmann 0 siblings, 0 replies; 12+ messages in thread From: Arnd Bergmann @ 2021-01-20 13:30 UTC (permalink / raw) To: linux-arm-kernel, linux-kernel, Marc Zyngier, Thomas Gleixner Cc: Arnd Bergmann From: Arnd Bergmann <arnd@arndb.de> A few Arm platforms are getting removed in v5.12, this removes the corresponding irqchip drivers. Link: https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/ Arnd Bergmann (2): irqchip: remove sigma tango driver irqchip: remove sirfsoc driver .../sigma,smp8642-intc.txt | 48 ---- drivers/irqchip/Kconfig | 5 - drivers/irqchip/Makefile | 2 - drivers/irqchip/irq-sirfsoc.c | 134 ----------- drivers/irqchip/irq-tango.c | 227 ------------------ 5 files changed, 416 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt delete mode 100644 drivers/irqchip/irq-sirfsoc.c delete mode 100644 drivers/irqchip/irq-tango.c -- 2.29.2 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 0/2] irqchip: Remove obsolete drivers @ 2021-01-20 13:30 ` Arnd Bergmann 0 siblings, 0 replies; 12+ messages in thread From: Arnd Bergmann @ 2021-01-20 13:30 UTC (permalink / raw) To: linux-arm-kernel, linux-kernel, Marc Zyngier, Thomas Gleixner Cc: Arnd Bergmann From: Arnd Bergmann <arnd@arndb.de> A few Arm platforms are getting removed in v5.12, this removes the corresponding irqchip drivers. Link: https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/ Arnd Bergmann (2): irqchip: remove sigma tango driver irqchip: remove sirfsoc driver .../sigma,smp8642-intc.txt | 48 ---- drivers/irqchip/Kconfig | 5 - drivers/irqchip/Makefile | 2 - drivers/irqchip/irq-sirfsoc.c | 134 ----------- drivers/irqchip/irq-tango.c | 227 ------------------ 5 files changed, 416 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt delete mode 100644 drivers/irqchip/irq-sirfsoc.c delete mode 100644 drivers/irqchip/irq-tango.c -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/2] irqchip: remove sigma tango driver 2021-01-20 13:30 ` Arnd Bergmann @ 2021-01-20 13:30 ` Arnd Bergmann -1 siblings, 0 replies; 12+ messages in thread From: Arnd Bergmann @ 2021-01-20 13:30 UTC (permalink / raw) To: linux-arm-kernel, linux-kernel, Marc Zyngier, Thomas Gleixner Cc: Arnd Bergmann, Marc Gonzalez, Mans Rullgard From: Arnd Bergmann <arnd@arndb.de> The tango platform is getting removed, so the driver is no longer needed. Cc: Marc Gonzalez <marc.w.gonzalez@free.fr> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- .../sigma,smp8642-intc.txt | 48 ---- drivers/irqchip/Kconfig | 5 - drivers/irqchip/Makefile | 1 - drivers/irqchip/irq-tango.c | 227 ------------------ 4 files changed, 281 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt delete mode 100644 drivers/irqchip/irq-tango.c diff --git a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt deleted file mode 100644 index 355c18a3a4d3..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt +++ /dev/null @@ -1,48 +0,0 @@ -Sigma Designs SMP86xx/SMP87xx secondary interrupt controller - -Required properties: -- compatible: should be "sigma,smp8642-intc" -- reg: physical address of MMIO region -- ranges: address space mapping of child nodes -- interrupt-controller: boolean -- #address-cells: should be <1> -- #size-cells: should be <1> - -One child node per control block with properties: -- reg: address of registers for this control block -- interrupt-controller: boolean -- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt -- interrupts: interrupt spec of primary interrupt controller - -Example: - -interrupt-controller@6e000 { - compatible = "sigma,smp8642-intc"; - reg = <0x6e000 0x400>; - ranges = <0x0 0x6e000 0x400>; - interrupt-parent = <&gic>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <1>; - - irq0: interrupt-controller@0 { - reg = <0x000 0x100>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - }; - - irq1: interrupt-controller@100 { - reg = <0x100 0x100>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - }; - - irq2: interrupt-controller@300 { - reg = <0x300 0x100>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - }; -}; diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 94920a51c628..f95d114c63ed 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -260,11 +260,6 @@ config ST_IRQCHIP help Enables SysCfg Controlled IRQs on STi based platforms. -config TANGO_IRQ - bool - select IRQ_DOMAIN - select GENERIC_IRQ_CHIP - config TB10X_IRQC bool select IRQ_DOMAIN diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 0ac93bfaec61..084e11774071 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -55,7 +55,6 @@ obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o obj-$(CONFIG_ST_IRQCHIP) += irq-st.o -obj-$(CONFIG_TANGO_IRQ) += irq-tango.o obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o obj-$(CONFIG_TS4800_IRQ) += irq-ts4800.o obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o diff --git a/drivers/irqchip/irq-tango.c b/drivers/irqchip/irq-tango.c deleted file mode 100644 index 34290f09b853..000000000000 --- a/drivers/irqchip/irq-tango.c +++ /dev/null @@ -1,227 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2014 Mans Rullgard <mans@mansr.com> - */ - -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/irqchip.h> -#include <linux/irqchip/chained_irq.h> -#include <linux/ioport.h> -#include <linux/io.h> -#include <linux/of_address.h> -#include <linux/of_irq.h> -#include <linux/slab.h> - -#define IRQ0_CTL_BASE 0x0000 -#define IRQ1_CTL_BASE 0x0100 -#define EDGE_CTL_BASE 0x0200 -#define IRQ2_CTL_BASE 0x0300 - -#define IRQ_CTL_HI 0x18 -#define EDGE_CTL_HI 0x20 - -#define IRQ_STATUS 0x00 -#define IRQ_RAWSTAT 0x04 -#define IRQ_EN_SET 0x08 -#define IRQ_EN_CLR 0x0c -#define IRQ_SOFT_SET 0x10 -#define IRQ_SOFT_CLR 0x14 - -#define EDGE_STATUS 0x00 -#define EDGE_RAWSTAT 0x04 -#define EDGE_CFG_RISE 0x08 -#define EDGE_CFG_FALL 0x0c -#define EDGE_CFG_RISE_SET 0x10 -#define EDGE_CFG_RISE_CLR 0x14 -#define EDGE_CFG_FALL_SET 0x18 -#define EDGE_CFG_FALL_CLR 0x1c - -struct tangox_irq_chip { - void __iomem *base; - unsigned long ctl; -}; - -static inline u32 intc_readl(struct tangox_irq_chip *chip, int reg) -{ - return readl_relaxed(chip->base + reg); -} - -static inline void intc_writel(struct tangox_irq_chip *chip, int reg, u32 val) -{ - writel_relaxed(val, chip->base + reg); -} - -static void tangox_dispatch_irqs(struct irq_domain *dom, unsigned int status, - int base) -{ - unsigned int hwirq; - unsigned int virq; - - while (status) { - hwirq = __ffs(status); - virq = irq_find_mapping(dom, base + hwirq); - if (virq) - generic_handle_irq(virq); - status &= ~BIT(hwirq); - } -} - -static void tangox_irq_handler(struct irq_desc *desc) -{ - struct irq_domain *dom = irq_desc_get_handler_data(desc); - struct irq_chip *host_chip = irq_desc_get_chip(desc); - struct tangox_irq_chip *chip = dom->host_data; - unsigned int status_lo, status_hi; - - chained_irq_enter(host_chip, desc); - - status_lo = intc_readl(chip, chip->ctl + IRQ_STATUS); - status_hi = intc_readl(chip, chip->ctl + IRQ_CTL_HI + IRQ_STATUS); - - tangox_dispatch_irqs(dom, status_lo, 0); - tangox_dispatch_irqs(dom, status_hi, 32); - - chained_irq_exit(host_chip, desc); -} - -static int tangox_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - struct tangox_irq_chip *chip = gc->domain->host_data; - struct irq_chip_regs *regs = &gc->chip_types[0].regs; - - switch (flow_type & IRQ_TYPE_SENSE_MASK) { - case IRQ_TYPE_EDGE_RISING: - intc_writel(chip, regs->type + EDGE_CFG_RISE_SET, d->mask); - intc_writel(chip, regs->type + EDGE_CFG_FALL_CLR, d->mask); - break; - - case IRQ_TYPE_EDGE_FALLING: - intc_writel(chip, regs->type + EDGE_CFG_RISE_CLR, d->mask); - intc_writel(chip, regs->type + EDGE_CFG_FALL_SET, d->mask); - break; - - case IRQ_TYPE_LEVEL_HIGH: - intc_writel(chip, regs->type + EDGE_CFG_RISE_CLR, d->mask); - intc_writel(chip, regs->type + EDGE_CFG_FALL_CLR, d->mask); - break; - - case IRQ_TYPE_LEVEL_LOW: - intc_writel(chip, regs->type + EDGE_CFG_RISE_SET, d->mask); - intc_writel(chip, regs->type + EDGE_CFG_FALL_SET, d->mask); - break; - - default: - pr_err("Invalid trigger mode %x for IRQ %d\n", - flow_type, d->irq); - return -EINVAL; - } - - return irq_setup_alt_chip(d, flow_type); -} - -static void __init tangox_irq_init_chip(struct irq_chip_generic *gc, - unsigned long ctl_offs, - unsigned long edge_offs) -{ - struct tangox_irq_chip *chip = gc->domain->host_data; - struct irq_chip_type *ct = gc->chip_types; - unsigned long ctl_base = chip->ctl + ctl_offs; - unsigned long edge_base = EDGE_CTL_BASE + edge_offs; - int i; - - gc->reg_base = chip->base; - gc->unused = 0; - - for (i = 0; i < 2; i++) { - ct[i].chip.irq_ack = irq_gc_ack_set_bit; - ct[i].chip.irq_mask = irq_gc_mask_disable_reg; - ct[i].chip.irq_mask_ack = irq_gc_mask_disable_and_ack_set; - ct[i].chip.irq_unmask = irq_gc_unmask_enable_reg; - ct[i].chip.irq_set_type = tangox_irq_set_type; - ct[i].chip.name = gc->domain->name; - - ct[i].regs.enable = ctl_base + IRQ_EN_SET; - ct[i].regs.disable = ctl_base + IRQ_EN_CLR; - ct[i].regs.ack = edge_base + EDGE_RAWSTAT; - ct[i].regs.type = edge_base; - } - - ct[0].type = IRQ_TYPE_LEVEL_MASK; - ct[0].handler = handle_level_irq; - - ct[1].type = IRQ_TYPE_EDGE_BOTH; - ct[1].handler = handle_edge_irq; - - intc_writel(chip, ct->regs.disable, 0xffffffff); - intc_writel(chip, ct->regs.ack, 0xffffffff); -} - -static void __init tangox_irq_domain_init(struct irq_domain *dom) -{ - struct irq_chip_generic *gc; - int i; - - for (i = 0; i < 2; i++) { - gc = irq_get_domain_generic_chip(dom, i * 32); - tangox_irq_init_chip(gc, i * IRQ_CTL_HI, i * EDGE_CTL_HI); - } -} - -static int __init tangox_irq_init(void __iomem *base, struct resource *baseres, - struct device_node *node) -{ - struct tangox_irq_chip *chip; - struct irq_domain *dom; - struct resource res; - int irq; - int err; - - irq = irq_of_parse_and_map(node, 0); - if (!irq) - panic("%pOFn: failed to get IRQ", node); - - err = of_address_to_resource(node, 0, &res); - if (err) - panic("%pOFn: failed to get address", node); - - chip = kzalloc(sizeof(*chip), GFP_KERNEL); - chip->ctl = res.start - baseres->start; - chip->base = base; - - dom = irq_domain_add_linear(node, 64, &irq_generic_chip_ops, chip); - if (!dom) - panic("%pOFn: failed to create irqdomain", node); - - err = irq_alloc_domain_generic_chips(dom, 32, 2, node->name, - handle_level_irq, 0, 0, 0); - if (err) - panic("%pOFn: failed to allocate irqchip", node); - - tangox_irq_domain_init(dom); - - irq_set_chained_handler_and_data(irq, tangox_irq_handler, dom); - - return 0; -} - -static int __init tangox_of_irq_init(struct device_node *node, - struct device_node *parent) -{ - struct device_node *c; - struct resource res; - void __iomem *base; - - base = of_iomap(node, 0); - if (!base) - panic("%pOFn: of_iomap failed", node); - - of_address_to_resource(node, 0, &res); - - for_each_child_of_node(node, c) - tangox_irq_init(base, &res, c); - - return 0; -} -IRQCHIP_DECLARE(tangox_intc, "sigma,smp8642-intc", tangox_of_irq_init); -- 2.29.2 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 1/2] irqchip: remove sigma tango driver @ 2021-01-20 13:30 ` Arnd Bergmann 0 siblings, 0 replies; 12+ messages in thread From: Arnd Bergmann @ 2021-01-20 13:30 UTC (permalink / raw) To: linux-arm-kernel, linux-kernel, Marc Zyngier, Thomas Gleixner Cc: Mans Rullgard, Arnd Bergmann, Marc Gonzalez From: Arnd Bergmann <arnd@arndb.de> The tango platform is getting removed, so the driver is no longer needed. Cc: Marc Gonzalez <marc.w.gonzalez@free.fr> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- .../sigma,smp8642-intc.txt | 48 ---- drivers/irqchip/Kconfig | 5 - drivers/irqchip/Makefile | 1 - drivers/irqchip/irq-tango.c | 227 ------------------ 4 files changed, 281 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt delete mode 100644 drivers/irqchip/irq-tango.c diff --git a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt deleted file mode 100644 index 355c18a3a4d3..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt +++ /dev/null @@ -1,48 +0,0 @@ -Sigma Designs SMP86xx/SMP87xx secondary interrupt controller - -Required properties: -- compatible: should be "sigma,smp8642-intc" -- reg: physical address of MMIO region -- ranges: address space mapping of child nodes -- interrupt-controller: boolean -- #address-cells: should be <1> -- #size-cells: should be <1> - -One child node per control block with properties: -- reg: address of registers for this control block -- interrupt-controller: boolean -- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt -- interrupts: interrupt spec of primary interrupt controller - -Example: - -interrupt-controller@6e000 { - compatible = "sigma,smp8642-intc"; - reg = <0x6e000 0x400>; - ranges = <0x0 0x6e000 0x400>; - interrupt-parent = <&gic>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <1>; - - irq0: interrupt-controller@0 { - reg = <0x000 0x100>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - }; - - irq1: interrupt-controller@100 { - reg = <0x100 0x100>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - }; - - irq2: interrupt-controller@300 { - reg = <0x300 0x100>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - }; -}; diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 94920a51c628..f95d114c63ed 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -260,11 +260,6 @@ config ST_IRQCHIP help Enables SysCfg Controlled IRQs on STi based platforms. -config TANGO_IRQ - bool - select IRQ_DOMAIN - select GENERIC_IRQ_CHIP - config TB10X_IRQC bool select IRQ_DOMAIN diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 0ac93bfaec61..084e11774071 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -55,7 +55,6 @@ obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o obj-$(CONFIG_ST_IRQCHIP) += irq-st.o -obj-$(CONFIG_TANGO_IRQ) += irq-tango.o obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o obj-$(CONFIG_TS4800_IRQ) += irq-ts4800.o obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o diff --git a/drivers/irqchip/irq-tango.c b/drivers/irqchip/irq-tango.c deleted file mode 100644 index 34290f09b853..000000000000 --- a/drivers/irqchip/irq-tango.c +++ /dev/null @@ -1,227 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2014 Mans Rullgard <mans@mansr.com> - */ - -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/irqchip.h> -#include <linux/irqchip/chained_irq.h> -#include <linux/ioport.h> -#include <linux/io.h> -#include <linux/of_address.h> -#include <linux/of_irq.h> -#include <linux/slab.h> - -#define IRQ0_CTL_BASE 0x0000 -#define IRQ1_CTL_BASE 0x0100 -#define EDGE_CTL_BASE 0x0200 -#define IRQ2_CTL_BASE 0x0300 - -#define IRQ_CTL_HI 0x18 -#define EDGE_CTL_HI 0x20 - -#define IRQ_STATUS 0x00 -#define IRQ_RAWSTAT 0x04 -#define IRQ_EN_SET 0x08 -#define IRQ_EN_CLR 0x0c -#define IRQ_SOFT_SET 0x10 -#define IRQ_SOFT_CLR 0x14 - -#define EDGE_STATUS 0x00 -#define EDGE_RAWSTAT 0x04 -#define EDGE_CFG_RISE 0x08 -#define EDGE_CFG_FALL 0x0c -#define EDGE_CFG_RISE_SET 0x10 -#define EDGE_CFG_RISE_CLR 0x14 -#define EDGE_CFG_FALL_SET 0x18 -#define EDGE_CFG_FALL_CLR 0x1c - -struct tangox_irq_chip { - void __iomem *base; - unsigned long ctl; -}; - -static inline u32 intc_readl(struct tangox_irq_chip *chip, int reg) -{ - return readl_relaxed(chip->base + reg); -} - -static inline void intc_writel(struct tangox_irq_chip *chip, int reg, u32 val) -{ - writel_relaxed(val, chip->base + reg); -} - -static void tangox_dispatch_irqs(struct irq_domain *dom, unsigned int status, - int base) -{ - unsigned int hwirq; - unsigned int virq; - - while (status) { - hwirq = __ffs(status); - virq = irq_find_mapping(dom, base + hwirq); - if (virq) - generic_handle_irq(virq); - status &= ~BIT(hwirq); - } -} - -static void tangox_irq_handler(struct irq_desc *desc) -{ - struct irq_domain *dom = irq_desc_get_handler_data(desc); - struct irq_chip *host_chip = irq_desc_get_chip(desc); - struct tangox_irq_chip *chip = dom->host_data; - unsigned int status_lo, status_hi; - - chained_irq_enter(host_chip, desc); - - status_lo = intc_readl(chip, chip->ctl + IRQ_STATUS); - status_hi = intc_readl(chip, chip->ctl + IRQ_CTL_HI + IRQ_STATUS); - - tangox_dispatch_irqs(dom, status_lo, 0); - tangox_dispatch_irqs(dom, status_hi, 32); - - chained_irq_exit(host_chip, desc); -} - -static int tangox_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - struct tangox_irq_chip *chip = gc->domain->host_data; - struct irq_chip_regs *regs = &gc->chip_types[0].regs; - - switch (flow_type & IRQ_TYPE_SENSE_MASK) { - case IRQ_TYPE_EDGE_RISING: - intc_writel(chip, regs->type + EDGE_CFG_RISE_SET, d->mask); - intc_writel(chip, regs->type + EDGE_CFG_FALL_CLR, d->mask); - break; - - case IRQ_TYPE_EDGE_FALLING: - intc_writel(chip, regs->type + EDGE_CFG_RISE_CLR, d->mask); - intc_writel(chip, regs->type + EDGE_CFG_FALL_SET, d->mask); - break; - - case IRQ_TYPE_LEVEL_HIGH: - intc_writel(chip, regs->type + EDGE_CFG_RISE_CLR, d->mask); - intc_writel(chip, regs->type + EDGE_CFG_FALL_CLR, d->mask); - break; - - case IRQ_TYPE_LEVEL_LOW: - intc_writel(chip, regs->type + EDGE_CFG_RISE_SET, d->mask); - intc_writel(chip, regs->type + EDGE_CFG_FALL_SET, d->mask); - break; - - default: - pr_err("Invalid trigger mode %x for IRQ %d\n", - flow_type, d->irq); - return -EINVAL; - } - - return irq_setup_alt_chip(d, flow_type); -} - -static void __init tangox_irq_init_chip(struct irq_chip_generic *gc, - unsigned long ctl_offs, - unsigned long edge_offs) -{ - struct tangox_irq_chip *chip = gc->domain->host_data; - struct irq_chip_type *ct = gc->chip_types; - unsigned long ctl_base = chip->ctl + ctl_offs; - unsigned long edge_base = EDGE_CTL_BASE + edge_offs; - int i; - - gc->reg_base = chip->base; - gc->unused = 0; - - for (i = 0; i < 2; i++) { - ct[i].chip.irq_ack = irq_gc_ack_set_bit; - ct[i].chip.irq_mask = irq_gc_mask_disable_reg; - ct[i].chip.irq_mask_ack = irq_gc_mask_disable_and_ack_set; - ct[i].chip.irq_unmask = irq_gc_unmask_enable_reg; - ct[i].chip.irq_set_type = tangox_irq_set_type; - ct[i].chip.name = gc->domain->name; - - ct[i].regs.enable = ctl_base + IRQ_EN_SET; - ct[i].regs.disable = ctl_base + IRQ_EN_CLR; - ct[i].regs.ack = edge_base + EDGE_RAWSTAT; - ct[i].regs.type = edge_base; - } - - ct[0].type = IRQ_TYPE_LEVEL_MASK; - ct[0].handler = handle_level_irq; - - ct[1].type = IRQ_TYPE_EDGE_BOTH; - ct[1].handler = handle_edge_irq; - - intc_writel(chip, ct->regs.disable, 0xffffffff); - intc_writel(chip, ct->regs.ack, 0xffffffff); -} - -static void __init tangox_irq_domain_init(struct irq_domain *dom) -{ - struct irq_chip_generic *gc; - int i; - - for (i = 0; i < 2; i++) { - gc = irq_get_domain_generic_chip(dom, i * 32); - tangox_irq_init_chip(gc, i * IRQ_CTL_HI, i * EDGE_CTL_HI); - } -} - -static int __init tangox_irq_init(void __iomem *base, struct resource *baseres, - struct device_node *node) -{ - struct tangox_irq_chip *chip; - struct irq_domain *dom; - struct resource res; - int irq; - int err; - - irq = irq_of_parse_and_map(node, 0); - if (!irq) - panic("%pOFn: failed to get IRQ", node); - - err = of_address_to_resource(node, 0, &res); - if (err) - panic("%pOFn: failed to get address", node); - - chip = kzalloc(sizeof(*chip), GFP_KERNEL); - chip->ctl = res.start - baseres->start; - chip->base = base; - - dom = irq_domain_add_linear(node, 64, &irq_generic_chip_ops, chip); - if (!dom) - panic("%pOFn: failed to create irqdomain", node); - - err = irq_alloc_domain_generic_chips(dom, 32, 2, node->name, - handle_level_irq, 0, 0, 0); - if (err) - panic("%pOFn: failed to allocate irqchip", node); - - tangox_irq_domain_init(dom); - - irq_set_chained_handler_and_data(irq, tangox_irq_handler, dom); - - return 0; -} - -static int __init tangox_of_irq_init(struct device_node *node, - struct device_node *parent) -{ - struct device_node *c; - struct resource res; - void __iomem *base; - - base = of_iomap(node, 0); - if (!base) - panic("%pOFn: of_iomap failed", node); - - of_address_to_resource(node, 0, &res); - - for_each_child_of_node(node, c) - tangox_irq_init(base, &res, c); - - return 0; -} -IRQCHIP_DECLARE(tangox_intc, "sigma,smp8642-intc", tangox_of_irq_init); -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] irqchip: remove sigma tango driver 2021-01-20 13:30 ` Arnd Bergmann @ 2021-01-21 13:52 ` Måns Rullgård -1 siblings, 0 replies; 12+ messages in thread From: Måns Rullgård @ 2021-01-21 13:52 UTC (permalink / raw) To: Arnd Bergmann Cc: linux-arm-kernel, linux-kernel, Marc Zyngier, Thomas Gleixner, Arnd Bergmann, Marc Gonzalez Arnd Bergmann <arnd@kernel.org> writes: > From: Arnd Bergmann <arnd@arndb.de> > > The tango platform is getting removed, so the driver is no > longer needed. > > Cc: Marc Gonzalez <marc.w.gonzalez@free.fr> > Cc: Mans Rullgard <mans@mansr.com> > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mans Rullgard <mans@mansr.com> > --- > .../sigma,smp8642-intc.txt | 48 ---- > drivers/irqchip/Kconfig | 5 - > drivers/irqchip/Makefile | 1 - > drivers/irqchip/irq-tango.c | 227 ------------------ > 4 files changed, 281 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt > delete mode 100644 drivers/irqchip/irq-tango.c > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt > deleted file mode 100644 > index 355c18a3a4d3..000000000000 > --- a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt > +++ /dev/null > @@ -1,48 +0,0 @@ > -Sigma Designs SMP86xx/SMP87xx secondary interrupt controller > - > -Required properties: > -- compatible: should be "sigma,smp8642-intc" > > -- reg: physical address of MMIO region > -- ranges: address space mapping of child nodes > -- interrupt-controller: boolean > -- #address-cells: should be <1> > -- #size-cells: should be <1> > - > -One child node per control block with properties: > -- reg: address of registers for this control block > -- interrupt-controller: boolean > -- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt > -- interrupts: interrupt spec of primary interrupt controller > - > -Example: > - > -interrupt-controller@6e000 { > - compatible = "sigma,smp8642-intc"; > - reg = <0x6e000 0x400>; > - ranges = <0x0 0x6e000 0x400>; > - interrupt-parent = <&gic>; > - interrupt-controller; > - #address-cells = <1>; > - #size-cells = <1>; > - > - irq0: interrupt-controller@0 { > - reg = <0x000 0x100>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - irq1: interrupt-controller@100 { > - reg = <0x100 0x100>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - irq2: interrupt-controller@300 { > - reg = <0x300 0x100>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; > - }; > -}; > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > index 94920a51c628..f95d114c63ed 100644 > --- a/drivers/irqchip/Kconfig > +++ b/drivers/irqchip/Kconfig > @@ -260,11 +260,6 @@ config ST_IRQCHIP > help > Enables SysCfg Controlled IRQs on STi based platforms. > > -config TANGO_IRQ > - bool > - select IRQ_DOMAIN > - select GENERIC_IRQ_CHIP > - > config TB10X_IRQC > bool > select IRQ_DOMAIN > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile > index 0ac93bfaec61..084e11774071 100644 > --- a/drivers/irqchip/Makefile > +++ b/drivers/irqchip/Makefile > @@ -55,7 +55,6 @@ obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o > obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o > obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o > obj-$(CONFIG_ST_IRQCHIP) += irq-st.o > -obj-$(CONFIG_TANGO_IRQ) += irq-tango.o > obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o > obj-$(CONFIG_TS4800_IRQ) += irq-ts4800.o > obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o > diff --git a/drivers/irqchip/irq-tango.c b/drivers/irqchip/irq-tango.c > deleted file mode 100644 > index 34290f09b853..000000000000 > --- a/drivers/irqchip/irq-tango.c > +++ /dev/null > @@ -1,227 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0-or-later > -/* > - * Copyright (C) 2014 Mans Rullgard <mans@mansr.com> > - */ > - > -#include <linux/init.h> > -#include <linux/irq.h> > -#include <linux/irqchip.h> > -#include <linux/irqchip/chained_irq.h> > -#include <linux/ioport.h> > -#include <linux/io.h> > -#include <linux/of_address.h> > -#include <linux/of_irq.h> > -#include <linux/slab.h> > - > -#define IRQ0_CTL_BASE 0x0000 > -#define IRQ1_CTL_BASE 0x0100 > -#define EDGE_CTL_BASE 0x0200 > -#define IRQ2_CTL_BASE 0x0300 > - > -#define IRQ_CTL_HI 0x18 > -#define EDGE_CTL_HI 0x20 > - > -#define IRQ_STATUS 0x00 > -#define IRQ_RAWSTAT 0x04 > -#define IRQ_EN_SET 0x08 > -#define IRQ_EN_CLR 0x0c > -#define IRQ_SOFT_SET 0x10 > -#define IRQ_SOFT_CLR 0x14 > - > -#define EDGE_STATUS 0x00 > -#define EDGE_RAWSTAT 0x04 > -#define EDGE_CFG_RISE 0x08 > -#define EDGE_CFG_FALL 0x0c > -#define EDGE_CFG_RISE_SET 0x10 > -#define EDGE_CFG_RISE_CLR 0x14 > -#define EDGE_CFG_FALL_SET 0x18 > -#define EDGE_CFG_FALL_CLR 0x1c > - > -struct tangox_irq_chip { > - void __iomem *base; > - unsigned long ctl; > -}; > - > -static inline u32 intc_readl(struct tangox_irq_chip *chip, int reg) > -{ > - return readl_relaxed(chip->base + reg); > -} > - > -static inline void intc_writel(struct tangox_irq_chip *chip, int reg, u32 val) > -{ > - writel_relaxed(val, chip->base + reg); > -} > - > -static void tangox_dispatch_irqs(struct irq_domain *dom, unsigned int status, > - int base) > -{ > - unsigned int hwirq; > - unsigned int virq; > - > - while (status) { > - hwirq = __ffs(status); > - virq = irq_find_mapping(dom, base + hwirq); > - if (virq) > - generic_handle_irq(virq); > - status &= ~BIT(hwirq); > - } > -} > - > -static void tangox_irq_handler(struct irq_desc *desc) > -{ > - struct irq_domain *dom = irq_desc_get_handler_data(desc); > - struct irq_chip *host_chip = irq_desc_get_chip(desc); > - struct tangox_irq_chip *chip = dom->host_data; > - unsigned int status_lo, status_hi; > - > - chained_irq_enter(host_chip, desc); > - > - status_lo = intc_readl(chip, chip->ctl + IRQ_STATUS); > - status_hi = intc_readl(chip, chip->ctl + IRQ_CTL_HI + IRQ_STATUS); > - > - tangox_dispatch_irqs(dom, status_lo, 0); > - tangox_dispatch_irqs(dom, status_hi, 32); > - > - chained_irq_exit(host_chip, desc); > -} > - > -static int tangox_irq_set_type(struct irq_data *d, unsigned int flow_type) > -{ > - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); > - struct tangox_irq_chip *chip = gc->domain->host_data; > - struct irq_chip_regs *regs = &gc->chip_types[0].regs; > - > - switch (flow_type & IRQ_TYPE_SENSE_MASK) { > - case IRQ_TYPE_EDGE_RISING: > - intc_writel(chip, regs->type + EDGE_CFG_RISE_SET, d->mask); > - intc_writel(chip, regs->type + EDGE_CFG_FALL_CLR, d->mask); > - break; > - > - case IRQ_TYPE_EDGE_FALLING: > - intc_writel(chip, regs->type + EDGE_CFG_RISE_CLR, d->mask); > - intc_writel(chip, regs->type + EDGE_CFG_FALL_SET, d->mask); > - break; > - > - case IRQ_TYPE_LEVEL_HIGH: > - intc_writel(chip, regs->type + EDGE_CFG_RISE_CLR, d->mask); > - intc_writel(chip, regs->type + EDGE_CFG_FALL_CLR, d->mask); > - break; > - > - case IRQ_TYPE_LEVEL_LOW: > - intc_writel(chip, regs->type + EDGE_CFG_RISE_SET, d->mask); > - intc_writel(chip, regs->type + EDGE_CFG_FALL_SET, d->mask); > - break; > - > - default: > - pr_err("Invalid trigger mode %x for IRQ %d\n", > - flow_type, d->irq); > - return -EINVAL; > - } > - > - return irq_setup_alt_chip(d, flow_type); > -} > - > -static void __init tangox_irq_init_chip(struct irq_chip_generic *gc, > - unsigned long ctl_offs, > - unsigned long edge_offs) > -{ > - struct tangox_irq_chip *chip = gc->domain->host_data; > - struct irq_chip_type *ct = gc->chip_types; > - unsigned long ctl_base = chip->ctl + ctl_offs; > - unsigned long edge_base = EDGE_CTL_BASE + edge_offs; > - int i; > - > - gc->reg_base = chip->base; > - gc->unused = 0; > - > - for (i = 0; i < 2; i++) { > - ct[i].chip.irq_ack = irq_gc_ack_set_bit; > - ct[i].chip.irq_mask = irq_gc_mask_disable_reg; > - ct[i].chip.irq_mask_ack = irq_gc_mask_disable_and_ack_set; > - ct[i].chip.irq_unmask = irq_gc_unmask_enable_reg; > - ct[i].chip.irq_set_type = tangox_irq_set_type; > - ct[i].chip.name = gc->domain->name; > - > - ct[i].regs.enable = ctl_base + IRQ_EN_SET; > - ct[i].regs.disable = ctl_base + IRQ_EN_CLR; > - ct[i].regs.ack = edge_base + EDGE_RAWSTAT; > - ct[i].regs.type = edge_base; > - } > - > - ct[0].type = IRQ_TYPE_LEVEL_MASK; > - ct[0].handler = handle_level_irq; > - > - ct[1].type = IRQ_TYPE_EDGE_BOTH; > - ct[1].handler = handle_edge_irq; > - > - intc_writel(chip, ct->regs.disable, 0xffffffff); > - intc_writel(chip, ct->regs.ack, 0xffffffff); > -} > - > -static void __init tangox_irq_domain_init(struct irq_domain *dom) > -{ > - struct irq_chip_generic *gc; > - int i; > - > - for (i = 0; i < 2; i++) { > - gc = irq_get_domain_generic_chip(dom, i * 32); > - tangox_irq_init_chip(gc, i * IRQ_CTL_HI, i * EDGE_CTL_HI); > - } > -} > - > -static int __init tangox_irq_init(void __iomem *base, struct resource *baseres, > - struct device_node *node) > -{ > - struct tangox_irq_chip *chip; > - struct irq_domain *dom; > - struct resource res; > - int irq; > - int err; > - > - irq = irq_of_parse_and_map(node, 0); > - if (!irq) > - panic("%pOFn: failed to get IRQ", node); > - > - err = of_address_to_resource(node, 0, &res); > - if (err) > - panic("%pOFn: failed to get address", node); > - > - chip = kzalloc(sizeof(*chip), GFP_KERNEL); > - chip->ctl = res.start - baseres->start; > - chip->base = base; > - > - dom = irq_domain_add_linear(node, 64, &irq_generic_chip_ops, chip); > - if (!dom) > - panic("%pOFn: failed to create irqdomain", node); > - > - err = irq_alloc_domain_generic_chips(dom, 32, 2, node->name, > - handle_level_irq, 0, 0, 0); > - if (err) > - panic("%pOFn: failed to allocate irqchip", node); > - > - tangox_irq_domain_init(dom); > - > - irq_set_chained_handler_and_data(irq, tangox_irq_handler, dom); > - > - return 0; > -} > - > -static int __init tangox_of_irq_init(struct device_node *node, > - struct device_node *parent) > -{ > - struct device_node *c; > - struct resource res; > - void __iomem *base; > - > - base = of_iomap(node, 0); > - if (!base) > - panic("%pOFn: of_iomap failed", node); > - > - of_address_to_resource(node, 0, &res); > - > - for_each_child_of_node(node, c) > - tangox_irq_init(base, &res, c); > - > - return 0; > -} > -IRQCHIP_DECLARE(tangox_intc, "sigma,smp8642-intc", tangox_of_irq_init); > -- > > 2.29.2 > -- Måns Rullgård ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] irqchip: remove sigma tango driver @ 2021-01-21 13:52 ` Måns Rullgård 0 siblings, 0 replies; 12+ messages in thread From: Måns Rullgård @ 2021-01-21 13:52 UTC (permalink / raw) To: Arnd Bergmann Cc: Arnd Bergmann, Marc Gonzalez, Marc Zyngier, linux-kernel, Thomas Gleixner, linux-arm-kernel Arnd Bergmann <arnd@kernel.org> writes: > From: Arnd Bergmann <arnd@arndb.de> > > The tango platform is getting removed, so the driver is no > longer needed. > > Cc: Marc Gonzalez <marc.w.gonzalez@free.fr> > Cc: Mans Rullgard <mans@mansr.com> > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mans Rullgard <mans@mansr.com> > --- > .../sigma,smp8642-intc.txt | 48 ---- > drivers/irqchip/Kconfig | 5 - > drivers/irqchip/Makefile | 1 - > drivers/irqchip/irq-tango.c | 227 ------------------ > 4 files changed, 281 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt > delete mode 100644 drivers/irqchip/irq-tango.c > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt > deleted file mode 100644 > index 355c18a3a4d3..000000000000 > --- a/Documentation/devicetree/bindings/interrupt-controller/sigma,smp8642-intc.txt > +++ /dev/null > @@ -1,48 +0,0 @@ > -Sigma Designs SMP86xx/SMP87xx secondary interrupt controller > - > -Required properties: > -- compatible: should be "sigma,smp8642-intc" > > -- reg: physical address of MMIO region > -- ranges: address space mapping of child nodes > -- interrupt-controller: boolean > -- #address-cells: should be <1> > -- #size-cells: should be <1> > - > -One child node per control block with properties: > -- reg: address of registers for this control block > -- interrupt-controller: boolean > -- #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt > -- interrupts: interrupt spec of primary interrupt controller > - > -Example: > - > -interrupt-controller@6e000 { > - compatible = "sigma,smp8642-intc"; > - reg = <0x6e000 0x400>; > - ranges = <0x0 0x6e000 0x400>; > - interrupt-parent = <&gic>; > - interrupt-controller; > - #address-cells = <1>; > - #size-cells = <1>; > - > - irq0: interrupt-controller@0 { > - reg = <0x000 0x100>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - irq1: interrupt-controller@100 { > - reg = <0x100 0x100>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - irq2: interrupt-controller@300 { > - reg = <0x300 0x100>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; > - }; > -}; > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > index 94920a51c628..f95d114c63ed 100644 > --- a/drivers/irqchip/Kconfig > +++ b/drivers/irqchip/Kconfig > @@ -260,11 +260,6 @@ config ST_IRQCHIP > help > Enables SysCfg Controlled IRQs on STi based platforms. > > -config TANGO_IRQ > - bool > - select IRQ_DOMAIN > - select GENERIC_IRQ_CHIP > - > config TB10X_IRQC > bool > select IRQ_DOMAIN > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile > index 0ac93bfaec61..084e11774071 100644 > --- a/drivers/irqchip/Makefile > +++ b/drivers/irqchip/Makefile > @@ -55,7 +55,6 @@ obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o > obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o > obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o > obj-$(CONFIG_ST_IRQCHIP) += irq-st.o > -obj-$(CONFIG_TANGO_IRQ) += irq-tango.o > obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o > obj-$(CONFIG_TS4800_IRQ) += irq-ts4800.o > obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o > diff --git a/drivers/irqchip/irq-tango.c b/drivers/irqchip/irq-tango.c > deleted file mode 100644 > index 34290f09b853..000000000000 > --- a/drivers/irqchip/irq-tango.c > +++ /dev/null > @@ -1,227 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0-or-later > -/* > - * Copyright (C) 2014 Mans Rullgard <mans@mansr.com> > - */ > - > -#include <linux/init.h> > -#include <linux/irq.h> > -#include <linux/irqchip.h> > -#include <linux/irqchip/chained_irq.h> > -#include <linux/ioport.h> > -#include <linux/io.h> > -#include <linux/of_address.h> > -#include <linux/of_irq.h> > -#include <linux/slab.h> > - > -#define IRQ0_CTL_BASE 0x0000 > -#define IRQ1_CTL_BASE 0x0100 > -#define EDGE_CTL_BASE 0x0200 > -#define IRQ2_CTL_BASE 0x0300 > - > -#define IRQ_CTL_HI 0x18 > -#define EDGE_CTL_HI 0x20 > - > -#define IRQ_STATUS 0x00 > -#define IRQ_RAWSTAT 0x04 > -#define IRQ_EN_SET 0x08 > -#define IRQ_EN_CLR 0x0c > -#define IRQ_SOFT_SET 0x10 > -#define IRQ_SOFT_CLR 0x14 > - > -#define EDGE_STATUS 0x00 > -#define EDGE_RAWSTAT 0x04 > -#define EDGE_CFG_RISE 0x08 > -#define EDGE_CFG_FALL 0x0c > -#define EDGE_CFG_RISE_SET 0x10 > -#define EDGE_CFG_RISE_CLR 0x14 > -#define EDGE_CFG_FALL_SET 0x18 > -#define EDGE_CFG_FALL_CLR 0x1c > - > -struct tangox_irq_chip { > - void __iomem *base; > - unsigned long ctl; > -}; > - > -static inline u32 intc_readl(struct tangox_irq_chip *chip, int reg) > -{ > - return readl_relaxed(chip->base + reg); > -} > - > -static inline void intc_writel(struct tangox_irq_chip *chip, int reg, u32 val) > -{ > - writel_relaxed(val, chip->base + reg); > -} > - > -static void tangox_dispatch_irqs(struct irq_domain *dom, unsigned int status, > - int base) > -{ > - unsigned int hwirq; > - unsigned int virq; > - > - while (status) { > - hwirq = __ffs(status); > - virq = irq_find_mapping(dom, base + hwirq); > - if (virq) > - generic_handle_irq(virq); > - status &= ~BIT(hwirq); > - } > -} > - > -static void tangox_irq_handler(struct irq_desc *desc) > -{ > - struct irq_domain *dom = irq_desc_get_handler_data(desc); > - struct irq_chip *host_chip = irq_desc_get_chip(desc); > - struct tangox_irq_chip *chip = dom->host_data; > - unsigned int status_lo, status_hi; > - > - chained_irq_enter(host_chip, desc); > - > - status_lo = intc_readl(chip, chip->ctl + IRQ_STATUS); > - status_hi = intc_readl(chip, chip->ctl + IRQ_CTL_HI + IRQ_STATUS); > - > - tangox_dispatch_irqs(dom, status_lo, 0); > - tangox_dispatch_irqs(dom, status_hi, 32); > - > - chained_irq_exit(host_chip, desc); > -} > - > -static int tangox_irq_set_type(struct irq_data *d, unsigned int flow_type) > -{ > - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); > - struct tangox_irq_chip *chip = gc->domain->host_data; > - struct irq_chip_regs *regs = &gc->chip_types[0].regs; > - > - switch (flow_type & IRQ_TYPE_SENSE_MASK) { > - case IRQ_TYPE_EDGE_RISING: > - intc_writel(chip, regs->type + EDGE_CFG_RISE_SET, d->mask); > - intc_writel(chip, regs->type + EDGE_CFG_FALL_CLR, d->mask); > - break; > - > - case IRQ_TYPE_EDGE_FALLING: > - intc_writel(chip, regs->type + EDGE_CFG_RISE_CLR, d->mask); > - intc_writel(chip, regs->type + EDGE_CFG_FALL_SET, d->mask); > - break; > - > - case IRQ_TYPE_LEVEL_HIGH: > - intc_writel(chip, regs->type + EDGE_CFG_RISE_CLR, d->mask); > - intc_writel(chip, regs->type + EDGE_CFG_FALL_CLR, d->mask); > - break; > - > - case IRQ_TYPE_LEVEL_LOW: > - intc_writel(chip, regs->type + EDGE_CFG_RISE_SET, d->mask); > - intc_writel(chip, regs->type + EDGE_CFG_FALL_SET, d->mask); > - break; > - > - default: > - pr_err("Invalid trigger mode %x for IRQ %d\n", > - flow_type, d->irq); > - return -EINVAL; > - } > - > - return irq_setup_alt_chip(d, flow_type); > -} > - > -static void __init tangox_irq_init_chip(struct irq_chip_generic *gc, > - unsigned long ctl_offs, > - unsigned long edge_offs) > -{ > - struct tangox_irq_chip *chip = gc->domain->host_data; > - struct irq_chip_type *ct = gc->chip_types; > - unsigned long ctl_base = chip->ctl + ctl_offs; > - unsigned long edge_base = EDGE_CTL_BASE + edge_offs; > - int i; > - > - gc->reg_base = chip->base; > - gc->unused = 0; > - > - for (i = 0; i < 2; i++) { > - ct[i].chip.irq_ack = irq_gc_ack_set_bit; > - ct[i].chip.irq_mask = irq_gc_mask_disable_reg; > - ct[i].chip.irq_mask_ack = irq_gc_mask_disable_and_ack_set; > - ct[i].chip.irq_unmask = irq_gc_unmask_enable_reg; > - ct[i].chip.irq_set_type = tangox_irq_set_type; > - ct[i].chip.name = gc->domain->name; > - > - ct[i].regs.enable = ctl_base + IRQ_EN_SET; > - ct[i].regs.disable = ctl_base + IRQ_EN_CLR; > - ct[i].regs.ack = edge_base + EDGE_RAWSTAT; > - ct[i].regs.type = edge_base; > - } > - > - ct[0].type = IRQ_TYPE_LEVEL_MASK; > - ct[0].handler = handle_level_irq; > - > - ct[1].type = IRQ_TYPE_EDGE_BOTH; > - ct[1].handler = handle_edge_irq; > - > - intc_writel(chip, ct->regs.disable, 0xffffffff); > - intc_writel(chip, ct->regs.ack, 0xffffffff); > -} > - > -static void __init tangox_irq_domain_init(struct irq_domain *dom) > -{ > - struct irq_chip_generic *gc; > - int i; > - > - for (i = 0; i < 2; i++) { > - gc = irq_get_domain_generic_chip(dom, i * 32); > - tangox_irq_init_chip(gc, i * IRQ_CTL_HI, i * EDGE_CTL_HI); > - } > -} > - > -static int __init tangox_irq_init(void __iomem *base, struct resource *baseres, > - struct device_node *node) > -{ > - struct tangox_irq_chip *chip; > - struct irq_domain *dom; > - struct resource res; > - int irq; > - int err; > - > - irq = irq_of_parse_and_map(node, 0); > - if (!irq) > - panic("%pOFn: failed to get IRQ", node); > - > - err = of_address_to_resource(node, 0, &res); > - if (err) > - panic("%pOFn: failed to get address", node); > - > - chip = kzalloc(sizeof(*chip), GFP_KERNEL); > - chip->ctl = res.start - baseres->start; > - chip->base = base; > - > - dom = irq_domain_add_linear(node, 64, &irq_generic_chip_ops, chip); > - if (!dom) > - panic("%pOFn: failed to create irqdomain", node); > - > - err = irq_alloc_domain_generic_chips(dom, 32, 2, node->name, > - handle_level_irq, 0, 0, 0); > - if (err) > - panic("%pOFn: failed to allocate irqchip", node); > - > - tangox_irq_domain_init(dom); > - > - irq_set_chained_handler_and_data(irq, tangox_irq_handler, dom); > - > - return 0; > -} > - > -static int __init tangox_of_irq_init(struct device_node *node, > - struct device_node *parent) > -{ > - struct device_node *c; > - struct resource res; > - void __iomem *base; > - > - base = of_iomap(node, 0); > - if (!base) > - panic("%pOFn: of_iomap failed", node); > - > - of_address_to_resource(node, 0, &res); > - > - for_each_child_of_node(node, c) > - tangox_irq_init(base, &res, c); > - > - return 0; > -} > -IRQCHIP_DECLARE(tangox_intc, "sigma,smp8642-intc", tangox_of_irq_init); > -- > > 2.29.2 > -- Måns Rullgård _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/2] irqchip: remove sirfsoc driver 2021-01-20 13:30 ` Arnd Bergmann @ 2021-01-20 13:30 ` Arnd Bergmann -1 siblings, 0 replies; 12+ messages in thread From: Arnd Bergmann @ 2021-01-20 13:30 UTC (permalink / raw) To: linux-arm-kernel, linux-kernel, Marc Zyngier, Thomas Gleixner Cc: Arnd Bergmann, Barry Song From: Arnd Bergmann <arnd@arndb.de> The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- drivers/irqchip/Makefile | 1 - drivers/irqchip/irq-sirfsoc.c | 134 ---------------------------------- 2 files changed, 135 deletions(-) delete mode 100644 drivers/irqchip/irq-sirfsoc.c diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 084e11774071..37e3556df127 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -45,7 +45,6 @@ obj-$(CONFIG_I8259) += irq-i8259.o obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-cpu.o obj-$(CONFIG_IXP4XX_IRQ) += irq-ixp4xx.o -obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o obj-$(CONFIG_JCORE_AIC) += irq-jcore-aic.o obj-$(CONFIG_RDA_INTC) += irq-rda-intc.o obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o diff --git a/drivers/irqchip/irq-sirfsoc.c b/drivers/irqchip/irq-sirfsoc.c deleted file mode 100644 index c86faaa35ca4..000000000000 --- a/drivers/irqchip/irq-sirfsoc.c +++ /dev/null @@ -1,134 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * interrupt controller support for CSR SiRFprimaII - * - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - */ - -#include <linux/init.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/of.h> -#include <linux/of_address.h> -#include <linux/irqchip.h> -#include <linux/irqdomain.h> -#include <linux/syscore_ops.h> -#include <asm/mach/irq.h> -#include <asm/exception.h> - -#define SIRFSOC_INT_RISC_MASK0 0x0018 -#define SIRFSOC_INT_RISC_MASK1 0x001C -#define SIRFSOC_INT_RISC_LEVEL0 0x0020 -#define SIRFSOC_INT_RISC_LEVEL1 0x0024 -#define SIRFSOC_INIT_IRQ_ID 0x0038 -#define SIRFSOC_INT_BASE_OFFSET 0x0004 - -#define SIRFSOC_NUM_IRQS 64 -#define SIRFSOC_NUM_BANKS (SIRFSOC_NUM_IRQS / 32) - -static struct irq_domain *sirfsoc_irqdomain; - -static void __iomem *sirfsoc_irq_get_regbase(void) -{ - return (void __iomem __force *)sirfsoc_irqdomain->host_data; -} - -static __init void sirfsoc_alloc_gc(void __iomem *base) -{ - unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; - unsigned int set = IRQ_LEVEL; - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - int i; - - irq_alloc_domain_generic_chips(sirfsoc_irqdomain, 32, 1, "irq_sirfsoc", - handle_level_irq, clr, set, - IRQ_GC_INIT_MASK_CACHE); - - for (i = 0; i < SIRFSOC_NUM_BANKS; i++) { - gc = irq_get_domain_generic_chip(sirfsoc_irqdomain, i * 32); - gc->reg_base = base + i * SIRFSOC_INT_BASE_OFFSET; - ct = gc->chip_types; - ct->chip.irq_mask = irq_gc_mask_clr_bit; - ct->chip.irq_unmask = irq_gc_mask_set_bit; - ct->regs.mask = SIRFSOC_INT_RISC_MASK0; - } -} - -static void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs) -{ - void __iomem *base = sirfsoc_irq_get_regbase(); - u32 irqstat; - - irqstat = readl_relaxed(base + SIRFSOC_INIT_IRQ_ID); - handle_domain_irq(sirfsoc_irqdomain, irqstat & 0xff, regs); -} - -static int __init sirfsoc_irq_init(struct device_node *np, - struct device_node *parent) -{ - void __iomem *base = of_iomap(np, 0); - if (!base) - panic("unable to map intc cpu registers\n"); - - sirfsoc_irqdomain = irq_domain_add_linear(np, SIRFSOC_NUM_IRQS, - &irq_generic_chip_ops, base); - sirfsoc_alloc_gc(base); - - writel_relaxed(0, base + SIRFSOC_INT_RISC_LEVEL0); - writel_relaxed(0, base + SIRFSOC_INT_RISC_LEVEL1); - - writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK0); - writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK1); - - set_handle_irq(sirfsoc_handle_irq); - - return 0; -} -IRQCHIP_DECLARE(sirfsoc_intc, "sirf,prima2-intc", sirfsoc_irq_init); - -struct sirfsoc_irq_status { - u32 mask0; - u32 mask1; - u32 level0; - u32 level1; -}; - -static struct sirfsoc_irq_status sirfsoc_irq_st; - -static int sirfsoc_irq_suspend(void) -{ - void __iomem *base = sirfsoc_irq_get_regbase(); - - sirfsoc_irq_st.mask0 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK0); - sirfsoc_irq_st.mask1 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK1); - sirfsoc_irq_st.level0 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL0); - sirfsoc_irq_st.level1 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL1); - - return 0; -} - -static void sirfsoc_irq_resume(void) -{ - void __iomem *base = sirfsoc_irq_get_regbase(); - - writel_relaxed(sirfsoc_irq_st.mask0, base + SIRFSOC_INT_RISC_MASK0); - writel_relaxed(sirfsoc_irq_st.mask1, base + SIRFSOC_INT_RISC_MASK1); - writel_relaxed(sirfsoc_irq_st.level0, base + SIRFSOC_INT_RISC_LEVEL0); - writel_relaxed(sirfsoc_irq_st.level1, base + SIRFSOC_INT_RISC_LEVEL1); -} - -static struct syscore_ops sirfsoc_irq_syscore_ops = { - .suspend = sirfsoc_irq_suspend, - .resume = sirfsoc_irq_resume, -}; - -static int __init sirfsoc_irq_pm_init(void) -{ - if (!sirfsoc_irqdomain) - return 0; - - register_syscore_ops(&sirfsoc_irq_syscore_ops); - return 0; -} -device_initcall(sirfsoc_irq_pm_init); -- 2.29.2 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] irqchip: remove sirfsoc driver @ 2021-01-20 13:30 ` Arnd Bergmann 0 siblings, 0 replies; 12+ messages in thread From: Arnd Bergmann @ 2021-01-20 13:30 UTC (permalink / raw) To: linux-arm-kernel, linux-kernel, Marc Zyngier, Thomas Gleixner Cc: Barry Song, Arnd Bergmann From: Arnd Bergmann <arnd@arndb.de> The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- drivers/irqchip/Makefile | 1 - drivers/irqchip/irq-sirfsoc.c | 134 ---------------------------------- 2 files changed, 135 deletions(-) delete mode 100644 drivers/irqchip/irq-sirfsoc.c diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 084e11774071..37e3556df127 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -45,7 +45,6 @@ obj-$(CONFIG_I8259) += irq-i8259.o obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-cpu.o obj-$(CONFIG_IXP4XX_IRQ) += irq-ixp4xx.o -obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o obj-$(CONFIG_JCORE_AIC) += irq-jcore-aic.o obj-$(CONFIG_RDA_INTC) += irq-rda-intc.o obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o diff --git a/drivers/irqchip/irq-sirfsoc.c b/drivers/irqchip/irq-sirfsoc.c deleted file mode 100644 index c86faaa35ca4..000000000000 --- a/drivers/irqchip/irq-sirfsoc.c +++ /dev/null @@ -1,134 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * interrupt controller support for CSR SiRFprimaII - * - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - */ - -#include <linux/init.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/of.h> -#include <linux/of_address.h> -#include <linux/irqchip.h> -#include <linux/irqdomain.h> -#include <linux/syscore_ops.h> -#include <asm/mach/irq.h> -#include <asm/exception.h> - -#define SIRFSOC_INT_RISC_MASK0 0x0018 -#define SIRFSOC_INT_RISC_MASK1 0x001C -#define SIRFSOC_INT_RISC_LEVEL0 0x0020 -#define SIRFSOC_INT_RISC_LEVEL1 0x0024 -#define SIRFSOC_INIT_IRQ_ID 0x0038 -#define SIRFSOC_INT_BASE_OFFSET 0x0004 - -#define SIRFSOC_NUM_IRQS 64 -#define SIRFSOC_NUM_BANKS (SIRFSOC_NUM_IRQS / 32) - -static struct irq_domain *sirfsoc_irqdomain; - -static void __iomem *sirfsoc_irq_get_regbase(void) -{ - return (void __iomem __force *)sirfsoc_irqdomain->host_data; -} - -static __init void sirfsoc_alloc_gc(void __iomem *base) -{ - unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; - unsigned int set = IRQ_LEVEL; - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - int i; - - irq_alloc_domain_generic_chips(sirfsoc_irqdomain, 32, 1, "irq_sirfsoc", - handle_level_irq, clr, set, - IRQ_GC_INIT_MASK_CACHE); - - for (i = 0; i < SIRFSOC_NUM_BANKS; i++) { - gc = irq_get_domain_generic_chip(sirfsoc_irqdomain, i * 32); - gc->reg_base = base + i * SIRFSOC_INT_BASE_OFFSET; - ct = gc->chip_types; - ct->chip.irq_mask = irq_gc_mask_clr_bit; - ct->chip.irq_unmask = irq_gc_mask_set_bit; - ct->regs.mask = SIRFSOC_INT_RISC_MASK0; - } -} - -static void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs) -{ - void __iomem *base = sirfsoc_irq_get_regbase(); - u32 irqstat; - - irqstat = readl_relaxed(base + SIRFSOC_INIT_IRQ_ID); - handle_domain_irq(sirfsoc_irqdomain, irqstat & 0xff, regs); -} - -static int __init sirfsoc_irq_init(struct device_node *np, - struct device_node *parent) -{ - void __iomem *base = of_iomap(np, 0); - if (!base) - panic("unable to map intc cpu registers\n"); - - sirfsoc_irqdomain = irq_domain_add_linear(np, SIRFSOC_NUM_IRQS, - &irq_generic_chip_ops, base); - sirfsoc_alloc_gc(base); - - writel_relaxed(0, base + SIRFSOC_INT_RISC_LEVEL0); - writel_relaxed(0, base + SIRFSOC_INT_RISC_LEVEL1); - - writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK0); - writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK1); - - set_handle_irq(sirfsoc_handle_irq); - - return 0; -} -IRQCHIP_DECLARE(sirfsoc_intc, "sirf,prima2-intc", sirfsoc_irq_init); - -struct sirfsoc_irq_status { - u32 mask0; - u32 mask1; - u32 level0; - u32 level1; -}; - -static struct sirfsoc_irq_status sirfsoc_irq_st; - -static int sirfsoc_irq_suspend(void) -{ - void __iomem *base = sirfsoc_irq_get_regbase(); - - sirfsoc_irq_st.mask0 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK0); - sirfsoc_irq_st.mask1 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK1); - sirfsoc_irq_st.level0 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL0); - sirfsoc_irq_st.level1 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL1); - - return 0; -} - -static void sirfsoc_irq_resume(void) -{ - void __iomem *base = sirfsoc_irq_get_regbase(); - - writel_relaxed(sirfsoc_irq_st.mask0, base + SIRFSOC_INT_RISC_MASK0); - writel_relaxed(sirfsoc_irq_st.mask1, base + SIRFSOC_INT_RISC_MASK1); - writel_relaxed(sirfsoc_irq_st.level0, base + SIRFSOC_INT_RISC_LEVEL0); - writel_relaxed(sirfsoc_irq_st.level1, base + SIRFSOC_INT_RISC_LEVEL1); -} - -static struct syscore_ops sirfsoc_irq_syscore_ops = { - .suspend = sirfsoc_irq_suspend, - .resume = sirfsoc_irq_resume, -}; - -static int __init sirfsoc_irq_pm_init(void) -{ - if (!sirfsoc_irqdomain) - return 0; - - register_syscore_ops(&sirfsoc_irq_syscore_ops); - return 0; -} -device_initcall(sirfsoc_irq_pm_init); -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] irqchip: remove sirfsoc driver 2021-01-20 13:30 ` Arnd Bergmann @ 2021-01-20 21:24 ` Barry Song -1 siblings, 0 replies; 12+ messages in thread From: Barry Song @ 2021-01-20 21:24 UTC (permalink / raw) To: Arnd Bergmann Cc: linux-arm-kernel, LKML, Marc Zyngier, Thomas Gleixner, Arnd Bergmann Arnd Bergmann <arnd@kernel.org> 于2021年1月21日周四 上午2:30写道: > > From: Arnd Bergmann <arnd@arndb.de> > > The CSR SiRF prima2/atlas platforms are getting removed, so this driver > is no longer needed. > > Cc: Barry Song <baohua@kernel.org> > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> > --- > drivers/irqchip/Makefile | 1 - > drivers/irqchip/irq-sirfsoc.c | 134 ---------------------------------- > 2 files changed, 135 deletions(-) > delete mode 100644 drivers/irqchip/irq-sirfsoc.c > > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile > index 084e11774071..37e3556df127 100644 > --- a/drivers/irqchip/Makefile > +++ b/drivers/irqchip/Makefile > @@ -45,7 +45,6 @@ obj-$(CONFIG_I8259) += irq-i8259.o > obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o > obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-cpu.o > obj-$(CONFIG_IXP4XX_IRQ) += irq-ixp4xx.o > -obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o > obj-$(CONFIG_JCORE_AIC) += irq-jcore-aic.o > obj-$(CONFIG_RDA_INTC) += irq-rda-intc.o > obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o > diff --git a/drivers/irqchip/irq-sirfsoc.c b/drivers/irqchip/irq-sirfsoc.c > deleted file mode 100644 > index c86faaa35ca4..000000000000 > --- a/drivers/irqchip/irq-sirfsoc.c > +++ /dev/null > @@ -1,134 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0-or-later > -/* > - * interrupt controller support for CSR SiRFprimaII > - * > - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. > - */ > - > -#include <linux/init.h> > -#include <linux/io.h> > -#include <linux/irq.h> > -#include <linux/of.h> > -#include <linux/of_address.h> > -#include <linux/irqchip.h> > -#include <linux/irqdomain.h> > -#include <linux/syscore_ops.h> > -#include <asm/mach/irq.h> > -#include <asm/exception.h> > - > -#define SIRFSOC_INT_RISC_MASK0 0x0018 > -#define SIRFSOC_INT_RISC_MASK1 0x001C > -#define SIRFSOC_INT_RISC_LEVEL0 0x0020 > -#define SIRFSOC_INT_RISC_LEVEL1 0x0024 > -#define SIRFSOC_INIT_IRQ_ID 0x0038 > -#define SIRFSOC_INT_BASE_OFFSET 0x0004 > - > -#define SIRFSOC_NUM_IRQS 64 > -#define SIRFSOC_NUM_BANKS (SIRFSOC_NUM_IRQS / 32) > - > -static struct irq_domain *sirfsoc_irqdomain; > - > -static void __iomem *sirfsoc_irq_get_regbase(void) > -{ > - return (void __iomem __force *)sirfsoc_irqdomain->host_data; > -} > - > -static __init void sirfsoc_alloc_gc(void __iomem *base) > -{ > - unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; > - unsigned int set = IRQ_LEVEL; > - struct irq_chip_generic *gc; > - struct irq_chip_type *ct; > - int i; > - > - irq_alloc_domain_generic_chips(sirfsoc_irqdomain, 32, 1, "irq_sirfsoc", > - handle_level_irq, clr, set, > - IRQ_GC_INIT_MASK_CACHE); > - > - for (i = 0; i < SIRFSOC_NUM_BANKS; i++) { > - gc = irq_get_domain_generic_chip(sirfsoc_irqdomain, i * 32); > - gc->reg_base = base + i * SIRFSOC_INT_BASE_OFFSET; > - ct = gc->chip_types; > - ct->chip.irq_mask = irq_gc_mask_clr_bit; > - ct->chip.irq_unmask = irq_gc_mask_set_bit; > - ct->regs.mask = SIRFSOC_INT_RISC_MASK0; > - } > -} > - > -static void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs) > -{ > - void __iomem *base = sirfsoc_irq_get_regbase(); > - u32 irqstat; > - > - irqstat = readl_relaxed(base + SIRFSOC_INIT_IRQ_ID); > - handle_domain_irq(sirfsoc_irqdomain, irqstat & 0xff, regs); > -} > - > -static int __init sirfsoc_irq_init(struct device_node *np, > - struct device_node *parent) > -{ > - void __iomem *base = of_iomap(np, 0); > - if (!base) > - panic("unable to map intc cpu registers\n"); > - > - sirfsoc_irqdomain = irq_domain_add_linear(np, SIRFSOC_NUM_IRQS, > - &irq_generic_chip_ops, base); > - sirfsoc_alloc_gc(base); > - > - writel_relaxed(0, base + SIRFSOC_INT_RISC_LEVEL0); > - writel_relaxed(0, base + SIRFSOC_INT_RISC_LEVEL1); > - > - writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK0); > - writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK1); > - > - set_handle_irq(sirfsoc_handle_irq); > - > - return 0; > -} > -IRQCHIP_DECLARE(sirfsoc_intc, "sirf,prima2-intc", sirfsoc_irq_init); > - > -struct sirfsoc_irq_status { > - u32 mask0; > - u32 mask1; > - u32 level0; > - u32 level1; > -}; > - > -static struct sirfsoc_irq_status sirfsoc_irq_st; > - > -static int sirfsoc_irq_suspend(void) > -{ > - void __iomem *base = sirfsoc_irq_get_regbase(); > - > - sirfsoc_irq_st.mask0 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK0); > - sirfsoc_irq_st.mask1 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK1); > - sirfsoc_irq_st.level0 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL0); > - sirfsoc_irq_st.level1 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL1); > - > - return 0; > -} > - > -static void sirfsoc_irq_resume(void) > -{ > - void __iomem *base = sirfsoc_irq_get_regbase(); > - > - writel_relaxed(sirfsoc_irq_st.mask0, base + SIRFSOC_INT_RISC_MASK0); > - writel_relaxed(sirfsoc_irq_st.mask1, base + SIRFSOC_INT_RISC_MASK1); > - writel_relaxed(sirfsoc_irq_st.level0, base + SIRFSOC_INT_RISC_LEVEL0); > - writel_relaxed(sirfsoc_irq_st.level1, base + SIRFSOC_INT_RISC_LEVEL1); > -} > - > -static struct syscore_ops sirfsoc_irq_syscore_ops = { > - .suspend = sirfsoc_irq_suspend, > - .resume = sirfsoc_irq_resume, > -}; > - > -static int __init sirfsoc_irq_pm_init(void) > -{ > - if (!sirfsoc_irqdomain) > - return 0; > - > - register_syscore_ops(&sirfsoc_irq_syscore_ops); > - return 0; > -} > -device_initcall(sirfsoc_irq_pm_init); > -- > 2.29.2 > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] irqchip: remove sirfsoc driver @ 2021-01-20 21:24 ` Barry Song 0 siblings, 0 replies; 12+ messages in thread From: Barry Song @ 2021-01-20 21:24 UTC (permalink / raw) To: Arnd Bergmann Cc: Marc Zyngier, Thomas Gleixner, Arnd Bergmann, LKML, linux-arm-kernel Arnd Bergmann <arnd@kernel.org> 于2021年1月21日周四 上午2:30写道: > > From: Arnd Bergmann <arnd@arndb.de> > > The CSR SiRF prima2/atlas platforms are getting removed, so this driver > is no longer needed. > > Cc: Barry Song <baohua@kernel.org> > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> > --- > drivers/irqchip/Makefile | 1 - > drivers/irqchip/irq-sirfsoc.c | 134 ---------------------------------- > 2 files changed, 135 deletions(-) > delete mode 100644 drivers/irqchip/irq-sirfsoc.c > > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile > index 084e11774071..37e3556df127 100644 > --- a/drivers/irqchip/Makefile > +++ b/drivers/irqchip/Makefile > @@ -45,7 +45,6 @@ obj-$(CONFIG_I8259) += irq-i8259.o > obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o > obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-cpu.o > obj-$(CONFIG_IXP4XX_IRQ) += irq-ixp4xx.o > -obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o > obj-$(CONFIG_JCORE_AIC) += irq-jcore-aic.o > obj-$(CONFIG_RDA_INTC) += irq-rda-intc.o > obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o > diff --git a/drivers/irqchip/irq-sirfsoc.c b/drivers/irqchip/irq-sirfsoc.c > deleted file mode 100644 > index c86faaa35ca4..000000000000 > --- a/drivers/irqchip/irq-sirfsoc.c > +++ /dev/null > @@ -1,134 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0-or-later > -/* > - * interrupt controller support for CSR SiRFprimaII > - * > - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. > - */ > - > -#include <linux/init.h> > -#include <linux/io.h> > -#include <linux/irq.h> > -#include <linux/of.h> > -#include <linux/of_address.h> > -#include <linux/irqchip.h> > -#include <linux/irqdomain.h> > -#include <linux/syscore_ops.h> > -#include <asm/mach/irq.h> > -#include <asm/exception.h> > - > -#define SIRFSOC_INT_RISC_MASK0 0x0018 > -#define SIRFSOC_INT_RISC_MASK1 0x001C > -#define SIRFSOC_INT_RISC_LEVEL0 0x0020 > -#define SIRFSOC_INT_RISC_LEVEL1 0x0024 > -#define SIRFSOC_INIT_IRQ_ID 0x0038 > -#define SIRFSOC_INT_BASE_OFFSET 0x0004 > - > -#define SIRFSOC_NUM_IRQS 64 > -#define SIRFSOC_NUM_BANKS (SIRFSOC_NUM_IRQS / 32) > - > -static struct irq_domain *sirfsoc_irqdomain; > - > -static void __iomem *sirfsoc_irq_get_regbase(void) > -{ > - return (void __iomem __force *)sirfsoc_irqdomain->host_data; > -} > - > -static __init void sirfsoc_alloc_gc(void __iomem *base) > -{ > - unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; > - unsigned int set = IRQ_LEVEL; > - struct irq_chip_generic *gc; > - struct irq_chip_type *ct; > - int i; > - > - irq_alloc_domain_generic_chips(sirfsoc_irqdomain, 32, 1, "irq_sirfsoc", > - handle_level_irq, clr, set, > - IRQ_GC_INIT_MASK_CACHE); > - > - for (i = 0; i < SIRFSOC_NUM_BANKS; i++) { > - gc = irq_get_domain_generic_chip(sirfsoc_irqdomain, i * 32); > - gc->reg_base = base + i * SIRFSOC_INT_BASE_OFFSET; > - ct = gc->chip_types; > - ct->chip.irq_mask = irq_gc_mask_clr_bit; > - ct->chip.irq_unmask = irq_gc_mask_set_bit; > - ct->regs.mask = SIRFSOC_INT_RISC_MASK0; > - } > -} > - > -static void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs) > -{ > - void __iomem *base = sirfsoc_irq_get_regbase(); > - u32 irqstat; > - > - irqstat = readl_relaxed(base + SIRFSOC_INIT_IRQ_ID); > - handle_domain_irq(sirfsoc_irqdomain, irqstat & 0xff, regs); > -} > - > -static int __init sirfsoc_irq_init(struct device_node *np, > - struct device_node *parent) > -{ > - void __iomem *base = of_iomap(np, 0); > - if (!base) > - panic("unable to map intc cpu registers\n"); > - > - sirfsoc_irqdomain = irq_domain_add_linear(np, SIRFSOC_NUM_IRQS, > - &irq_generic_chip_ops, base); > - sirfsoc_alloc_gc(base); > - > - writel_relaxed(0, base + SIRFSOC_INT_RISC_LEVEL0); > - writel_relaxed(0, base + SIRFSOC_INT_RISC_LEVEL1); > - > - writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK0); > - writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK1); > - > - set_handle_irq(sirfsoc_handle_irq); > - > - return 0; > -} > -IRQCHIP_DECLARE(sirfsoc_intc, "sirf,prima2-intc", sirfsoc_irq_init); > - > -struct sirfsoc_irq_status { > - u32 mask0; > - u32 mask1; > - u32 level0; > - u32 level1; > -}; > - > -static struct sirfsoc_irq_status sirfsoc_irq_st; > - > -static int sirfsoc_irq_suspend(void) > -{ > - void __iomem *base = sirfsoc_irq_get_regbase(); > - > - sirfsoc_irq_st.mask0 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK0); > - sirfsoc_irq_st.mask1 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK1); > - sirfsoc_irq_st.level0 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL0); > - sirfsoc_irq_st.level1 = readl_relaxed(base + SIRFSOC_INT_RISC_LEVEL1); > - > - return 0; > -} > - > -static void sirfsoc_irq_resume(void) > -{ > - void __iomem *base = sirfsoc_irq_get_regbase(); > - > - writel_relaxed(sirfsoc_irq_st.mask0, base + SIRFSOC_INT_RISC_MASK0); > - writel_relaxed(sirfsoc_irq_st.mask1, base + SIRFSOC_INT_RISC_MASK1); > - writel_relaxed(sirfsoc_irq_st.level0, base + SIRFSOC_INT_RISC_LEVEL0); > - writel_relaxed(sirfsoc_irq_st.level1, base + SIRFSOC_INT_RISC_LEVEL1); > -} > - > -static struct syscore_ops sirfsoc_irq_syscore_ops = { > - .suspend = sirfsoc_irq_suspend, > - .resume = sirfsoc_irq_resume, > -}; > - > -static int __init sirfsoc_irq_pm_init(void) > -{ > - if (!sirfsoc_irqdomain) > - return 0; > - > - register_syscore_ops(&sirfsoc_irq_syscore_ops); > - return 0; > -} > -device_initcall(sirfsoc_irq_pm_init); > -- > 2.29.2 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/2] irqchip: Remove obsolete drivers 2021-01-20 13:30 ` Arnd Bergmann @ 2021-01-21 20:34 ` Marc Zyngier -1 siblings, 0 replies; 12+ messages in thread From: Marc Zyngier @ 2021-01-21 20:34 UTC (permalink / raw) To: Arnd Bergmann, Thomas Gleixner, linux-kernel, linux-arm-kernel Cc: Arnd Bergmann On Wed, 20 Jan 2021 14:30:06 +0100, Arnd Bergmann wrote: > A few Arm platforms are getting removed in v5.12, this removes > the corresponding irqchip drivers. > > Link: https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/ > > > Arnd Bergmann (2): > irqchip: remove sigma tango driver > irqchip: remove sirfsoc driver > > [...] Applied to irq/irqchip-5.12, thanks! [1/2] irqchip: remove sigma tango driver commit: 00e772c4929257b11b51d47e4645f67826ded0fc [2/2] irqchip: remove sirfsoc driver commit: 5c1ea0d842b1e73ae04870527ec29d5479c35041 Cheers, M. -- Without deviation from the norm, progress is not possible. ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/2] irqchip: Remove obsolete drivers @ 2021-01-21 20:34 ` Marc Zyngier 0 siblings, 0 replies; 12+ messages in thread From: Marc Zyngier @ 2021-01-21 20:34 UTC (permalink / raw) To: Arnd Bergmann, Thomas Gleixner, linux-kernel, linux-arm-kernel Cc: Arnd Bergmann On Wed, 20 Jan 2021 14:30:06 +0100, Arnd Bergmann wrote: > A few Arm platforms are getting removed in v5.12, this removes > the corresponding irqchip drivers. > > Link: https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/ > > > Arnd Bergmann (2): > irqchip: remove sigma tango driver > irqchip: remove sirfsoc driver > > [...] Applied to irq/irqchip-5.12, thanks! [1/2] irqchip: remove sigma tango driver commit: 00e772c4929257b11b51d47e4645f67826ded0fc [2/2] irqchip: remove sirfsoc driver commit: 5c1ea0d842b1e73ae04870527ec29d5479c35041 Cheers, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-01-21 20:37 UTC | newest] Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-01-20 13:30 [PATCH 0/2] irqchip: Remove obsolete drivers Arnd Bergmann 2021-01-20 13:30 ` Arnd Bergmann 2021-01-20 13:30 ` [PATCH 1/2] irqchip: remove sigma tango driver Arnd Bergmann 2021-01-20 13:30 ` Arnd Bergmann 2021-01-21 13:52 ` Måns Rullgård 2021-01-21 13:52 ` Måns Rullgård 2021-01-20 13:30 ` [PATCH 2/2] irqchip: remove sirfsoc driver Arnd Bergmann 2021-01-20 13:30 ` Arnd Bergmann 2021-01-20 21:24 ` Barry Song 2021-01-20 21:24 ` Barry Song 2021-01-21 20:34 ` [PATCH 0/2] irqchip: Remove obsolete drivers Marc Zyngier 2021-01-21 20:34 ` Marc Zyngier
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.