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From: Catalin Marinas <catalin.marinas@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	David Brazdil <dbrazdil@google.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Jing Zhang <jingzhangos@google.com>,
	Ajay Patil <pajay@qti.qualcomm.com>,
	Prasad Sodagudi <psodagud@codeaurora.org>,
	Srinivas Ramana <sramana@codeaurora.org>,
	James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	kernel-team@android.com
Subject: Re: [PATCH v4 09/21] arm64: cpufeature: Add global feature override facility
Date: Fri, 22 Jan 2021 18:41:40 +0000	[thread overview]
Message-ID: <20210122184139.GG8567@gaia> (raw)
In-Reply-To: <20210118094533.2874082-10-maz@kernel.org>

On Mon, Jan 18, 2021 at 09:45:21AM +0000, Marc Zyngier wrote:
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index 9a555809b89c..465d2cb63bfc 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -75,6 +75,8 @@ struct arm64_ftr_reg {
>  	u64				sys_val;
>  	u64				user_val;
>  	const struct arm64_ftr_bits	*ftr_bits;
> +	u64				*override_val;
> +	u64				*override_mask;
>  };
>  
>  extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index e99eddec0a46..aaa075c6f029 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -544,13 +544,17 @@ static const struct arm64_ftr_bits ftr_raz[] = {
>  	ARM64_FTR_END,
>  };
>  
> -#define ARM64_FTR_REG(id, table) {		\
> -	.sys_id = id,				\
> -	.reg = 	&(struct arm64_ftr_reg){	\
> -		.name = #id,			\
> -		.ftr_bits = &((table)[0]),	\
> +#define ARM64_FTR_REG_OVERRIDE(id, table, v, m) {		\
> +		.sys_id = id,					\
> +		.reg = 	&(struct arm64_ftr_reg){		\
> +			.name = #id,				\
> +			.ftr_bits = &((table)[0]),		\
> +			.override_val = v,			\
> +			.override_mask = m,			\
>  	}}
>  
> +#define ARM64_FTR_REG(id, table) ARM64_FTR_REG_OVERRIDE(id, table, NULL, NULL)
> +
>  static const struct __ftr_reg_entry {
>  	u32			sys_id;
>  	struct arm64_ftr_reg 	*reg;
> @@ -760,6 +764,7 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new)
>  	u64 strict_mask = ~0x0ULL;
>  	u64 user_mask = 0;
>  	u64 valid_mask = 0;
> +	u64 override_val = 0, override_mask = 0;
>  
>  	const struct arm64_ftr_bits *ftrp;
>  	struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg);
> @@ -767,9 +772,38 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new)
>  	if (!reg)
>  		return;
>  
> +	if (reg->override_mask && reg->override_val) {
> +		override_mask = *reg->override_mask;
> +		override_val = *reg->override_val;
> +	}
> +
>  	for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) {
>  		u64 ftr_mask = arm64_ftr_mask(ftrp);
>  		s64 ftr_new = arm64_ftr_value(ftrp, new);
> +		s64 ftr_ovr = arm64_ftr_value(ftrp, override_val);
> +
> +		if ((ftr_mask & override_mask) == ftr_mask) {
> +			s64 tmp = arm64_ftr_safe_value(ftrp, ftr_ovr, ftr_new);
> +			char *str = NULL;
> +
> +			if (ftr_ovr != tmp) {
> +				/* Unsafe, remove the override */
> +				*reg->override_mask &= ~ftr_mask;
> +				*reg->override_val &= ~ftr_mask;

Do we need such clearing here? I don't think that's ever called again
for this feature/reg.

> +				tmp = ftr_ovr;
> +				str = "ignoring override";
> +			} else if (ftr_new != tmp) {
> +				/* Override was valid */
> +				ftr_new = tmp;
> +				str = "forced";
> +			}
> +
> +			if (str)
> +				pr_warn("%s[%d:%d]: %s to %llx\n",
> +					reg->name,
> +					ftrp->shift + ftrp->width - 1,
> +					ftrp->shift, str, tmp);
> +		}
>  
>  		val = arm64_ftr_set_value(ftrp, val, ftr_new);

I wonder whether we could call, after init_cpu_ftr_reg(), a new function
similar to update_cpu_ftr_reg() that takes a mask and value and leave
init_cpu_ftr_reg() unchanged. The only advantage would be if we can get
rid of the reg->override* fields. Anyway, I need to read the rest of the
series to see whether it's possible. Otherwise this patch looks fine.

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Prasad Sodagudi <psodagud@codeaurora.org>,
	Srinivas Ramana <sramana@codeaurora.org>,
	linux-kernel@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
	Ajay Patil <pajay@qti.qualcomm.com>,
	kernel-team@android.com, Will Deacon <will@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 09/21] arm64: cpufeature: Add global feature override facility
Date: Fri, 22 Jan 2021 18:41:40 +0000	[thread overview]
Message-ID: <20210122184139.GG8567@gaia> (raw)
In-Reply-To: <20210118094533.2874082-10-maz@kernel.org>

On Mon, Jan 18, 2021 at 09:45:21AM +0000, Marc Zyngier wrote:
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index 9a555809b89c..465d2cb63bfc 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -75,6 +75,8 @@ struct arm64_ftr_reg {
>  	u64				sys_val;
>  	u64				user_val;
>  	const struct arm64_ftr_bits	*ftr_bits;
> +	u64				*override_val;
> +	u64				*override_mask;
>  };
>  
>  extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index e99eddec0a46..aaa075c6f029 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -544,13 +544,17 @@ static const struct arm64_ftr_bits ftr_raz[] = {
>  	ARM64_FTR_END,
>  };
>  
> -#define ARM64_FTR_REG(id, table) {		\
> -	.sys_id = id,				\
> -	.reg = 	&(struct arm64_ftr_reg){	\
> -		.name = #id,			\
> -		.ftr_bits = &((table)[0]),	\
> +#define ARM64_FTR_REG_OVERRIDE(id, table, v, m) {		\
> +		.sys_id = id,					\
> +		.reg = 	&(struct arm64_ftr_reg){		\
> +			.name = #id,				\
> +			.ftr_bits = &((table)[0]),		\
> +			.override_val = v,			\
> +			.override_mask = m,			\
>  	}}
>  
> +#define ARM64_FTR_REG(id, table) ARM64_FTR_REG_OVERRIDE(id, table, NULL, NULL)
> +
>  static const struct __ftr_reg_entry {
>  	u32			sys_id;
>  	struct arm64_ftr_reg 	*reg;
> @@ -760,6 +764,7 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new)
>  	u64 strict_mask = ~0x0ULL;
>  	u64 user_mask = 0;
>  	u64 valid_mask = 0;
> +	u64 override_val = 0, override_mask = 0;
>  
>  	const struct arm64_ftr_bits *ftrp;
>  	struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg);
> @@ -767,9 +772,38 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new)
>  	if (!reg)
>  		return;
>  
> +	if (reg->override_mask && reg->override_val) {
> +		override_mask = *reg->override_mask;
> +		override_val = *reg->override_val;
> +	}
> +
>  	for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) {
>  		u64 ftr_mask = arm64_ftr_mask(ftrp);
>  		s64 ftr_new = arm64_ftr_value(ftrp, new);
> +		s64 ftr_ovr = arm64_ftr_value(ftrp, override_val);
> +
> +		if ((ftr_mask & override_mask) == ftr_mask) {
> +			s64 tmp = arm64_ftr_safe_value(ftrp, ftr_ovr, ftr_new);
> +			char *str = NULL;
> +
> +			if (ftr_ovr != tmp) {
> +				/* Unsafe, remove the override */
> +				*reg->override_mask &= ~ftr_mask;
> +				*reg->override_val &= ~ftr_mask;

Do we need such clearing here? I don't think that's ever called again
for this feature/reg.

> +				tmp = ftr_ovr;
> +				str = "ignoring override";
> +			} else if (ftr_new != tmp) {
> +				/* Override was valid */
> +				ftr_new = tmp;
> +				str = "forced";
> +			}
> +
> +			if (str)
> +				pr_warn("%s[%d:%d]: %s to %llx\n",
> +					reg->name,
> +					ftrp->shift + ftrp->width - 1,
> +					ftrp->shift, str, tmp);
> +		}
>  
>  		val = arm64_ftr_set_value(ftrp, val, ftr_new);

I wonder whether we could call, after init_cpu_ftr_reg(), a new function
similar to update_cpu_ftr_reg() that takes a mask and value and leave
init_cpu_ftr_reg() unchanged. The only advantage would be if we can get
rid of the reg->override* fields. Anyway, I need to read the rest of the
series to see whether it's possible. Otherwise this patch looks fine.

-- 
Catalin
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Jing Zhang <jingzhangos@google.com>,
	Prasad Sodagudi <psodagud@codeaurora.org>,
	Srinivas Ramana <sramana@codeaurora.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	linux-kernel@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
	James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Ajay Patil <pajay@qti.qualcomm.com>,
	kernel-team@android.com, David Brazdil <dbrazdil@google.com>,
	Will Deacon <will@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 09/21] arm64: cpufeature: Add global feature override facility
Date: Fri, 22 Jan 2021 18:41:40 +0000	[thread overview]
Message-ID: <20210122184139.GG8567@gaia> (raw)
In-Reply-To: <20210118094533.2874082-10-maz@kernel.org>

On Mon, Jan 18, 2021 at 09:45:21AM +0000, Marc Zyngier wrote:
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index 9a555809b89c..465d2cb63bfc 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -75,6 +75,8 @@ struct arm64_ftr_reg {
>  	u64				sys_val;
>  	u64				user_val;
>  	const struct arm64_ftr_bits	*ftr_bits;
> +	u64				*override_val;
> +	u64				*override_mask;
>  };
>  
>  extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index e99eddec0a46..aaa075c6f029 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -544,13 +544,17 @@ static const struct arm64_ftr_bits ftr_raz[] = {
>  	ARM64_FTR_END,
>  };
>  
> -#define ARM64_FTR_REG(id, table) {		\
> -	.sys_id = id,				\
> -	.reg = 	&(struct arm64_ftr_reg){	\
> -		.name = #id,			\
> -		.ftr_bits = &((table)[0]),	\
> +#define ARM64_FTR_REG_OVERRIDE(id, table, v, m) {		\
> +		.sys_id = id,					\
> +		.reg = 	&(struct arm64_ftr_reg){		\
> +			.name = #id,				\
> +			.ftr_bits = &((table)[0]),		\
> +			.override_val = v,			\
> +			.override_mask = m,			\
>  	}}
>  
> +#define ARM64_FTR_REG(id, table) ARM64_FTR_REG_OVERRIDE(id, table, NULL, NULL)
> +
>  static const struct __ftr_reg_entry {
>  	u32			sys_id;
>  	struct arm64_ftr_reg 	*reg;
> @@ -760,6 +764,7 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new)
>  	u64 strict_mask = ~0x0ULL;
>  	u64 user_mask = 0;
>  	u64 valid_mask = 0;
> +	u64 override_val = 0, override_mask = 0;
>  
>  	const struct arm64_ftr_bits *ftrp;
>  	struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg);
> @@ -767,9 +772,38 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new)
>  	if (!reg)
>  		return;
>  
> +	if (reg->override_mask && reg->override_val) {
> +		override_mask = *reg->override_mask;
> +		override_val = *reg->override_val;
> +	}
> +
>  	for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) {
>  		u64 ftr_mask = arm64_ftr_mask(ftrp);
>  		s64 ftr_new = arm64_ftr_value(ftrp, new);
> +		s64 ftr_ovr = arm64_ftr_value(ftrp, override_val);
> +
> +		if ((ftr_mask & override_mask) == ftr_mask) {
> +			s64 tmp = arm64_ftr_safe_value(ftrp, ftr_ovr, ftr_new);
> +			char *str = NULL;
> +
> +			if (ftr_ovr != tmp) {
> +				/* Unsafe, remove the override */
> +				*reg->override_mask &= ~ftr_mask;
> +				*reg->override_val &= ~ftr_mask;

Do we need such clearing here? I don't think that's ever called again
for this feature/reg.

> +				tmp = ftr_ovr;
> +				str = "ignoring override";
> +			} else if (ftr_new != tmp) {
> +				/* Override was valid */
> +				ftr_new = tmp;
> +				str = "forced";
> +			}
> +
> +			if (str)
> +				pr_warn("%s[%d:%d]: %s to %llx\n",
> +					reg->name,
> +					ftrp->shift + ftrp->width - 1,
> +					ftrp->shift, str, tmp);
> +		}
>  
>  		val = arm64_ftr_set_value(ftrp, val, ftr_new);

I wonder whether we could call, after init_cpu_ftr_reg(), a new function
similar to update_cpu_ftr_reg() that takes a mask and value and leave
init_cpu_ftr_reg() unchanged. The only advantage would be if we can get
rid of the reg->override* fields. Anyway, I need to read the rest of the
series to see whether it's possible. Otherwise this patch looks fine.

-- 
Catalin

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-01-22 19:35 UTC|newest]

Thread overview: 166+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-18  9:45 [PATCH v4 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-01-18  9:45 ` Marc Zyngier
2021-01-18  9:45 ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 01/21] arm64: Fix labels in el2_setup macros Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18 11:13   ` David Brazdil
2021-01-18 11:13     ` David Brazdil
2021-01-18 11:13     ` David Brazdil
2021-01-18  9:45 ` [PATCH v4 02/21] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-20 18:18   ` Catalin Marinas
2021-01-20 18:18     ` Catalin Marinas
2021-01-20 18:18     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 03/21] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-20 18:18   ` Catalin Marinas
2021-01-20 18:18     ` Catalin Marinas
2021-01-20 18:18     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18 11:25   ` David Brazdil
2021-01-18 11:25     ` David Brazdil
2021-01-18 11:25     ` David Brazdil
2021-01-24 18:44     ` Marc Zyngier
2021-01-24 18:44       ` Marc Zyngier
2021-01-24 18:44       ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 05/21] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 07/21] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 08/21] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-20 18:35   ` Catalin Marinas
2021-01-20 18:35     ` Catalin Marinas
2021-01-20 18:35     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 09/21] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-22 18:41   ` Catalin Marinas [this message]
2021-01-22 18:41     ` Catalin Marinas
2021-01-22 18:41     ` Catalin Marinas
2021-01-23 15:59   ` Suzuki K Poulose
2021-01-23 15:59     ` Suzuki K Poulose
2021-01-23 15:59     ` Suzuki K Poulose
2021-01-18  9:45 ` [PATCH v4 10/21] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-22 18:53   ` Catalin Marinas
2021-01-22 18:53     ` Catalin Marinas
2021-01-22 18:53     ` Catalin Marinas
2021-01-23 16:04     ` Suzuki K Poulose
2021-01-23 16:04       ` Suzuki K Poulose
2021-01-23 16:04       ` Suzuki K Poulose
2021-01-18  9:45 ` [PATCH v4 11/21] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-22 18:55   ` Catalin Marinas
2021-01-22 18:55     ` Catalin Marinas
2021-01-22 18:55     ` Catalin Marinas
2021-01-23 13:25   ` Catalin Marinas
2021-01-23 13:25     ` Catalin Marinas
2021-01-23 13:25     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 12/21] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18 13:07   ` David Brazdil
2021-01-18 13:07     ` David Brazdil
2021-01-18 13:07     ` David Brazdil
2021-01-23 13:23   ` Catalin Marinas
2021-01-23 13:23     ` Catalin Marinas
2021-01-23 13:23     ` Catalin Marinas
2021-01-23 13:43   ` Catalin Marinas
2021-01-23 13:43     ` Catalin Marinas
2021-01-23 13:43     ` Catalin Marinas
2021-01-24 16:21     ` Marc Zyngier
2021-01-24 16:21       ` Marc Zyngier
2021-01-24 16:21       ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-23 14:04   ` Catalin Marinas
2021-01-23 14:04     ` Catalin Marinas
2021-01-23 14:04     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 14/21] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18 13:14   ` David Brazdil
2021-01-18 13:14     ` David Brazdil
2021-01-18 13:14     ` David Brazdil
2021-01-23 14:07   ` Catalin Marinas
2021-01-23 14:07     ` Catalin Marinas
2021-01-23 14:07     ` Catalin Marinas
2021-01-24 15:59     ` Marc Zyngier
2021-01-24 15:59       ` Marc Zyngier
2021-01-24 15:59       ` Marc Zyngier
2021-01-18  9:45 ` [PATCH v4 15/21] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18 13:18   ` David Brazdil
2021-01-18 13:18     ` David Brazdil
2021-01-18 13:18     ` David Brazdil
2021-01-24 19:01     ` Marc Zyngier
2021-01-24 19:01       ` Marc Zyngier
2021-01-24 19:01       ` Marc Zyngier
2021-01-23 14:12   ` Catalin Marinas
2021-01-23 14:12     ` Catalin Marinas
2021-01-23 14:12     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 16/21] arm64: Make kvm-arm.mode={nvhe,protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-01-18  9:45   ` [PATCH v4 16/21] arm64: Make kvm-arm.mode={nvhe, protected} " Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-23 14:15   ` [PATCH v4 16/21] arm64: Make kvm-arm.mode={nvhe,protected} " Catalin Marinas
2021-01-23 14:15     ` Catalin Marinas
2021-01-23 14:15     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 17/21] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18 13:29   ` David Brazdil
2021-01-18 13:29     ` David Brazdil
2021-01-18 13:29     ` David Brazdil
2021-01-18  9:45 ` [PATCH v4 18/21] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18 14:46   ` David Brazdil
2021-01-18 14:46     ` David Brazdil
2021-01-18 14:46     ` David Brazdil
2021-01-24 18:41     ` Marc Zyngier
2021-01-24 18:41       ` Marc Zyngier
2021-01-24 18:41       ` Marc Zyngier
2021-01-23 14:19   ` Catalin Marinas
2021-01-23 14:19     ` Catalin Marinas
2021-01-23 14:19     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 19/21] arm64: cpufeatures: Allow disabling of BTI from the command-line Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-23 14:24   ` Catalin Marinas
2021-01-23 14:24     ` Catalin Marinas
2021-01-23 14:24     ` Catalin Marinas
2021-01-26 20:35     ` Srinivas Ramana
2021-01-26 20:35       ` Srinivas Ramana
2021-01-18  9:45 ` [PATCH v4 20/21] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-23 14:26   ` Catalin Marinas
2021-01-23 14:26     ` Catalin Marinas
2021-01-23 14:26     ` Catalin Marinas
2021-01-18  9:45 ` [PATCH v4 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-18  9:45   ` Marc Zyngier
2021-01-23 14:28   ` Catalin Marinas
2021-01-23 14:28     ` Catalin Marinas
2021-01-23 14:28     ` Catalin Marinas
2021-01-26 20:30     ` Srinivas Ramana
2021-01-26 20:30       ` Srinivas Ramana
2021-01-18 14:54 ` [PATCH v4 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth David Brazdil
2021-01-18 14:54   ` David Brazdil
2021-01-18 14:54   ` David Brazdil

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