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* [PATCH v3 0/5] Introduce DSA Ethernet switch class and Felix driver
@ 2021-01-22 19:16 Vladimir Oltean
  2021-01-22 19:16 ` [PATCH v3 1/5] net: Introduce DSA class for Ethernet switches Vladimir Oltean
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Vladimir Oltean @ 2021-01-22 19:16 UTC (permalink / raw)
  To: u-boot

From: Vladimir Oltean <vladimir.oltean@nxp.com>

DSA stands for Distributed Switch Architecture and it is a subsystem
introduced in the Linux kernel to support switches that:
- have an Ethernet link up to the CPU
- use some form of tagging to identify the source/destination port for
  Rx/Tx
- may be cascaded in tree-like structures.

DSA is described in depth here:
https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt

This patch set introduces a DSA class in U-Boot to support drivers of DSA
switches.  DSA drivers have to implement the following ops:
- enable/disable of switch ports,
- insert a tag in frames being transmitted, used by the switch to select
  the egress port,
- parse a tag in frames being received, used for Rx traffic.

DSA class code deals with presentation of switch ports as Ethernet
interfaces, deals with the master Ethernet device for I/O and helps with
parsing of the DT assuming the structure follows the DSA kernel binding.

Support for switch cascading is not included yet.

In the sandbox environment, the DSA sandbox driver, the switch ports and
master eth interface look like this:
=> dm tree
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
[...]
 eth           4  [ + ]   eth_sandbox           |-- dsa-test-eth
 dsa           0  [ + ]   dsa_sandbox           |-- dsa-test
 eth           5  [ + ]   dsa-port              |   |-- lan0
 eth           6  [ + ]   dsa-port              |   `-- lan1

=> setenv ethact lan1
=> ping 1.2.3.5
Using lan1 device
host 1.2.3.5 is alive
=>

This patch set also introduces a driver for the Ethernet switch integrated
into NXP LS1028A, called Felix.  The switch has 4 front panel ports, I/O
to/from it is done though an ENETC Ethernet interface and meta-data is
carried between the switch and the driver though an additional header
pre-pended to the original frame.
Network commands like tftp can be used on these front panel ports.  The
ports are disabled unless used so they do not cause issues on network
topologies that include loops.

Felix as seen on LS1028A RDB:
=> dm tree
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
[...]
 dsa           0  [ + ]   felix-switch          |   |-- felix-switch
 eth           4  [ + ]   dsa-port              |   |   |-- swp0
 eth           5  [ + ]   dsa-port              |   |   |-- swp1
 eth           6  [ + ]   dsa-port              |   |   |-- swp2
 eth           7  [ + ]   dsa-port              |   |   `-- swp3

=> mdio list
[...]
10 - Vitesse VSC8514 <--> swp0
11 - Vitesse VSC8514 <--> swp1
12 - Vitesse VSC8514 <--> swp2
13 - Vitesse VSC8514 <--> swp3

NOTE:
This patchset is a major rework of the dsa-class code since the last
submission from May 5th:
https://patchwork.ozlabs.org/project/uboot/cover/1588700588-8587-1-git-send-email-claudiu.manoil at nxp.com/
The basic concepts and data path operation (tagging) in the DSA class
code remain the same as in the initial patchset from Alex, however the
external API has been changed significantly (simplified), the driver
model integration has been improved to the point that the DSA class
code no longer needs to allocate extra memory internally (via malloc),
reduced memory footprint, internal state data moved from the external
API and internalized, cleaner external API, internal code reworked,
completely reworked DSA sandbox driver and unit tests for better coverage
and to integrate better with the eth sandbox driver and tests, etc.

v3:
- Removed all infrastructure associated with dsa_foreach_port, which
  is no longer needed.
- Only inherit the DSA master's MAC address if the environment does not
  already have a specific MAC address that should be used for the DSA
  port.
- Be compatible with the new "ethernet-ports" container name which has
  been introduced in the Linux kernel as commit 85e05d263ed2 ("net: dsa:
  of: Allow ethernet-ports as encapsulating node") in v5.9.
- Fixed the felix driver not getting its ports initialized, due to
  dsa_foreach_port() being actually unusable when called from the probe
  function of the DSA udevice - the eth port udevices are _not_ yet
  probed at that point. We are now initializing all ports from the
  .port_enable() callback of each eth udevice.
- Deleted the unit tests associated with the infrastructure for
  dsa_foreach_port, since that function no longer exists.
- Enabled the config options for the Kontron LS1028A board too.

v2: Switch node structure defined in dtsi now consistent with the Linux
switch node definition. Moved aliases from dtsi to the RDB dts to
minimize impact on other boards (and for improved flexibility).

Alex Marginean (3):
  drivers: net: Add Felix DSA switch driver
  arm: dts: ls1028a: Add Ethernet switch node and dependencies
  configs: ls1028a: Enable the Ethernet switch driver in defconfig

Claudiu Manoil (2):
  net: Introduce DSA class for Ethernet switches
  sandbox: Add a DSA sandbox driver and unit test

 arch/Kconfig                                 |   1 +
 arch/arm/dts/fsl-ls1028a-rdb.dts             |  64 +++
 arch/arm/dts/fsl-ls1028a.dtsi                |  56 ++-
 arch/sandbox/dts/test.dts                    |  48 ++
 configs/kontron_sl28_defconfig               |   2 +
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig |   2 +
 configs/ls1028aqds_tfa_defconfig             |   2 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig |   2 +
 configs/ls1028ardb_tfa_defconfig             |   2 +
 drivers/net/Kconfig                          |  23 +
 drivers/net/Makefile                         |   1 +
 drivers/net/dsa_sandbox.c                    | 179 +++++++
 drivers/net/fsl_enetc.h                      |   5 +
 drivers/net/mscc_eswitch/Kconfig             |   8 +
 drivers/net/mscc_eswitch/Makefile            |   1 +
 drivers/net/mscc_eswitch/felix_switch.c      | 414 ++++++++++++++++
 include/configs/sandbox.h                    |   2 +
 include/dm/uclass-id.h                       |   1 +
 include/net.h                                |   6 +
 include/net/dsa.h                            | 163 +++++++
 net/Makefile                                 |   1 +
 net/dsa-uclass.c                             | 470 +++++++++++++++++++
 test/dm/Makefile                             |   1 +
 test/dm/dsa.c                                |  82 ++++
 test/dm/eth.c                                |  10 +-
 25 files changed, 1540 insertions(+), 6 deletions(-)
 create mode 100644 drivers/net/dsa_sandbox.c
 create mode 100644 drivers/net/mscc_eswitch/felix_switch.c
 create mode 100644 include/net/dsa.h
 create mode 100644 net/dsa-uclass.c
 create mode 100644 test/dm/dsa.c

-- 
2.25.1

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 1/5] net: Introduce DSA class for Ethernet switches
  2021-01-22 19:16 [PATCH v3 0/5] Introduce DSA Ethernet switch class and Felix driver Vladimir Oltean
@ 2021-01-22 19:16 ` Vladimir Oltean
  2021-01-22 21:30   ` Michael Walle
  2021-01-22 19:16 ` [PATCH v3 2/5] sandbox: Add a DSA sandbox driver and unit test Vladimir Oltean
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 10+ messages in thread
From: Vladimir Oltean @ 2021-01-22 19:16 UTC (permalink / raw)
  To: u-boot

From: Claudiu Manoil <claudiu.manoil@nxp.com>

DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
v3:
- Removed all infrastructure associated with dsa_foreach_port, which
  is no longer needed.
- Only inherit the DSA master's MAC address if the environment does not
  already have a specific MAC address that should be used for the DSA
  port.
- Be compatible with the new "ethernet-ports" container name which has
  been introduced in the Linux kernel as commit 85e05d263ed2 ("net: dsa:
  of: Allow ethernet-ports as encapsulating node") in v5.9.

v2: none

 drivers/net/Kconfig    |  14 ++
 include/dm/uclass-id.h |   1 +
 include/net.h          |   6 +
 include/net/dsa.h      | 163 ++++++++++++++
 net/Makefile           |   1 +
 net/dsa-uclass.c       | 470 +++++++++++++++++++++++++++++++++++++++++
 6 files changed, 655 insertions(+)
 create mode 100644 include/net/dsa.h
 create mode 100644 net/dsa-uclass.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 3a5e03688059..382224d04c6e 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -37,6 +37,20 @@ config DM_MDIO_MUX
 	  This is currently implemented in net/mdio-mux-uclass.c
 	  Look in include/miiphy.h for details.
 
+config DM_DSA
+	bool "Enable Driver Model for DSA switches"
+	depends on DM_ETH && DM_MDIO
+	help
+	  Enable driver model for DSA switches
+
+	  Adds UCLASS_DSA class supporting switches that follow the Distributed
+	  Switch Architecture (DSA).  These switches rely on the presence of a
+	  management switch port connected to an Ethernet controller capable of
+	  receiving frames from the switch.  This host Ethernet controller is
+	  called the "master" Ethernet interface in DSA terminology.
+	  This is currently implemented in net/dsa-uclass.c, refer to
+	  include/net/dsa.h for API details.
+
 config MDIO_SANDBOX
 	depends on DM_MDIO && SANDBOX
 	default y
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index ae4425d7a57a..d75de368c5a8 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -46,6 +46,7 @@ enum uclass_id {
 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
 	UCLASS_DSI_HOST,	/* Display Serial Interface host */
 	UCLASS_DMA,		/* Direct Memory Access */
+	UCLASS_DSA,		/* Distributed (Ethernet) Switch Architecture */
 	UCLASS_EFI,		/* EFI managed devices */
 	UCLASS_ETH,		/* Ethernet device */
 	UCLASS_ETH_PHY,		/* Ethernet PHY device */
diff --git a/include/net.h b/include/net.h
index 13da69b7c145..b95d6a6f60eb 100644
--- a/include/net.h
+++ b/include/net.h
@@ -499,7 +499,13 @@ struct icmp_hdr {
  * maximum packet size and multiple of 32 bytes =  1536
  */
 #define PKTSIZE			1522
+#ifndef CONFIG_DM_DSA
 #define PKTSIZE_ALIGN		1536
+#else
+/* Maximum DSA tagging overhead (headroom and/or tailroom) */
+#define DSA_MAX_OVR		256
+#define PKTSIZE_ALIGN		(1536 + DSA_MAX_OVR)
+#endif
 
 /*
  * Maximum receive ring size; that is, the number of packets
diff --git a/include/net/dsa.h b/include/net/dsa.h
new file mode 100644
index 000000000000..18bc7ffbe470
--- /dev/null
+++ b/include/net/dsa.h
@@ -0,0 +1,163 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019-2021 NXP Semiconductors
+ */
+
+#ifndef __DSA_H__
+#define __DSA_H__
+
+#include <phy.h>
+#include <net.h>
+
+/**
+ * DSA stands for Distributed Switch Architecture and it is infrastructure
+ * intended to support drivers for Switches that rely on an intermediary
+ * Ethernet device for I/O.  These switches may support cascading allowing
+ * them to be arranged as a tree.
+ * DSA is documented in detail in the Linux kernel documentation under
+ * Documentation/networking/dsa/dsa.txt
+ * The network layout of such a switch is shown below:
+ *
+ *                      |------|
+ *                      | eth0 | <--- master eth device (regular eth driver)
+ *                      |------|
+ *                        ^  |
+ * tag added by switch -->|  |
+ *                        |  |
+ *                        |  |<-- tag added by DSA driver
+ *                        |  v
+ *      |--------------------------------------|
+ *      |             | CPU port |             | <-- DSA (switch) device
+ *      |             ------------             |     (DSA driver)
+ *      | _________  _________       _________ |
+ *      | | port0 |  | port1 |  ...  | portn | | <-- ports as eth devices
+ *      |-+-------+--+-------+-------+-------+-|     ('dsa-port' eth driver)
+ *
+ * In U-Boot the intent is to allow access to front panel ports (shown at the
+ * bottom of the picture) through the master Ethernet dev (eth0 in the picture).
+ * Front panel ports are presented as regular Ethernet devices in U-Boot and
+ * they are expected to support the typical networking commands.
+ * In general DSA switches require the use of tags, extra headers added both by
+ * software on Tx and by the switch on Rx.  These tags carry@a minimum port
+ * information and switch information for cascaded set-ups.
+ * In U-Boot these tags are inserted and parsed by the DSA switch driver, the
+ * class code helps with headroom/tailroom for the extra headers.
+ *
+ * TODO:
+ * - handle switch cascading, for now U-Boot only supports stand-alone switches.
+ * - Add support to probe DSA switches connected to a MDIO bus, this is needed
+ * to convert switch drivers that are now under drivers/net/phy.
+ */
+
+#define DSA_PORT_NAME_LENGTH	16
+
+/* Maximum number of ports each DSA device can have */
+#define DSA_MAX_PORTS		12
+
+/**
+ * struct dsa_ops - DSA operations
+ *
+ * @port_enable:  Initialize a switch port for I/O.
+ * @port_disable: Disable I/O for a port.
+ * @xmit:         Insert the DSA tag for transmission.
+ *                DSA drivers receive a copy of the packet with headroom and
+ *                tailroom reserved and set to 0. 'packet' points to headroom
+ *                and 'length' is updated to include both head and tailroom.
+ * @rcv:          Process the DSA tag on reception and return the port index
+ *                from the h/w provided tag. Return the index via 'portp'.
+ *                'packet' and 'length' describe the frame as received from
+ *                master including any additional headers.
+ */
+struct dsa_ops {
+	int (*port_enable)(struct udevice *dev, int port,
+			   struct phy_device *phy);
+	void (*port_disable)(struct udevice *dev, int port,
+			     struct phy_device *phy);
+	int (*xmit)(struct udevice *dev, int port, void *packet, int length);
+	int (*rcv)(struct udevice *dev, int *portp, void *packet, int length);
+};
+
+#define dsa_get_ops(dev) ((struct dsa_ops *)(dev)->driver->ops)
+
+/**
+ * struct dsa_port_pdata - DSA port platform data
+ *
+ * @phy:   PHY device associated with this port.
+ *         The uclass code attempts to set this field for all ports except CPU
+ *         port, based on DT information.  It may be NULL.
+ * @index: Port index in the DSA switch, set by the uclass code.
+ * @name:  Name of the port Eth device.  If a label property is present in the
+ *         port DT node, it is used as name.
+ */
+struct dsa_port_pdata {
+	struct phy_device *phy;
+	u32 index;
+	char name[DSA_PORT_NAME_LENGTH];
+};
+
+/**
+ * struct dsa_pdata - Per-device platform data for DSA DM
+ *
+ * @num_ports:   Number of ports the device has, must be <= DSA_MAX_PORTS.
+ *		 This number is extracted from the DT 'ports' node of this
+ *		 DSA device, and it counts the CPU port and all the other
+ *		 port subnodes including the disabled ones.
+ * @cpu_port:    Index of the switch port linked to the master Ethernet.
+ *		 The uclass code sets this based on DT information.
+ * @master_node: DT node of the master Ethernet.
+ */
+struct dsa_pdata {
+	int num_ports;
+	u32 cpu_port;
+	ofnode master_node;
+};
+
+/**
+ * dsa_set_tagging() - Configure the headroom and/or tailroom sizes
+ *
+ * The DSA class code allocates headroom and tailroom on Tx before
+ * calling the DSA driver's xmit function.
+ * All drivers must call this at probe time.
+ *
+ * @dev:	DSA device pointer
+ * @headroom:	Size, in bytes, of headroom needed for the DSA tag.
+ * @tailroom:	Size, in bytes, of tailroom needed for the DSA tag.
+ *		Total headroom and tailroom size should not exceed
+ *		DSA_MAX_OVR.
+ * @return 0 if OK, -ve on error
+ */
+int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom);
+
+/* DSA helpers */
+
+/**
+ * dsa_get_master() - Return a reference to the master Ethernet device
+ *
+ * Can be called at driver probe time or later.
+ *
+ * @dev:	DSA device pointer
+ * @return Master Eth 'udevice' pointer if OK, NULL on error
+ */
+struct udevice *dsa_get_master(struct udevice *dev);
+
+/**
+ * dsa_port_get_pdata() - Helper that returns the platdata of an active
+ *			(non-CPU) DSA port device.
+ *
+ * Can be called@driver probe time or later.
+ *
+ * @pdev:	DSA port device pointer
+ * @return 'dsa_port_pdata' pointer if OK, NULL on error
+ */
+static inline struct dsa_port_pdata *
+	dsa_port_get_pdata(struct udevice *pdev)
+{
+	struct eth_pdata *eth = dev_get_plat(pdev);
+
+	if (!eth)
+		return NULL;
+
+	return eth->priv_pdata;
+}
+
+#endif /* __DSA_H__ */
diff --git a/net/Makefile b/net/Makefile
index 76527f704c47..fb3eba840fff 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_NET)      += arp.o
 obj-$(CONFIG_CMD_BOOTP) += bootp.o
 obj-$(CONFIG_CMD_CDP)  += cdp.o
 obj-$(CONFIG_CMD_DNS)  += dns.o
+obj-$(CONFIG_DM_DSA)   += dsa-uclass.o
 ifdef CONFIG_DM_ETH
 obj-$(CONFIG_NET)      += eth-uclass.o
 else
diff --git a/net/dsa-uclass.c b/net/dsa-uclass.c
new file mode 100644
index 000000000000..f60e06b00f57
--- /dev/null
+++ b/net/dsa-uclass.c
@@ -0,0 +1,470 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 NXP
+ */
+
+#include <net/dsa.h>
+#include <dm/lists.h>
+#include <dm/device_compat.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+#include <linux/bitmap.h>
+#include <miiphy.h>
+
+#define DSA_PORT_CHILD_DRV_NAME "dsa-port"
+
+/* per-device internal state structure */
+struct dsa_priv {
+	struct udevice *master_dev;
+	int num_ports;
+	u32 cpu_port;
+	int headroom;
+	int tailroom;
+};
+
+/* external API */
+int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom)
+{
+	struct dsa_priv *priv;
+
+	if (!dev || !dev_get_uclass_priv(dev))
+		return -ENODEV;
+
+	if (headroom + tailroom > DSA_MAX_OVR)
+		return -EINVAL;
+
+	priv = dev_get_uclass_priv(dev);
+
+	if (headroom > 0)
+		priv->headroom = headroom;
+	if (tailroom > 0)
+		priv->tailroom = tailroom;
+
+	return 0;
+}
+
+/* returns the DSA master Ethernet device */
+struct udevice *dsa_get_master(struct udevice *dev)
+{
+	struct dsa_priv *priv = dev_get_uclass_priv(dev);
+
+	if (!priv)
+		return NULL;
+
+	return priv->master_dev;
+}
+
+/*
+ * Start the desired port, the CPU port and the master Eth interface.
+ * TODO: if cascaded we may need to _start ports in other switches too
+ */
+static int dsa_port_start(struct udevice *pdev)
+{
+	struct udevice *dev = dev_get_parent(pdev);
+	struct dsa_priv *priv = dev_get_uclass_priv(dev);
+	struct udevice *master = dsa_get_master(dev);
+	struct dsa_ops *ops = dsa_get_ops(dev);
+	int err;
+
+	if (!priv)
+		return -ENODEV;
+
+	if (!master) {
+		dev_err(pdev, "DSA master Ethernet device not found!\n");
+		return -EINVAL;
+	}
+
+	if (ops->port_enable) {
+		struct dsa_port_pdata *port_pdata;
+
+		port_pdata = dev_get_parent_plat(pdev);
+		err = ops->port_enable(dev, port_pdata->index,
+				       port_pdata->phy);
+		if (err)
+			return err;
+
+		err = ops->port_enable(dev, priv->cpu_port, NULL);
+		if (err)
+			return err;
+	}
+
+	return eth_get_ops(master)->start(master);
+}
+
+/* Stop the desired port, the CPU port and the master Eth interface */
+static void dsa_port_stop(struct udevice *pdev)
+{
+	struct udevice *dev = dev_get_parent(pdev);
+	struct dsa_priv *priv = dev_get_uclass_priv(dev);
+	struct udevice *master = dsa_get_master(dev);
+	struct dsa_ops *ops = dsa_get_ops(dev);
+
+	if (!priv)
+		return;
+
+	if (ops->port_disable) {
+		struct dsa_port_pdata *port_pdata;
+
+		port_pdata = dev_get_parent_plat(pdev);
+		ops->port_disable(dev, port_pdata->index, port_pdata->phy);
+		ops->port_disable(dev, priv->cpu_port, NULL);
+	}
+
+	/*
+	 * stop master only if it's active, don't probe it otherwise.
+	 * Under normal usage it would be active because we're using it, but
+	 * during tear-down it may have been removed ahead of us.
+	 */
+	if (master && device_active(master))
+		eth_get_ops(master)->stop(master);
+}
+
+/*
+ * Insert a DSA tag and call master Ethernet send on the resulting packet
+ * We copy the frame to a stack buffer where we have reserved headroom and
+ * tailroom space.  Headroom and tailroom are set to 0.
+ */
+static int dsa_port_send(struct udevice *pdev, void *packet, int length)
+{
+	struct udevice *dev = dev_get_parent(pdev);
+	struct dsa_priv *priv = dev_get_uclass_priv(dev);
+	int head = priv->headroom, tail = priv->tailroom;
+	struct udevice *master = dsa_get_master(dev);
+	struct dsa_ops *ops = dsa_get_ops(dev);
+	uchar dsa_packet_tmp[PKTSIZE_ALIGN];
+	struct dsa_port_pdata *port_pdata;
+	int err;
+
+	if (!master)
+		return -EINVAL;
+
+	if (length + head + tail > PKTSIZE_ALIGN)
+		return -EINVAL;
+
+	memset(dsa_packet_tmp, 0, head);
+	memset(dsa_packet_tmp + head + length, 0, tail);
+	memcpy(dsa_packet_tmp + head, packet, length);
+	length += head + tail;
+	/* copy back to preserve original buffer alignment */
+	memcpy(packet, dsa_packet_tmp, length);
+
+	port_pdata = dev_get_parent_plat(pdev);
+	err = ops->xmit(dev, port_pdata->index, packet, length);
+	if (err)
+		return err;
+
+	return eth_get_ops(master)->send(master, packet, length);
+}
+
+/* Receive a frame from master Ethernet, process it and pass it on */
+static int dsa_port_recv(struct udevice *pdev, int flags, uchar **packetp)
+{
+	struct udevice *dev = dev_get_parent(pdev);
+	struct dsa_priv *priv = dev_get_uclass_priv(dev);
+	int head = priv->headroom, tail = priv->tailroom;
+	struct udevice *master = dsa_get_master(dev);
+	struct dsa_ops *ops = dsa_get_ops(dev);
+	struct dsa_port_pdata *port_pdata;
+	int length, port_index, err;
+
+	if (!master)
+		return -EINVAL;
+
+	length = eth_get_ops(master)->recv(master, flags, packetp);
+	if (length <= 0)
+		return length;
+
+	/*
+	 * If we receive frames from a different port or frames that DSA driver
+	 * doesn't like we discard them here.
+	 * In case of discard we return with no frame and expect to be called
+	 * again instead of looping here, so upper layer can deal with timeouts.
+	 */
+	port_pdata = dev_get_parent_plat(pdev);
+	err = ops->rcv(dev, &port_index, *packetp, length);
+	if (err || port_index != port_pdata->index || (length <= head + tail)) {
+		if (eth_get_ops(master)->free_pkt)
+			eth_get_ops(master)->free_pkt(master, *packetp, length);
+		return -EAGAIN;
+	}
+
+	/*
+	 * We move the pointer over headroom here to avoid a copy.  If free_pkt
+	 * gets called we move the pointer back before calling master free_pkt.
+	 */
+	*packetp += head;
+
+	return length - head - tail;
+}
+
+static int dsa_port_free_pkt(struct udevice *pdev, uchar *packet, int length)
+{
+	struct udevice *dev = dev_get_parent(pdev);
+	struct udevice *master = dsa_get_master(dev);
+	struct dsa_priv *priv;
+
+	if (!master)
+		return -EINVAL;
+
+	priv = dev_get_uclass_priv(dev);
+	if (eth_get_ops(master)->free_pkt) {
+		/* return the original pointer and length to master Eth */
+		packet -= priv->headroom;
+		length += priv->headroom - priv->tailroom;
+
+		return eth_get_ops(master)->free_pkt(master, packet, length);
+	}
+
+	return 0;
+}
+
+static int dsa_port_of_to_pdata(struct udevice *pdev)
+{
+	struct dsa_port_pdata *port_pdata;
+	struct dsa_pdata *dsa_pdata;
+	struct eth_pdata *eth_pdata;
+	struct udevice *dev;
+	const char *label;
+	u32 index;
+	int err;
+
+	if (!pdev)
+		return -ENODEV;
+
+	err = ofnode_read_u32(dev_ofnode(pdev), "reg", &index);
+	if (err)
+		return err;
+
+	dev = dev_get_parent(pdev);
+	dsa_pdata = dev_get_uclass_plat(dev);
+
+	port_pdata = dev_get_parent_plat(pdev);
+	port_pdata->index = index;
+
+	label = ofnode_read_string(dev_ofnode(pdev), "label");
+	if (label)
+		strncpy(port_pdata->name, label, DSA_PORT_NAME_LENGTH);
+
+	eth_pdata = dev_get_plat(pdev);
+	eth_pdata->priv_pdata = port_pdata;
+
+	dev_dbg(pdev, "port %d node %s\n", port_pdata->index,
+		ofnode_get_name(dev_ofnode(pdev)));
+
+	return 0;
+}
+
+static const struct eth_ops dsa_port_ops = {
+	.start		= dsa_port_start,
+	.send		= dsa_port_send,
+	.recv		= dsa_port_recv,
+	.stop		= dsa_port_stop,
+	.free_pkt	= dsa_port_free_pkt,
+};
+
+static int dsa_port_probe(struct udevice *pdev)
+{
+	struct udevice *dev = dev_get_parent(pdev);
+	struct eth_pdata *eth_pdata, *master_pdata;
+	unsigned char env_enetaddr[ARP_HLEN];
+	struct dsa_port_pdata *port_pdata;
+	struct dsa_priv *dsa_priv;
+	struct udevice *master;
+
+	port_pdata = dev_get_parent_plat(pdev);
+	dsa_priv = dev_get_uclass_priv(dev);
+
+	port_pdata->phy = dm_eth_phy_connect(pdev);
+
+	/*
+	 * Inherit port's hwaddr from the DSA master, unless the port already
+	 * has a unique MAC address specified in the environment.
+	 */
+	eth_env_get_enetaddr_by_index("eth", dev_seq(pdev), env_enetaddr);
+	if (!is_zero_ethaddr(env_enetaddr))
+		return 0;
+
+	master = dsa_get_master(dev);
+	if (!master)
+		return 0;
+
+	master_pdata = dev_get_plat(master);
+	eth_pdata = dev_get_plat(pdev);
+	memcpy(eth_pdata->enetaddr, master_pdata->enetaddr, ARP_HLEN);
+	eth_env_set_enetaddr_by_index("eth", dev_seq(pdev),
+				      master_pdata->enetaddr);
+
+	return 0;
+}
+
+static int dsa_port_remove(struct udevice *pdev)
+{
+	struct udevice *dev = dev_get_parent(pdev);
+	struct dsa_port_pdata *port_pdata;
+	struct dsa_priv *dsa_priv;
+
+	port_pdata = dev_get_parent_plat(pdev);
+	dsa_priv = dev_get_uclass_priv(dev);
+
+	port_pdata->phy = NULL;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(dsa_port) = {
+	.name	= DSA_PORT_CHILD_DRV_NAME,
+	.id	= UCLASS_ETH,
+	.ops	= &dsa_port_ops,
+	.probe	= dsa_port_probe,
+	.remove	= dsa_port_remove,
+	.of_to_plat = dsa_port_of_to_pdata,
+	.plat_auto = sizeof(struct eth_pdata),
+};
+
+/*
+ * This function mostly deals with pulling information out of the device tree
+ * into the pdata structure.
+ * It goes through the list of switch ports, registers an eth device for each
+ * front panel port and identifies the cpu port connected to master eth device.
+ * TODO: support cascaded switches
+ */
+static int dsa_post_bind(struct udevice *dev)
+{
+	struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
+	ofnode node = dev_ofnode(dev), pnode;
+	int i, err, first_err = 0;
+
+	if (!pdata || !ofnode_valid(node))
+		return -ENODEV;
+
+	pdata->master_node = ofnode_null();
+
+	node = ofnode_find_subnode(node, "ports");
+	if (!ofnode_valid(node))
+		node = ofnode_find_subnode(node, "ethernet-ports");
+	if (!ofnode_valid(node)) {
+		dev_err(dev, "ports node is missing under DSA device!\n");
+		return -EINVAL;
+	}
+
+	pdata->num_ports = ofnode_get_child_count(node);
+	if (pdata->num_ports <= 0 || pdata->num_ports > DSA_MAX_PORTS) {
+		dev_err(dev, "invalid number of ports (%d)\n",
+			pdata->num_ports);
+		return -EINVAL;
+	}
+
+	/* look for the CPU port */
+	ofnode_for_each_subnode(pnode, node) {
+		u32 ethernet;
+
+		if (ofnode_read_u32(pnode, "ethernet", &ethernet))
+			continue;
+
+		pdata->master_node = ofnode_get_by_phandle(ethernet);
+		break;
+	}
+
+	if (!ofnode_valid(pdata->master_node)) {
+		dev_err(dev, "master eth node missing!\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32(pnode, "reg", &pdata->cpu_port)) {
+		dev_err(dev, "CPU port node not valid!\n");
+		return -EINVAL;
+	}
+
+	dev_dbg(dev, "master node %s on port %d\n",
+		ofnode_get_name(pdata->master_node), pdata->cpu_port);
+
+	for (i = 0; i < pdata->num_ports; i++) {
+		char name[DSA_PORT_NAME_LENGTH];
+		struct udevice *pdev;
+
+		/*
+		 * If this is the CPU port don't register it as an ETH device,
+		 * we skip it on purpose since I/O to/from it from the CPU
+		 * isn't useful
+		 * TODO: cpu port may have a PHY and we don't handle that yet.
+		 */
+		if (i == pdata->cpu_port)
+			continue;
+
+		/*
+		 * Set up default port names.  If present, DT port labels
+		 * will override the default port names.
+		 */
+		snprintf(name, DSA_PORT_NAME_LENGTH, "%s@%d", dev->name, i);
+
+		ofnode_for_each_subnode(pnode, node) {
+			u32 reg;
+
+			if (ofnode_read_u32(pnode, "reg", &reg))
+				continue;
+
+			if (reg == i)
+				break;
+		}
+
+		/*
+		 * skip registration if port id not found or if the port
+		 * is explicitly disabled in DT
+		 */
+		if (!ofnode_valid(pnode) || !ofnode_is_available(pnode))
+			continue;
+
+		err = device_bind_driver_to_node(dev, DSA_PORT_CHILD_DRV_NAME,
+						 name, pnode, &pdev);
+		if (pdev) {
+			struct dsa_port_pdata *port_pdata;
+
+			port_pdata = dev_get_parent_plat(pdev);
+			strncpy(port_pdata->name, name, DSA_PORT_NAME_LENGTH);
+			pdev->name = port_pdata->name;
+		}
+
+		/* try to bind all ports but keep 1st error */
+		if (err && !first_err)
+			first_err = err;
+	}
+
+	if (first_err)
+		return first_err;
+
+	dev_dbg(dev, "DSA ports successfully bound\n");
+
+	return 0;
+}
+
+/**
+ * Initialize the uclass per device internal state structure (priv).
+ * TODO: pick up references to other switch devices here, if we're cascaded.
+ */
+static int dsa_pre_probe(struct udevice *dev)
+{
+	struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
+	struct dsa_priv *priv = dev_get_uclass_priv(dev);
+
+	if (!pdata || !priv)
+		return -ENODEV;
+
+	priv->num_ports = pdata->num_ports;
+	priv->cpu_port = pdata->cpu_port;
+
+	if (ofnode_valid(pdata->master_node))
+		uclass_find_device_by_ofnode(UCLASS_ETH, pdata->master_node,
+					     &priv->master_dev);
+	return 0;
+}
+
+UCLASS_DRIVER(dsa) = {
+	.id = UCLASS_DSA,
+	.name = "dsa",
+	.post_bind = dsa_post_bind,
+	.pre_probe = dsa_pre_probe,
+	.per_device_auto = sizeof(struct dsa_priv),
+	.per_device_plat_auto = sizeof(struct dsa_pdata),
+	.per_child_plat_auto = sizeof(struct dsa_port_pdata),
+	.flags = DM_UC_FLAG_SEQ_ALIAS,
+};
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 2/5] sandbox: Add a DSA sandbox driver and unit test
  2021-01-22 19:16 [PATCH v3 0/5] Introduce DSA Ethernet switch class and Felix driver Vladimir Oltean
  2021-01-22 19:16 ` [PATCH v3 1/5] net: Introduce DSA class for Ethernet switches Vladimir Oltean
@ 2021-01-22 19:16 ` Vladimir Oltean
  2021-01-22 19:16 ` [PATCH v3 3/5] drivers: net: Add Felix DSA switch driver Vladimir Oltean
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Vladimir Oltean @ 2021-01-22 19:16 UTC (permalink / raw)
  To: u-boot

From: Claudiu Manoil <claudiu.manoil@nxp.com>

The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a very
simple tag to identify the ports.
The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth sandbox
driver.  The 'dsa-test-eth' is not intended for testing the eth class
code however, but it is used to emulate traffic through the 'lan0' and
'lan1' front pannel switch ports.  To achieve this the dsa sandbox driver
registers a tx handler for the 'dsa-test-eth' device.  The switch ports,
labeled as 'lan0' and 'lan1', are also registered as eth devices by the
dsa class code this time.  So pinging through these switch ports is as
easy as:
=> setenv ethact lan0
=> ping 1.2.3.5

Unit tests for the dsa class code were also added.  The 'dsa_probe'
test exercises most API functions from dsa.h.  The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.
I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
v3:
- deleted the unit tests associated with the infrastructure for
  dsa_foreach_port, since that function no longer exists.
- added fixed-link and phy-mode to lan0 from the sandbox device tree.
  We don't support ports that don't have a PHY and are not fixed-link
  either.

v2: none

 arch/Kconfig              |   1 +
 arch/sandbox/dts/test.dts |  48 ++++++++++
 drivers/net/Kconfig       |   9 ++
 drivers/net/Makefile      |   1 +
 drivers/net/dsa_sandbox.c | 179 ++++++++++++++++++++++++++++++++++++++
 include/configs/sandbox.h |   2 +
 test/dm/Makefile          |   1 +
 test/dm/dsa.c             |  82 +++++++++++++++++
 test/dm/eth.c             |  10 +--
 9 files changed, 328 insertions(+), 5 deletions(-)
 create mode 100644 drivers/net/dsa_sandbox.c
 create mode 100644 test/dm/dsa.c

diff --git a/arch/Kconfig b/arch/Kconfig
index 27843cd79c4c..8a8130f0c823 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -160,6 +160,7 @@ config SANDBOX
 	imply CMD_CLONE
 	imply SILENT_CONSOLE
 	imply BOOTARGS_SUBST
+	imply DM_DSA
 
 config SH
 	bool "SuperH architecture"
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index f86cd0d3b277..0b7e853f40c5 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -14,7 +14,9 @@
 	aliases {
 		console = &uart0;
 		eth0 = "/eth at 10002000";
+		eth2 = &swp_0;
 		eth3 = &eth_3;
+		eth4 = &dsa_eth0;
 		eth5 = &eth_5;
 		gpio1 = &gpio_a;
 		gpio2 = &gpio_b;
@@ -422,6 +424,52 @@
 		fake-host-hwaddr = [00 00 66 44 22 22];
 	};
 
+	dsa_eth0: dsa-test-eth {
+		compatible = "sandbox,eth";
+		reg = <0x10006000 0x1000>;
+		fake-host-hwaddr = [00 00 66 44 22 66];
+	};
+
+	dsa-test {
+		compatible = "sandbox,dsa";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			swp_0: port at 0 {
+				reg = <0>;
+				label = "lan0";
+				phy-mode = "rgmii-rxid";
+
+				fixed-link {
+					speed = <100>;
+					full-duplex;
+				};
+			};
+
+			swp_1: port at 1 {
+				reg = <1>;
+				label = "lan1";
+				phy-mode = "rgmii-txid";
+
+				fixed-link {
+					speed = <100>;
+					full-duplex;
+				};
+			};
+
+			port at 2 {
+				reg = <2>;
+				ethernet = <&dsa_eth0>;
+
+				fixed-link {
+					speed = <1000>;
+					full-duplex;
+				};
+			};
+		};
+	};
+
 	firmware {
 		sandbox_firmware: sandbox-firmware {
 			compatible = "sandbox,firmware";
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 382224d04c6e..214aebf14a69 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -77,6 +77,15 @@ config DM_ETH_PHY
 	help
 	  Enable driver model for Ethernet Generic PHY .
 
+config DSA_SANDBOX
+	depends on DM_DSA && SANDBOX
+	default y
+	bool "Sandbox: Mocked DSA driver"
+	help
+	  This driver implements a dummy DSA switch connected to a dummy sandbox
+	  Ethernet device used as DSA master, to test DSA class code, including
+	  exported DSA API and datapath processing of Ethernet traffic.
+
 menuconfig NETDEVICES
 	bool "Network device support"
 	depends on NET
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e3bdda359dca..545fbbc0ce31 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o
 obj-$(CONFIG_ETH_DESIGNWARE_S700) += dwmac_s700.o
 obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
 obj-$(CONFIG_DNET) += dnet.o
+obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
 obj-$(CONFIG_DM_ETH_PHY) += eth-phy-uclass.o
 obj-$(CONFIG_E1000) += e1000.o
 obj-$(CONFIG_E1000_SPI) += e1000_spi.o
diff --git a/drivers/net/dsa_sandbox.c b/drivers/net/dsa_sandbox.c
new file mode 100644
index 000000000000..4b62670e5d17
--- /dev/null
+++ b/drivers/net/dsa_sandbox.c
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 NXP Semiconductors
+ */
+
+#include <asm/eth.h>
+#include <net/dsa.h>
+#include <net.h>
+
+#define DSA_SANDBOX_MAGIC	0x00415344
+#define DSA_SANDBOX_TAG_LEN	sizeof(struct dsa_sandbox_tag)
+
+struct dsa_sandbox_priv {
+	struct eth_sandbox_priv *master_priv;
+	int port_en_mask;
+};
+
+struct dsa_sandbox_tag {
+	u32 magic;
+	u32 port;
+};
+
+static bool sb_dsa_port_enabled(struct udevice *dev, int port)
+{
+	struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+	return priv->port_en_mask & BIT(port);
+}
+
+static bool sb_dsa_master_enabled(struct udevice *dev)
+{
+	struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+	return !priv->master_priv->disabled;
+}
+
+static int dsa_sandbox_port_enable(struct udevice *dev, int port,
+				   struct phy_device *phy)
+{
+	struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+	if (!sb_dsa_master_enabled(dev))
+		return -EFAULT;
+
+	priv->port_en_mask |= BIT(port);
+
+	return 0;
+}
+
+static void dsa_sandbox_port_disable(struct udevice *dev, int port,
+				     struct phy_device *phy)
+{
+	struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+	priv->port_en_mask &= ~BIT(port);
+}
+
+static int dsa_sandbox_xmit(struct udevice *dev, int port, void *packet,
+			    int length)
+{
+	struct dsa_sandbox_tag *tag = packet;
+
+	if (!sb_dsa_master_enabled(dev))
+		return -EFAULT;
+
+	if (!sb_dsa_port_enabled(dev, port))
+		return -EFAULT;
+
+	tag->magic = DSA_SANDBOX_MAGIC;
+	tag->port = port;
+
+	return 0;
+}
+
+static int dsa_sandbox_rcv(struct udevice *dev, int *port, void *packet,
+			   int length)
+{
+	struct dsa_sandbox_tag *tag = packet;
+
+	if (!sb_dsa_master_enabled(dev))
+		return -EFAULT;
+
+	if (tag->magic != DSA_SANDBOX_MAGIC)
+		return -EFAULT;
+
+	*port = tag->port;
+	if (!sb_dsa_port_enabled(dev, tag->port))
+		return -EFAULT;
+
+	return 0;
+}
+
+static const struct dsa_ops dsa_sandbox_ops = {
+	.port_enable = dsa_sandbox_port_enable,
+	.port_disable = dsa_sandbox_port_disable,
+	.xmit = dsa_sandbox_xmit,
+	.rcv = dsa_sandbox_rcv,
+};
+
+static int sb_dsa_handler(struct udevice *dev, void *packet,
+			  unsigned int len)
+{
+	struct eth_sandbox_priv *master_priv;
+	struct dsa_sandbox_tag *tag = packet;
+	struct udevice *dsa_dev;
+	u32 port_index;
+	void *rx_buf;
+	int i;
+
+	/* this emulates the switch hw and the network side */
+	if (tag->magic != DSA_SANDBOX_MAGIC)
+		return -EFAULT;
+
+	port_index = tag->port;
+	master_priv = dev_get_priv(dev);
+	dsa_dev = master_priv->priv;
+	if (!sb_dsa_port_enabled(dsa_dev, port_index))
+		return -EFAULT;
+
+	packet += DSA_SANDBOX_TAG_LEN;
+	len -= DSA_SANDBOX_TAG_LEN;
+
+	if (!sandbox_eth_arp_req_to_reply(dev, packet, len))
+		goto dsa_tagging;
+	if (!sandbox_eth_ping_req_to_reply(dev, packet, len))
+		goto dsa_tagging;
+
+	return 0;
+
+dsa_tagging:
+	master_priv->recv_packets--;
+	i = master_priv->recv_packets;
+	rx_buf = master_priv->recv_packet_buffer[i];
+	len = master_priv->recv_packet_length[i];
+	memmove(rx_buf + DSA_SANDBOX_TAG_LEN, rx_buf, len);
+
+	tag = rx_buf;
+	tag->magic = DSA_SANDBOX_MAGIC;
+	tag->port = port_index;
+	len += DSA_SANDBOX_TAG_LEN;
+	master_priv->recv_packet_length[i] = len;
+	master_priv->recv_packets++;
+
+	return 0;
+}
+
+static int dsa_sandbox_probe(struct udevice *dev)
+{
+	struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+	struct udevice *master = dsa_get_master(dev);
+	struct eth_sandbox_priv *master_priv;
+
+	if (!master)
+		return -ENODEV;
+
+	dsa_set_tagging(dev, DSA_SANDBOX_TAG_LEN, 0);
+
+	master_priv = dev_get_priv(master);
+	master_priv->priv = dev;
+	master_priv->tx_handler = sb_dsa_handler;
+
+	priv->master_priv = master_priv;
+
+	return 0;
+}
+
+static const struct udevice_id dsa_sandbox_ids[] = {
+	{ .compatible = "sandbox,dsa" },
+	{ }
+};
+
+U_BOOT_DRIVER(dsa_sandbox) = {
+	.name		= "dsa_sandbox",
+	.id		= UCLASS_DSA,
+	.of_match	= dsa_sandbox_ids,
+	.probe		= dsa_sandbox_probe,
+	.ops		= &dsa_sandbox_ops,
+	.priv_auto	= sizeof(struct dsa_sandbox_priv),
+};
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index e0708fe57395..91f636b2c102 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -93,7 +93,9 @@
 #endif
 
 #define SANDBOX_ETH_SETTINGS		"ethaddr=00:00:11:22:33:44\0" \
+					"eth2addr=00:00:11:22:33:48\0" \
 					"eth3addr=00:00:11:22:33:45\0" \
+					"eth4addr=00:00:11:22:33:48\0" \
 					"eth5addr=00:00:11:22:33:46\0" \
 					"eth6addr=00:00:11:22:33:47\0" \
 					"ipaddr=1.2.3.4\0"
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 46e076ed099d..c14363cf9d88 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_DM_BOOTCOUNT) += bootcount.o
 obj-$(CONFIG_CLK) += clk.o clk_ccf.o
 obj-$(CONFIG_DEVRES) += devres.o
 obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi_host.o
+obj-$(CONFIG_DM_DSA) += dsa.o
 obj-$(CONFIG_DM_ETH) += eth.o
 obj-$(CONFIG_FIRMWARE) += firmware.o
 obj-$(CONFIG_DM_GPIO) += gpio.o
diff --git a/test/dm/dsa.c b/test/dm/dsa.c
new file mode 100644
index 000000000000..18c1776460da
--- /dev/null
+++ b/test/dm/dsa.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2020-2021 NXP Semiconductors
+ */
+
+#include <net/dsa.h>
+#include <dm/test.h>
+#include <test/ut.h>
+#include <net.h>
+#include <dm/uclass-internal.h>
+#include <dm/device-internal.h>
+
+/* This test exercises the major dsa.h API functions, after making sure
+ * that the DSA ports and the master Eth are correctly probed.
+ */
+static int dm_test_dsa_probe(struct unit_test_state *uts)
+{
+	struct udevice *dev_dsa, *dev_port, *dev_master;
+	struct dsa_pdata *dsa_pdata;
+	enum uclass_id id;
+
+	id = uclass_get_by_name("dsa");
+	ut_assert(id == UCLASS_DSA);
+
+	ut_assertok(uclass_find_device_by_name(UCLASS_DSA, "dsa-test",
+					       &dev_dsa));
+	ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "dsa-test-eth",
+					       &dev_master));
+	ut_assertok(device_probe(dev_master));
+
+	ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "dsa-test at 0",
+					       &dev_port));
+	ut_assertok(device_probe(dev_port));
+
+	ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "dsa-test at 1",
+					       &dev_port));
+	ut_assertok(device_probe(dev_port));
+
+	/* exercise DSA API */
+	dsa_pdata = dev_get_uclass_plat(dev_dsa);
+	ut_assertnonnull(dsa_pdata);
+	/* includes CPU port */
+	ut_assert(dsa_pdata->num_ports == 3);
+
+	ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "lan0",
+					       &dev_port));
+	ut_assertok(device_probe(dev_port));
+
+	ut_assertok(uclass_find_device_by_name(UCLASS_ETH, "lan1",
+					       &dev_port));
+	ut_assertok(device_probe(dev_port));
+
+	dev_master = dsa_get_master(dev_dsa);
+	ut_assertnonnull(dev_master);
+	ut_asserteq_str("dsa-test-eth", dev_master->name);
+
+	return 0;
+}
+
+DM_TEST(dm_test_dsa_probe, UT_TESTF_SCAN_FDT);
+
+/* This test sends ping requests with the local address through each DSA port
+ * via the sandbox DSA master Eth.
+ */
+static int dm_test_dsa(struct unit_test_state *uts)
+{
+	net_ping_ip = string_to_ip("1.2.3.5");
+
+	env_set("ethact", "eth2");
+	ut_assertok(net_loop(PING));
+
+	env_set("ethact", "lan0");
+	ut_assertok(net_loop(PING));
+	env_set("ethact", "lan1");
+	ut_assertok(net_loop(PING));
+
+	env_set("ethact", "");
+
+	return 0;
+}
+
+DM_TEST(dm_test_dsa, UT_TESTF_SCAN_FDT);
diff --git a/test/dm/eth.c b/test/dm/eth.c
index fa8a69da7013..e4ee69561064 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -53,8 +53,8 @@ static int dm_test_eth_alias(struct unit_test_state *uts)
 	ut_assertok(net_loop(PING));
 	ut_asserteq_str("eth at 10004000", env_get("ethact"));
 
-	/* Expected to fail since eth2 is not defined in the device tree */
-	env_set("ethact", "eth2");
+	/* Expected to fail since eth1 is not defined in the device tree */
+	env_set("ethact", "eth1");
 	ut_assertok(net_loop(PING));
 	ut_asserteq_str("eth at 10002000", env_get("ethact"));
 
@@ -227,7 +227,7 @@ static int _dm_test_net_retry(struct unit_test_state *uts)
 	 * the active device should be eth0
 	 */
 	sandbox_eth_disable_response(1, true);
-	env_set("ethact", "eth at 10004000");
+	env_set("ethact", "lan1");
 	env_set("netretry", "yes");
 	sandbox_eth_skip_timeout();
 	ut_assertok(net_loop(PING));
@@ -237,11 +237,11 @@ static int _dm_test_net_retry(struct unit_test_state *uts)
 	 * eth1 is disabled and netretry is no, so the ping should fail and the
 	 * active device should be eth1
 	 */
-	env_set("ethact", "eth at 10004000");
+	env_set("ethact", "lan1");
 	env_set("netretry", "no");
 	sandbox_eth_skip_timeout();
 	ut_asserteq(-ENONET, net_loop(PING));
-	ut_asserteq_str("eth at 10004000", env_get("ethact"));
+	ut_asserteq_str("lan1", env_get("ethact"));
 
 	return 0;
 }
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 3/5] drivers: net: Add Felix DSA switch driver
  2021-01-22 19:16 [PATCH v3 0/5] Introduce DSA Ethernet switch class and Felix driver Vladimir Oltean
  2021-01-22 19:16 ` [PATCH v3 1/5] net: Introduce DSA class for Ethernet switches Vladimir Oltean
  2021-01-22 19:16 ` [PATCH v3 2/5] sandbox: Add a DSA sandbox driver and unit test Vladimir Oltean
@ 2021-01-22 19:16 ` Vladimir Oltean
  2021-01-22 19:16 ` [PATCH v3 4/5] arm: dts: ls1028a: Add Ethernet switch node and dependencies Vladimir Oltean
  2021-01-22 19:16 ` [PATCH v3 5/5] configs: ls1028a: Enable the Ethernet switch driver in defconfig Vladimir Oltean
  4 siblings, 0 replies; 10+ messages in thread
From: Vladimir Oltean @ 2021-01-22 19:16 UTC (permalink / raw)
  To: u-boot

From: Alex Marginean <alexandru.marginean@nxp.com>

This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
v3: dsa_foreach_port() does not work when called from the probe function
    of the DSA udevice, because the eth port udevices are _not_ yet probed
    at that point. To fix this, we are now initializing all ports from
    the .port_enable() callback of each eth udevice.

v2: none

 drivers/net/fsl_enetc.h                 |   5 +
 drivers/net/mscc_eswitch/Kconfig        |   8 +
 drivers/net/mscc_eswitch/Makefile       |   1 +
 drivers/net/mscc_eswitch/felix_switch.c | 414 ++++++++++++++++++++++++
 4 files changed, 428 insertions(+)
 create mode 100644 drivers/net/mscc_eswitch/felix_switch.c

diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 37e7e858435b..110c1d78fbc6 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -201,6 +201,11 @@ struct enetc_priv {
 /* PCS replicator block for USXGMII */
 #define ENETC_PCS_DEVAD_REPL		0x1f
 
+#define ENETC_PCS_REPL_LINK_TIMER_1	0x12
+#define  ENETC_PCS_REPL_LINK_TIMER_1_DEF	0x0003
+#define ENETC_PCS_REPL_LINK_TIMER_2	0x13
+#define  ENETC_PCS_REPL_LINK_TIMER_2_DEF	0x06a0
+
 /* ENETC external MDIO registers */
 #define ENETC_MDIO_BASE		0x1c00
 #define ENETC_MDIO_CFG		0x00
diff --git a/drivers/net/mscc_eswitch/Kconfig b/drivers/net/mscc_eswitch/Kconfig
index 80dd22f98b7f..ccf7822dbe7a 100644
--- a/drivers/net/mscc_eswitch/Kconfig
+++ b/drivers/net/mscc_eswitch/Kconfig
@@ -36,3 +36,11 @@ config MSCC_SERVAL_SWITCH
 	select PHYLIB
 	help
 	  This driver supports the Serval network switch device.
+
+config MSCC_FELIX_SWITCH
+	bool "Felix switch driver"
+	depends on DM_DSA && DM_PCI
+	select FSL_ENETC
+	help
+	  This driver supports the Ethernet switch integrated in the
+	  NXP LS1028A SoC.
diff --git a/drivers/net/mscc_eswitch/Makefile b/drivers/net/mscc_eswitch/Makefile
index d583fe9fc4bb..22342ed11417 100644
--- a/drivers/net/mscc_eswitch/Makefile
+++ b/drivers/net/mscc_eswitch/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_MSCC_LUTON_SWITCH) += luton_switch.o mscc_xfer.o mscc_mac_table.o m
 obj-$(CONFIG_MSCC_JR2_SWITCH) += jr2_switch.o mscc_xfer.o mscc_miim.o
 obj-$(CONFIG_MSCC_SERVALT_SWITCH) += servalt_switch.o mscc_xfer.o mscc_miim.o
 obj-$(CONFIG_MSCC_SERVAL_SWITCH) += serval_switch.o mscc_xfer.o mscc_mac_table.o mscc_miim.o
+obj-$(CONFIG_MSCC_FELIX_SWITCH) += felix_switch.o
diff --git a/drivers/net/mscc_eswitch/felix_switch.c b/drivers/net/mscc_eswitch/felix_switch.c
new file mode 100644
index 000000000000..f20e84e0f10c
--- /dev/null
+++ b/drivers/net/mscc_eswitch/felix_switch.c
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Felix (VSC9959) Ethernet switch driver
+ * Copyright 2018-2021 NXP Semiconductors
+ */
+
+/*
+ * This driver is used for the Ethernet switch integrated into NXP LS1028A.
+ * Felix switch is derived from Microsemi Ocelot but there are several NXP
+ * adaptations that makes the two U-Boot drivers largely incompatible.
+ *
+ * Felix on LS1028A has 4 front panel ports and two internal ports, connected
+ * to ENETC interfaces.  We're using one of the ENETC interfaces to push traffic
+ * into the switch.  Injection/extraction headers are used to identify
+ * egress/ingress ports in the switch for Tx/Rx.
+ */
+
+#include <dm/device_compat.h>
+#include <linux/delay.h>
+#include <net/dsa.h>
+#include <asm/io.h>
+#include <miiphy.h>
+#include <pci.h>
+
+/* defines especially around PCS are reused from enetc */
+#include "../fsl_enetc.h"
+
+#define PCI_DEVICE_ID_FELIX_ETHSW	0xEEF0
+
+/* Felix has in fact 6 ports, but we don't use the last internal one */
+#define FELIX_PORT_COUNT		5
+/* Front panel port mask */
+#define FELIX_FP_PORT_MASK		0xf
+
+/* Register map for BAR4 */
+#define FELIX_SYS			0x010000
+#define FELIX_ES0			0x040000
+#define FELIX_IS1			0x050000
+#define FELIX_IS2			0x060000
+#define FELIX_GMII(port)		(0x100000 + (port) * 0x10000)
+#define FELIX_QSYS			0x200000
+
+#define FELIX_SYS_SYSTEM		(FELIX_SYS + 0x00000E00)
+#define  FELIX_SYS_SYSTEM_EN		BIT(0)
+#define FELIX_SYS_RAM_CTRL		(FELIX_SYS + 0x00000F24)
+#define  FELIX_SYS_RAM_CTRL_INIT	BIT(1)
+#define FELIX_SYS_SYSTEM_PORT_MODE(a)	(FELIX_SYS_SYSTEM + 0xC + (a) * 4)
+#define  FELIX_SYS_SYSTEM_PORT_MODE_CPU	0x0000001e
+
+#define FELIX_ES0_TCAM_CTRL		(FELIX_ES0 + 0x000003C0)
+#define  FELIX_ES0_TCAM_CTRL_EN		BIT(0)
+#define FELIX_IS1_TCAM_CTRL		(FELIX_IS1 + 0x000003C0)
+#define  FELIX_IS1_TCAM_CTRL_EN		BIT(0)
+#define FELIX_IS2_TCAM_CTRL		(FELIX_IS2 + 0x000003C0)
+#define  FELIX_IS2_TCAM_CTRL_EN		BIT(0)
+
+#define FELIX_GMII_CLOCK_CFG(port)	(FELIX_GMII(port) + 0x00000000)
+#define  FELIX_GMII_CLOCK_CFG_LINK_1G	1
+#define  FELIX_GMII_CLOCK_CFG_LINK_100M	2
+#define  FELIX_GMII_CLOCK_CFG_LINK_10M	3
+#define FELIX_GMII_MAC_ENA_CFG(port)	(FELIX_GMII(port) + 0x0000001C)
+#define  FELIX_GMII_MAX_ENA_CFG_TX	BIT(0)
+#define  FELIX_GMII_MAX_ENA_CFG_RX	BIT(4)
+#define FELIX_GMII_MAC_IFG_CFG(port)	(FELIX_GMII(port) + 0x0000001C + 0x14)
+#define  FELIX_GMII_MAC_IFG_CFG_DEF	0x515
+
+#define FELIX_QSYS_SYSTEM		(FELIX_QSYS + 0x0000F460)
+#define FELIX_QSYS_SYSTEM_SW_PORT_MODE(a)	\
+					(FELIX_QSYS_SYSTEM + 0x20 + (a) * 4)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_ENA		BIT(14)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_LOSSY	BIT(9)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_SCH(a)	(((a) & 0x3800) << 11)
+#define FELIX_QSYS_SYSTEM_EXT_CPU_CFG	(FELIX_QSYS_SYSTEM + 0x80)
+#define  FELIX_QSYS_SYSTEM_EXT_CPU_PORT(a)	(((a) & 0xf) << 8 | 0xff)
+
+/* internal MDIO in BAR0 */
+#define FELIX_PM_IMDIO_BASE		0x8030
+
+/* Serdes block on LS1028A */
+#define FELIX_SERDES_BASE		0x1ea0000L
+#define FELIX_SERDES_LNATECR0(lane)	(FELIX_SERDES_BASE + 0x818 + \
+					 (lane) * 0x40)
+#define  FELIX_SERDES_LNATECR0_ADPT_EQ	0x00003000
+#define FELIX_SERDES_SGMIICR1(lane)	(FELIX_SERDES_BASE + 0x1804 + \
+					 (lane) * 0x10)
+#define  FELIX_SERDES_SGMIICR1_SGPCS	BIT(11)
+#define  FELIX_SERDES_SGMIICR1_MDEV(a)	(((a) & 0x1f) << 27)
+
+#define FELIX_PCS_CTRL			0
+#define  FELIX_PCS_CTRL_RST		BIT(15)
+
+/*
+ * The long prefix format used here contains two dummy MAC addresses, a magic
+ * value in place of a VLAN tag followed by the extraction/injection header and
+ * the original L2 frame.  Out of all this we only use the port ID.
+ */
+#define FELIX_DSA_TAG_LEN		sizeof(struct felix_dsa_tag)
+#define FELIX_DSA_TAG_MAGIC		0x0a008088
+#define FELIX_DSA_TAG_INJ_PORT		7
+#define  FELIX_DSA_TAG_INJ_PORT_SET(a)	(0x1 << ((a) & FELIX_FP_PORT_MASK))
+#define FELIX_DSA_TAG_EXT_PORT		10
+#define  FELIX_DSA_TAG_EXT_PORT_GET(a)	((a) >> 3)
+
+struct felix_dsa_tag {
+	uchar d_mac[6];
+	uchar s_mac[6];
+	u32   magic;
+	uchar meta[16];
+};
+
+struct felix_priv {
+	void *regs_base;
+	void *imdio_base;
+	struct mii_dev imdio;
+};
+
+/* MDIO wrappers, we're using these to drive internal MDIO to get to serdes */
+static int felix_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
+{
+	struct enetc_mdio_priv priv;
+
+	priv.regs_base = bus->priv;
+	return enetc_mdio_read_priv(&priv, addr, devad, reg);
+}
+
+static int felix_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
+			    u16 val)
+{
+	struct enetc_mdio_priv priv;
+
+	priv.regs_base = bus->priv;
+	return enetc_mdio_write_priv(&priv, addr, devad, reg, val);
+}
+
+/* set up serdes for SGMII */
+static void felix_init_sgmii(struct mii_dev *imdio, int pidx, bool an)
+{
+	u16 reg;
+
+	/* set up PCS lane address */
+	out_le32(FELIX_SERDES_SGMIICR1(pidx), FELIX_SERDES_SGMIICR1_SGPCS |
+		 FELIX_SERDES_SGMIICR1_MDEV(pidx));
+
+	/*
+	 * Set to SGMII mode, for 1Gbps enable AN, for 2.5Gbps set fixed speed.
+	 * Although fixed speed is 1Gbps, we could be running at 2.5Gbps based
+	 * on PLL configuration.  Setting 1G for 2.5G here is counter intuitive
+	 * but intentional.
+	 */
+	reg = ENETC_PCS_IF_MODE_SGMII;
+	reg |= an ? ENETC_PCS_IF_MODE_SGMII_AN : ENETC_PCS_IF_MODE_SPEED_1G;
+	felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE,
+			 ENETC_PCS_IF_MODE, reg);
+
+	/* Dev ability - SGMII */
+	felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE,
+			 ENETC_PCS_DEV_ABILITY, ENETC_PCS_DEV_ABILITY_SGMII);
+
+	/* Adjust link timer for SGMII */
+	felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE,
+			 ENETC_PCS_LINK_TIMER1, ENETC_PCS_LINK_TIMER1_VAL);
+	felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE,
+			 ENETC_PCS_LINK_TIMER2, ENETC_PCS_LINK_TIMER2_VAL);
+
+	reg = ENETC_PCS_CR_DEF_VAL;
+	reg |= an ? ENETC_PCS_CR_RESET_AN : ENETC_PCS_CR_RST;
+	/* restart PCS AN */
+	felix_mdio_write(imdio, pidx, MDIO_DEVAD_NONE,
+			 ENETC_PCS_CR, reg);
+}
+
+/* set up MAC and serdes for (Q)SXGMII */
+static int felix_init_sxgmii(struct mii_dev *imdio, int pidx)
+{
+	int timeout = 1000;
+
+	/* set up transit equalization control on serdes lane */
+	out_le32(FELIX_SERDES_LNATECR0(1), FELIX_SERDES_LNATECR0_ADPT_EQ);
+
+	/*reset lane */
+	felix_mdio_write(imdio, pidx, MDIO_MMD_PCS, FELIX_PCS_CTRL,
+			 FELIX_PCS_CTRL_RST);
+	while (felix_mdio_read(imdio, pidx, MDIO_MMD_PCS,
+			       FELIX_PCS_CTRL) & FELIX_PCS_CTRL_RST &&
+			--timeout) {
+		mdelay(10);
+	}
+	if (felix_mdio_read(imdio, pidx, MDIO_MMD_PCS,
+			    FELIX_PCS_CTRL) & FELIX_PCS_CTRL_RST)
+		return -ETIME;
+
+	/* Dev ability - SXGMII */
+	felix_mdio_write(imdio, pidx, ENETC_PCS_DEVAD_REPL,
+			 ENETC_PCS_DEV_ABILITY, ENETC_PCS_DEV_ABILITY_SXGMII);
+
+	/* Restart PCS AN */
+	felix_mdio_write(imdio, pidx, ENETC_PCS_DEVAD_REPL, ENETC_PCS_CR,
+			 ENETC_PCS_CR_RST | ENETC_PCS_CR_RESET_AN);
+	felix_mdio_write(imdio, pidx, ENETC_PCS_DEVAD_REPL,
+			 ENETC_PCS_REPL_LINK_TIMER_1,
+			 ENETC_PCS_REPL_LINK_TIMER_1_DEF);
+	felix_mdio_write(imdio, pidx, ENETC_PCS_DEVAD_REPL,
+			 ENETC_PCS_REPL_LINK_TIMER_2,
+			 ENETC_PCS_REPL_LINK_TIMER_2_DEF);
+
+	return 0;
+}
+
+/* Apply protocol specific configuration to MAC, serdes as needed */
+static void felix_start_pcs(struct udevice *dev, int port,
+			    struct phy_device *phy, struct mii_dev *imdio)
+{
+	bool autoneg = true;
+
+	if (phy->phy_id == PHY_FIXED_ID ||
+	    phy->interface == PHY_INTERFACE_MODE_SGMII_2500)
+		autoneg = false;
+
+	switch (phy->interface) {
+	case PHY_INTERFACE_MODE_SGMII:
+	case PHY_INTERFACE_MODE_SGMII_2500:
+	case PHY_INTERFACE_MODE_QSGMII:
+		felix_init_sgmii(imdio, port, autoneg);
+		break;
+	case PHY_INTERFACE_MODE_XGMII:
+	case PHY_INTERFACE_MODE_XFI:
+	case PHY_INTERFACE_MODE_USXGMII:
+		if (felix_init_sxgmii(imdio, port))
+			dev_err(dev, "PCS reset timeout on port %d\n", port);
+		break;
+	default:
+		break;
+	}
+}
+
+void felix_init(struct udevice *dev)
+{
+	struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
+	struct felix_priv *priv = dev_get_priv(dev);
+	void *base = priv->regs_base;
+	int timeout = 100;
+
+	/* Init core memories */
+	out_le32(base + FELIX_SYS_RAM_CTRL, FELIX_SYS_RAM_CTRL_INIT);
+	while (in_le32(base + FELIX_SYS_RAM_CTRL) & FELIX_SYS_RAM_CTRL_INIT &&
+	       --timeout)
+		udelay(10);
+	if (in_le32(base + FELIX_SYS_RAM_CTRL) & FELIX_SYS_RAM_CTRL_INIT)
+		dev_err(dev, "Timeout waiting for switch memories\n");
+
+	/* Start switch core, set up ES0, IS1, IS2 */
+	out_le32(base + FELIX_SYS_SYSTEM, FELIX_SYS_SYSTEM_EN);
+	out_le32(base + FELIX_ES0_TCAM_CTRL, FELIX_ES0_TCAM_CTRL_EN);
+	out_le32(base + FELIX_IS1_TCAM_CTRL, FELIX_IS1_TCAM_CTRL_EN);
+	out_le32(base + FELIX_IS2_TCAM_CTRL, FELIX_IS2_TCAM_CTRL_EN);
+	udelay(20);
+
+	priv->imdio.read = felix_mdio_read;
+	priv->imdio.write = felix_mdio_write;
+	priv->imdio.priv = priv->imdio_base + FELIX_PM_IMDIO_BASE;
+	strncpy(priv->imdio.name, dev->name, MDIO_NAME_LEN);
+
+	/* set up CPU port */
+	out_le32(base + FELIX_QSYS_SYSTEM_EXT_CPU_CFG,
+		 FELIX_QSYS_SYSTEM_EXT_CPU_PORT(pdata->cpu_port));
+	out_le32(base + FELIX_SYS_SYSTEM_PORT_MODE(pdata->cpu_port),
+		 FELIX_SYS_SYSTEM_PORT_MODE_CPU);
+}
+
+/*
+ * Probe Felix:
+ * - enable the PCI function
+ * - map BAR 4
+ * - init switch core and port registers
+ */
+static int felix_probe(struct udevice *dev)
+{
+	struct felix_priv *priv = dev_get_priv(dev);
+
+	if (ofnode_valid(dev_ofnode(dev)) &&
+	    !ofnode_is_available(dev_ofnode(dev))) {
+		dev_dbg(dev, "switch disabled\n");
+		return -ENODEV;
+	}
+
+	priv->imdio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0);
+	if (!priv->imdio_base) {
+		dev_err(dev, "failed to map BAR0\n");
+		return -EINVAL;
+	}
+
+	priv->regs_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_4, 0);
+	if (!priv->regs_base) {
+		dev_err(dev, "failed to map BAR4\n");
+		return -EINVAL;
+	}
+
+	/* register internal MDIO for debug */
+	if (!miiphy_get_dev_by_name(dev->name)) {
+		struct mii_dev *mii_bus;
+
+		mii_bus = mdio_alloc();
+		mii_bus->read = felix_mdio_read;
+		mii_bus->write = felix_mdio_write;
+		mii_bus->priv = priv->imdio_base + FELIX_PM_IMDIO_BASE;
+		strncpy(mii_bus->name, dev->name, MDIO_NAME_LEN);
+		mdio_register(mii_bus);
+	}
+
+	dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY);
+
+	dsa_set_tagging(dev, FELIX_DSA_TAG_LEN, 0);
+
+	/* set up registers */
+	felix_init(dev);
+
+	return 0;
+}
+
+static int felix_port_enable(struct udevice *dev, int port,
+			     struct phy_device *phy)
+{
+	int supported = PHY_GBIT_FEATURES | SUPPORTED_2500baseX_Full;
+	struct felix_priv *priv = dev_get_priv(dev);
+	void *base = priv->regs_base;
+
+	/* Set up MAC registers */
+	out_le32(base + FELIX_GMII_CLOCK_CFG(port),
+		 FELIX_GMII_CLOCK_CFG_LINK_1G);
+
+	out_le32(base + FELIX_GMII_MAC_IFG_CFG(port),
+		 FELIX_GMII_MAC_IFG_CFG_DEF);
+
+	out_le32(base + FELIX_GMII_MAC_ENA_CFG(port),
+		 FELIX_GMII_MAX_ENA_CFG_TX | FELIX_GMII_MAX_ENA_CFG_RX);
+
+	out_le32(base + FELIX_QSYS_SYSTEM_SW_PORT_MODE(port),
+		 FELIX_QSYS_SYSTEM_SW_PORT_ENA |
+		 FELIX_QSYS_SYSTEM_SW_PORT_LOSSY |
+		 FELIX_QSYS_SYSTEM_SW_PORT_SCH(1));
+
+	felix_start_pcs(dev, port, phy, &priv->imdio);
+
+	phy->supported &= supported;
+	phy->advertising &= supported;
+	phy_config(phy);
+
+	phy_startup(phy);
+
+	return 0;
+}
+
+static void felix_port_disable(struct udevice *dev, int pidx,
+			       struct phy_device *phy)
+{
+	struct felix_priv *priv = dev_get_priv(dev);
+	void *base = priv->regs_base;
+
+	out_le32(base + FELIX_GMII_MAC_ENA_CFG(pidx), 0);
+
+	out_le32(base + FELIX_QSYS_SYSTEM_SW_PORT_MODE(pidx),
+		 FELIX_QSYS_SYSTEM_SW_PORT_LOSSY |
+		 FELIX_QSYS_SYSTEM_SW_PORT_SCH(1));
+
+	/*
+	 * we don't call phy_shutdown here to avoid waiting next time we use
+	 * the port, but the downside is that remote side will think we're
+	 * actively processing traffic although we are not.
+	 */
+}
+
+static int felix_xmit(struct udevice *dev, int pidx, void *packet, int length)
+{
+	struct felix_dsa_tag *tag = packet;
+
+	tag->magic = FELIX_DSA_TAG_MAGIC;
+	tag->meta[FELIX_DSA_TAG_INJ_PORT] = FELIX_DSA_TAG_INJ_PORT_SET(pidx);
+
+	return 0;
+}
+
+static int felix_rcv(struct udevice *dev, int *pidx, void *packet, int length)
+{
+	struct felix_dsa_tag *tag = packet;
+
+	if (tag->magic != FELIX_DSA_TAG_MAGIC)
+		return -EINVAL;
+
+	*pidx = FELIX_DSA_TAG_EXT_PORT_GET(tag->meta[FELIX_DSA_TAG_EXT_PORT]);
+
+	return 0;
+}
+
+static const struct dsa_ops felix_dsa_ops = {
+	.port_enable	= felix_port_enable,
+	.port_disable	= felix_port_disable,
+	.xmit		= felix_xmit,
+	.rcv		= felix_rcv,
+};
+
+U_BOOT_DRIVER(felix_ethsw) = {
+	.name		= "felix-switch",
+	.id		= UCLASS_DSA,
+	.probe		= felix_probe,
+	.ops		= &felix_dsa_ops,
+	.priv_auto	= sizeof(struct felix_priv),
+};
+
+static struct pci_device_id felix_ethsw_ids[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_FELIX_ETHSW) },
+	{}
+};
+
+U_BOOT_PCI_DEVICE(felix_ethsw, felix_ethsw_ids);
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 4/5] arm: dts: ls1028a: Add Ethernet switch node and dependencies
  2021-01-22 19:16 [PATCH v3 0/5] Introduce DSA Ethernet switch class and Felix driver Vladimir Oltean
                   ` (2 preceding siblings ...)
  2021-01-22 19:16 ` [PATCH v3 3/5] drivers: net: Add Felix DSA switch driver Vladimir Oltean
@ 2021-01-22 19:16 ` Vladimir Oltean
  2021-01-22 21:25   ` Michael Walle
  2021-01-22 19:16 ` [PATCH v3 5/5] configs: ls1028a: Enable the Ethernet switch driver in defconfig Vladimir Oltean
  4 siblings, 1 reply; 10+ messages in thread
From: Vladimir Oltean @ 2021-01-22 19:16 UTC (permalink / raw)
  To: u-boot

From: Alex Marginean <alexandru.marginean@nxp.com>

The definition follows the DSA binding in kernel and describes the switch,
its ports and PHYs.  The switch node has the same structure as in Linux
and this patch enables it (and relevant ports) for the LS1028A RDB board.

ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is
not used in U-Boot and was disabled.  Ethernet port aliases were also
added to better manage the multitude of ports available now.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
v3: Added a comment denoting the PHY model present on the RDB.

v2: Switch node structure defined in dtsi now consistent with the Linux
switch node definition. Moved aliases from dtsi to the RDB DTS to
minimize impact on other boards (and for improved flexibility).

 arch/arm/dts/fsl-ls1028a-rdb.dts | 64 ++++++++++++++++++++++++++++++++
 arch/arm/dts/fsl-ls1028a.dtsi    | 56 +++++++++++++++++++++++++++-
 2 files changed, 119 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index 85b4815b2ed7..3432fca35269 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -15,6 +15,12 @@
 	compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
 	aliases {
 		spi0 = &fspi;
+		eth0 = &enetc0;
+		eth1 = &enetc2;
+		eth2 = &mscc_felix_port0;
+		eth3 = &mscc_felix_port1;
+		eth4 = &mscc_felix_port2;
+		eth5 = &mscc_felix_port3;
 	};
 };
 
@@ -131,9 +137,67 @@
 	phy-handle = <&rdb_phy0>;
 };
 
+&enetc2 {
+	status = "okay";
+};
+
+&mscc_felix {
+	status = "okay";
+};
+
+&mscc_felix_port0 {
+	label = "swp0";
+	phy-handle = <&sw_phy0>;
+	phy-mode = "qsgmii";
+	status = "okay";
+};
+
+&mscc_felix_port1 {
+	label = "swp1";
+	phy-handle = <&sw_phy1>;
+	phy-mode = "qsgmii";
+	status = "okay";
+};
+
+&mscc_felix_port2 {
+	label = "swp2";
+	phy-handle = <&sw_phy2>;
+	phy-mode = "qsgmii";
+	status = "okay";
+};
+
+&mscc_felix_port3 {
+	label = "swp3";
+	phy-handle = <&sw_phy3>;
+	phy-mode = "qsgmii";
+	status = "okay";
+};
+
+&mscc_felix_port4 {
+	ethernet = <&enetc2>;
+	status = "okay";
+};
+
 &mdio0 {
 	status = "okay";
 	rdb_phy0: phy at 2 {
 		reg = <2>;
 	};
+
+	/* VSC8514 QSGMII PHY */
+	sw_phy0: phy at 10 {
+		reg = <0x10>;
+	};
+
+	sw_phy1: phy at 11 {
+		reg = <0x11>;
+	};
+
+	sw_phy2: phy at 12 {
+		reg = <0x12>;
+	};
+
+	sw_phy3: phy at 13 {
+		reg = <0x13>;
+	};
 };
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index d0850237c797..9740006689ca 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -151,9 +151,63 @@
 			reg = <0x000300 0 0 0 0>;
 			status = "disabled";
 		};
+
+		mscc_felix: pci at 0,5 {
+			reg = <0x000500 0 0 0 0>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				mscc_felix_port0: port at 0 {
+					reg = <0>;
+					status = "disabled";
+				};
+
+				mscc_felix_port1: port at 1 {
+					reg = <1>;
+					status = "disabled";
+				};
+
+				mscc_felix_port2: port at 2 {
+					reg = <2>;
+					status = "disabled";
+				};
+
+				mscc_felix_port3: port at 3 {
+					reg = <3>;
+					status = "disabled";
+				};
+
+				mscc_felix_port4: port at 4 {
+					reg = <4>;
+					phy-mode = "internal";
+					status = "disabled";
+
+					fixed-link {
+						speed = <2500>;
+						full-duplex;
+					};
+				};
+
+				mscc_felix_port5: port at 5 {
+					reg = <5>;
+					phy-mode = "internal";
+					status = "disabled";
+
+					fixed-link {
+						speed = <1000>;
+						full-duplex;
+					};
+
+				};
+			};
+		};
+
 		enetc6: pci at 0,6 {
 			reg = <0x000600 0 0 0 0>;
-			status = "okay";
+			status = "disabled";
 			phy-mode = "internal";
 		};
 	};
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 5/5] configs: ls1028a: Enable the Ethernet switch driver in defconfig
  2021-01-22 19:16 [PATCH v3 0/5] Introduce DSA Ethernet switch class and Felix driver Vladimir Oltean
                   ` (3 preceding siblings ...)
  2021-01-22 19:16 ` [PATCH v3 4/5] arm: dts: ls1028a: Add Ethernet switch node and dependencies Vladimir Oltean
@ 2021-01-22 19:16 ` Vladimir Oltean
  2021-01-22 21:25   ` Michael Walle
  4 siblings, 1 reply; 10+ messages in thread
From: Vladimir Oltean @ 2021-01-22 19:16 UTC (permalink / raw)
  To: u-boot

From: Alex Marginean <alexandru.marginean@nxp.com>

The switch driver for LS1028A Ethernet switch is now compiled in for
the NXP LS1028A reference design boards and for the Kontron SMARC-sAL28.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
v3: enable the config options for the Kontron board too.

v2: none

 configs/kontron_sl28_defconfig               | 2 ++
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 ++
 configs/ls1028aqds_tfa_defconfig             | 2 ++
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 2 ++
 configs/ls1028ardb_tfa_defconfig             | 2 ++
 5 files changed, 10 insertions(+)

diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig
index c1a096799c2c..b295912f7d4a 100644
--- a/configs/kontron_sl28_defconfig
+++ b/configs/kontron_sl28_defconfig
@@ -82,6 +82,8 @@ CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_DM_DSA=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_NVME=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 14c49cd0d6f7..43ddcf916648 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -61,6 +61,8 @@ CONFIG_DM_MDIO_MUX=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
 CONFIG_MDIO_MUX_I2CREG=y
+CONFIG_DM_DSA=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_NVME=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 09a692370876..c790e994853b 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -67,6 +67,8 @@ CONFIG_DM_MDIO_MUX=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
 CONFIG_MDIO_MUX_I2CREG=y
+CONFIG_DM_DSA=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_NVME=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index b034580aeff6..8b9e217c61c9 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -58,6 +58,8 @@ CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_DM_DSA=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_NVME=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 4bed352420a0..aa82719e5e21 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -64,6 +64,8 @@ CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_DM_DSA=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_NVME=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v3 4/5] arm: dts: ls1028a: Add Ethernet switch node and dependencies
  2021-01-22 19:16 ` [PATCH v3 4/5] arm: dts: ls1028a: Add Ethernet switch node and dependencies Vladimir Oltean
@ 2021-01-22 21:25   ` Michael Walle
  0 siblings, 0 replies; 10+ messages in thread
From: Michael Walle @ 2021-01-22 21:25 UTC (permalink / raw)
  To: u-boot

Am 2021-01-22 20:16, schrieb Vladimir Oltean:
> From: Alex Marginean <alexandru.marginean@nxp.com>
> 
> The definition follows the DSA binding in kernel and describes the 
> switch,
> its ports and PHYs.  The switch node has the same structure as in Linux
> and this patch enables it (and relevant ports) for the LS1028A RDB 
> board.
> 
> ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it 
> is
> not used in U-Boot and was disabled.  Ethernet port aliases were also
> added to better manage the multitude of ports available now.
> 
> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>

you missed my:

Reviewed-by: Michael Walle <michael@walle.cc>

-michael

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 5/5] configs: ls1028a: Enable the Ethernet switch driver in defconfig
  2021-01-22 19:16 ` [PATCH v3 5/5] configs: ls1028a: Enable the Ethernet switch driver in defconfig Vladimir Oltean
@ 2021-01-22 21:25   ` Michael Walle
  0 siblings, 0 replies; 10+ messages in thread
From: Michael Walle @ 2021-01-22 21:25 UTC (permalink / raw)
  To: u-boot

Am 2021-01-22 20:16, schrieb Vladimir Oltean:
> From: Alex Marginean <alexandru.marginean@nxp.com>
> 
> The switch driver for LS1028A Ethernet switch is now compiled in for
> the NXP LS1028A reference design boards and for the Kontron 
> SMARC-sAL28.
> 
> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
> v3: enable the config options for the Kontron board too.

For the Kontron board:

Acked-by: Michael Walle <michael@walle.cc>

> 
> v2: none
> 
>  configs/kontron_sl28_defconfig               | 2 ++
>  configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 ++
>  configs/ls1028aqds_tfa_defconfig             | 2 ++
>  configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 2 ++
>  configs/ls1028ardb_tfa_defconfig             | 2 ++
>  5 files changed, 10 insertions(+)
> 
> diff --git a/configs/kontron_sl28_defconfig 
> b/configs/kontron_sl28_defconfig
> index c1a096799c2c..b295912f7d4a 100644
> --- a/configs/kontron_sl28_defconfig
> +++ b/configs/kontron_sl28_defconfig
> @@ -82,6 +82,8 @@ CONFIG_DM_MDIO=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
>  CONFIG_FSL_ENETC=y
> +CONFIG_DM_DSA=y
> +CONFIG_MSCC_FELIX_SWITCH=y
>  CONFIG_NVME=y
>  CONFIG_PCI=y
>  CONFIG_DM_PCI=y
> diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> index 14c49cd0d6f7..43ddcf916648 100644
> --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
> @@ -61,6 +61,8 @@ CONFIG_DM_MDIO_MUX=y
>  CONFIG_E1000=y
>  CONFIG_FSL_ENETC=y
>  CONFIG_MDIO_MUX_I2CREG=y
> +CONFIG_DM_DSA=y
> +CONFIG_MSCC_FELIX_SWITCH=y
>  CONFIG_NVME=y
>  CONFIG_PCI=y
>  CONFIG_DM_PCI=y
> diff --git a/configs/ls1028aqds_tfa_defconfig 
> b/configs/ls1028aqds_tfa_defconfig
> index 09a692370876..c790e994853b 100644
> --- a/configs/ls1028aqds_tfa_defconfig
> +++ b/configs/ls1028aqds_tfa_defconfig
> @@ -67,6 +67,8 @@ CONFIG_DM_MDIO_MUX=y
>  CONFIG_E1000=y
>  CONFIG_FSL_ENETC=y
>  CONFIG_MDIO_MUX_I2CREG=y
> +CONFIG_DM_DSA=y
> +CONFIG_MSCC_FELIX_SWITCH=y
>  CONFIG_NVME=y
>  CONFIG_PCI=y
>  CONFIG_DM_PCI=y
> diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> index b034580aeff6..8b9e217c61c9 100644
> --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
> @@ -58,6 +58,8 @@ CONFIG_DM_MDIO=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
>  CONFIG_FSL_ENETC=y
> +CONFIG_DM_DSA=y
> +CONFIG_MSCC_FELIX_SWITCH=y
>  CONFIG_NVME=y
>  CONFIG_PCI=y
>  CONFIG_DM_PCI=y
> diff --git a/configs/ls1028ardb_tfa_defconfig 
> b/configs/ls1028ardb_tfa_defconfig
> index 4bed352420a0..aa82719e5e21 100644
> --- a/configs/ls1028ardb_tfa_defconfig
> +++ b/configs/ls1028ardb_tfa_defconfig
> @@ -64,6 +64,8 @@ CONFIG_DM_MDIO=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
>  CONFIG_FSL_ENETC=y
> +CONFIG_DM_DSA=y
> +CONFIG_MSCC_FELIX_SWITCH=y
>  CONFIG_NVME=y
>  CONFIG_PCI=y
>  CONFIG_DM_PCI=y

-- 
-michael

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 1/5] net: Introduce DSA class for Ethernet switches
  2021-01-22 19:16 ` [PATCH v3 1/5] net: Introduce DSA class for Ethernet switches Vladimir Oltean
@ 2021-01-22 21:30   ` Michael Walle
  2021-01-22 22:24     ` Vladimir Oltean
  0 siblings, 1 reply; 10+ messages in thread
From: Michael Walle @ 2021-01-22 21:30 UTC (permalink / raw)
  To: u-boot

Am 2021-01-22 20:16, schrieb Vladimir Oltean:
> From: Claudiu Manoil <claudiu.manoil@nxp.com>
> 
> DSA stands for Distributed Switch Architecture and it covers switches 
> that
> are connected to the CPU through an Ethernet link and generally use 
> frame
> tags to pass information about the source/destination ports to/from 
> CPU.
> Front panel ports are presented as regular ethernet devices in U-Boot 
> and
> they are expected to support the typical networking commands.
> DSA switches may be cascaded, DSA class code does not currently support
> this.
> 
> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
> v3:
> - Removed all infrastructure associated with dsa_foreach_port, which
>   is no longer needed.
> - Only inherit the DSA master's MAC address if the environment does not
>   already have a specific MAC address that should be used for the DSA
>   port.
> - Be compatible with the new "ethernet-ports" container name which has
>   been introduced in the Linux kernel as commit 85e05d263ed2 ("net: 
> dsa:
>   of: Allow ethernet-ports as encapsulating node") in v5.9.
> 
> v2: none
> 
>  drivers/net/Kconfig    |  14 ++
>  include/dm/uclass-id.h |   1 +
>  include/net.h          |   6 +
>  include/net/dsa.h      | 163 ++++++++++++++
>  net/Makefile           |   1 +
>  net/dsa-uclass.c       | 470 +++++++++++++++++++++++++++++++++++++++++
>  6 files changed, 655 insertions(+)
>  create mode 100644 include/net/dsa.h
>  create mode 100644 net/dsa-uclass.c
> 
> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
> index 3a5e03688059..382224d04c6e 100644
> --- a/drivers/net/Kconfig
> +++ b/drivers/net/Kconfig
> @@ -37,6 +37,20 @@ config DM_MDIO_MUX
>  	  This is currently implemented in net/mdio-mux-uclass.c
>  	  Look in include/miiphy.h for details.
> 
> +config DM_DSA
> +	bool "Enable Driver Model for DSA switches"
> +	depends on DM_ETH && DM_MDIO
> +	help
> +	  Enable driver model for DSA switches
> +
> +	  Adds UCLASS_DSA class supporting switches that follow the 
> Distributed
> +	  Switch Architecture (DSA).  These switches rely on the presence of 
> a
> +	  management switch port connected to an Ethernet controller capable 
> of
> +	  receiving frames from the switch.  This host Ethernet controller is
> +	  called the "master" Ethernet interface in DSA terminology.
> +	  This is currently implemented in net/dsa-uclass.c, refer to
> +	  include/net/dsa.h for API details.
> +
>  config MDIO_SANDBOX
>  	depends on DM_MDIO && SANDBOX
>  	default y
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
> index ae4425d7a57a..d75de368c5a8 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -46,6 +46,7 @@ enum uclass_id {
>  	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
>  	UCLASS_DSI_HOST,	/* Display Serial Interface host */
>  	UCLASS_DMA,		/* Direct Memory Access */
> +	UCLASS_DSA,		/* Distributed (Ethernet) Switch Architecture */
>  	UCLASS_EFI,		/* EFI managed devices */
>  	UCLASS_ETH,		/* Ethernet device */
>  	UCLASS_ETH_PHY,		/* Ethernet PHY device */
> diff --git a/include/net.h b/include/net.h
> index 13da69b7c145..b95d6a6f60eb 100644
> --- a/include/net.h
> +++ b/include/net.h
> @@ -499,7 +499,13 @@ struct icmp_hdr {
>   * maximum packet size and multiple of 32 bytes =  1536
>   */
>  #define PKTSIZE			1522
> +#ifndef CONFIG_DM_DSA
>  #define PKTSIZE_ALIGN		1536
> +#else
> +/* Maximum DSA tagging overhead (headroom and/or tailroom) */
> +#define DSA_MAX_OVR		256
> +#define PKTSIZE_ALIGN		(1536 + DSA_MAX_OVR)
> +#endif
> 
>  /*
>   * Maximum receive ring size; that is, the number of packets
> diff --git a/include/net/dsa.h b/include/net/dsa.h
> new file mode 100644
> index 000000000000..18bc7ffbe470
> --- /dev/null
> +++ b/include/net/dsa.h
> @@ -0,0 +1,163 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2019-2021 NXP Semiconductors
> + */
> +
> +#ifndef __DSA_H__
> +#define __DSA_H__
> +
> +#include <phy.h>
> +#include <net.h>
> +
> +/**
> + * DSA stands for Distributed Switch Architecture and it is 
> infrastructure
> + * intended to support drivers for Switches that rely on an 
> intermediary
> + * Ethernet device for I/O.  These switches may support cascading 
> allowing
> + * them to be arranged as a tree.
> + * DSA is documented in detail in the Linux kernel documentation under
> + * Documentation/networking/dsa/dsa.txt
> + * The network layout of such a switch is shown below:
> + *
> + *                      |------|
> + *                      | eth0 | <--- master eth device (regular eth 
> driver)
> + *                      |------|
> + *                        ^  |
> + * tag added by switch -->|  |
> + *                        |  |
> + *                        |  |<-- tag added by DSA driver
> + *                        |  v
> + *      |--------------------------------------|
> + *      |             | CPU port |             | <-- DSA (switch) 
> device
> + *      |             ------------             |     (DSA driver)
> + *      | _________  _________       _________ |
> + *      | | port0 |  | port1 |  ...  | portn | | <-- ports as eth 
> devices
> + *      |-+-------+--+-------+-------+-------+-|     ('dsa-port' eth 
> driver)
> + *
> + * In U-Boot the intent is to allow access to front panel ports (shown 
> at the
> + * bottom of the picture) through the master Ethernet dev (eth0 in
> the picture).
> + * Front panel ports are presented as regular Ethernet devices in 
> U-Boot and
> + * they are expected to support the typical networking commands.
> + * In general DSA switches require the use of tags, extra headers 
> added both by
> + * software on Tx and by the switch on Rx.  These tags carry at a 
> minimum port
> + * information and switch information for cascaded set-ups.
> + * In U-Boot these tags are inserted and parsed by the DSA switch 
> driver, the
> + * class code helps with headroom/tailroom for the extra headers.
> + *
> + * TODO:
> + * - handle switch cascading, for now U-Boot only supports
> stand-alone switches.
> + * - Add support to probe DSA switches connected to a MDIO bus, this 
> is needed
> + * to convert switch drivers that are now under drivers/net/phy.
> + */
> +
> +#define DSA_PORT_NAME_LENGTH	16
> +
> +/* Maximum number of ports each DSA device can have */
> +#define DSA_MAX_PORTS		12
> +
> +/**
> + * struct dsa_ops - DSA operations
> + *
> + * @port_enable:  Initialize a switch port for I/O.
> + * @port_disable: Disable I/O for a port.
> + * @xmit:         Insert the DSA tag for transmission.
> + *                DSA drivers receive a copy of the packet with 
> headroom and
> + *                tailroom reserved and set to 0. 'packet' points to 
> headroom
> + *                and 'length' is updated to include both head and 
> tailroom.
> + * @rcv:          Process the DSA tag on reception and return the port 
> index
> + *                from the h/w provided tag. Return the index via 
> 'portp'.
> + *                'packet' and 'length' describe the frame as received 
> from
> + *                master including any additional headers.
> + */
> +struct dsa_ops {
> +	int (*port_enable)(struct udevice *dev, int port,
> +			   struct phy_device *phy);
> +	void (*port_disable)(struct udevice *dev, int port,
> +			     struct phy_device *phy);
> +	int (*xmit)(struct udevice *dev, int port, void *packet, int length);
> +	int (*rcv)(struct udevice *dev, int *portp, void *packet, int 
> length);
> +};
> +
> +#define dsa_get_ops(dev) ((struct dsa_ops *)(dev)->driver->ops)
> +
> +/**
> + * struct dsa_port_pdata - DSA port platform data
> + *
> + * @phy:   PHY device associated with this port.
> + *         The uclass code attempts to set this field for all ports 
> except CPU
> + *         port, based on DT information.  It may be NULL.
> + * @index: Port index in the DSA switch, set by the uclass code.
> + * @name:  Name of the port Eth device.  If a label property is 
> present in the
> + *         port DT node, it is used as name.
> + */
> +struct dsa_port_pdata {
> +	struct phy_device *phy;
> +	u32 index;
> +	char name[DSA_PORT_NAME_LENGTH];
> +};
> +
> +/**
> + * struct dsa_pdata - Per-device platform data for DSA DM
> + *
> + * @num_ports:   Number of ports the device has, must be <= 
> DSA_MAX_PORTS.
> + *		 This number is extracted from the DT 'ports' node of this
> + *		 DSA device, and it counts the CPU port and all the other
> + *		 port subnodes including the disabled ones.
> + * @cpu_port:    Index of the switch port linked to the master 
> Ethernet.
> + *		 The uclass code sets this based on DT information.
> + * @master_node: DT node of the master Ethernet.
> + */
> +struct dsa_pdata {
> +	int num_ports;
> +	u32 cpu_port;
> +	ofnode master_node;
> +};
> +
> +/**
> + * dsa_set_tagging() - Configure the headroom and/or tailroom sizes
> + *
> + * The DSA class code allocates headroom and tailroom on Tx before
> + * calling the DSA driver's xmit function.
> + * All drivers must call this at probe time.
> + *
> + * @dev:	DSA device pointer
> + * @headroom:	Size, in bytes, of headroom needed for the DSA tag.
> + * @tailroom:	Size, in bytes, of tailroom needed for the DSA tag.
> + *		Total headroom and tailroom size should not exceed
> + *		DSA_MAX_OVR.
> + * @return 0 if OK, -ve on error
> + */
> +int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort 
> tailroom);
> +
> +/* DSA helpers */
> +
> +/**
> + * dsa_get_master() - Return a reference to the master Ethernet device
> + *
> + * Can be called at driver probe time or later.
> + *
> + * @dev:	DSA device pointer
> + * @return Master Eth 'udevice' pointer if OK, NULL on error
> + */
> +struct udevice *dsa_get_master(struct udevice *dev);
> +
> +/**
> + * dsa_port_get_pdata() - Helper that returns the platdata of an 
> active
> + *			(non-CPU) DSA port device.
> + *
> + * Can be called at driver probe time or later.
> + *
> + * @pdev:	DSA port device pointer
> + * @return 'dsa_port_pdata' pointer if OK, NULL on error
> + */
> +static inline struct dsa_port_pdata *
> +	dsa_port_get_pdata(struct udevice *pdev)
> +{
> +	struct eth_pdata *eth = dev_get_plat(pdev);
> +
> +	if (!eth)
> +		return NULL;
> +
> +	return eth->priv_pdata;
> +}
> +
> +#endif /* __DSA_H__ */
> diff --git a/net/Makefile b/net/Makefile
> index 76527f704c47..fb3eba840fff 100644
> --- a/net/Makefile
> +++ b/net/Makefile
> @@ -9,6 +9,7 @@ obj-$(CONFIG_NET)      += arp.o
>  obj-$(CONFIG_CMD_BOOTP) += bootp.o
>  obj-$(CONFIG_CMD_CDP)  += cdp.o
>  obj-$(CONFIG_CMD_DNS)  += dns.o
> +obj-$(CONFIG_DM_DSA)   += dsa-uclass.o
>  ifdef CONFIG_DM_ETH
>  obj-$(CONFIG_NET)      += eth-uclass.o
>  else
> diff --git a/net/dsa-uclass.c b/net/dsa-uclass.c
> new file mode 100644
> index 000000000000..f60e06b00f57
> --- /dev/null
> +++ b/net/dsa-uclass.c
> @@ -0,0 +1,470 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2019-2021 NXP
> + */
> +
> +#include <net/dsa.h>
> +#include <dm/lists.h>
> +#include <dm/device_compat.h>
> +#include <dm/device-internal.h>
> +#include <dm/uclass-internal.h>
> +#include <linux/bitmap.h>
> +#include <miiphy.h>
> +
> +#define DSA_PORT_CHILD_DRV_NAME "dsa-port"
> +
> +/* per-device internal state structure */
> +struct dsa_priv {
> +	struct udevice *master_dev;
> +	int num_ports;
> +	u32 cpu_port;
> +	int headroom;
> +	int tailroom;
> +};
> +
> +/* external API */
> +int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort 
> tailroom)
> +{
> +	struct dsa_priv *priv;
> +
> +	if (!dev || !dev_get_uclass_priv(dev))
> +		return -ENODEV;
> +
> +	if (headroom + tailroom > DSA_MAX_OVR)
> +		return -EINVAL;
> +
> +	priv = dev_get_uclass_priv(dev);
> +
> +	if (headroom > 0)
> +		priv->headroom = headroom;
> +	if (tailroom > 0)
> +		priv->tailroom = tailroom;
> +
> +	return 0;
> +}
> +
> +/* returns the DSA master Ethernet device */
> +struct udevice *dsa_get_master(struct udevice *dev)
> +{
> +	struct dsa_priv *priv = dev_get_uclass_priv(dev);
> +
> +	if (!priv)
> +		return NULL;
> +
> +	return priv->master_dev;
> +}
> +
> +/*
> + * Start the desired port, the CPU port and the master Eth interface.
> + * TODO: if cascaded we may need to _start ports in other switches too
> + */
> +static int dsa_port_start(struct udevice *pdev)
> +{
> +	struct udevice *dev = dev_get_parent(pdev);
> +	struct dsa_priv *priv = dev_get_uclass_priv(dev);
> +	struct udevice *master = dsa_get_master(dev);
> +	struct dsa_ops *ops = dsa_get_ops(dev);
> +	int err;
> +
> +	if (!priv)
> +		return -ENODEV;
> +
> +	if (!master) {
> +		dev_err(pdev, "DSA master Ethernet device not found!\n");
> +		return -EINVAL;
> +	}
> +
> +	if (ops->port_enable) {
> +		struct dsa_port_pdata *port_pdata;
> +
> +		port_pdata = dev_get_parent_plat(pdev);
> +		err = ops->port_enable(dev, port_pdata->index,
> +				       port_pdata->phy);
> +		if (err)
> +			return err;
> +
> +		err = ops->port_enable(dev, priv->cpu_port, NULL);

This will lead to a NULL pointer dereference in felix_port_enable()
when accessing the phy. Although somehow (due to caching?) u-boot
won't panic until reaching board_phy_config() (the weak one in
drivers/net/phy/phy.c).

-michael

> +		if (err)
> +			return err;
> +	}
> +
> +	return eth_get_ops(master)->start(master);
> +}
> +
> +/* Stop the desired port, the CPU port and the master Eth interface */
> +static void dsa_port_stop(struct udevice *pdev)
> +{
> +	struct udevice *dev = dev_get_parent(pdev);
> +	struct dsa_priv *priv = dev_get_uclass_priv(dev);
> +	struct udevice *master = dsa_get_master(dev);
> +	struct dsa_ops *ops = dsa_get_ops(dev);
> +
> +	if (!priv)
> +		return;
> +
> +	if (ops->port_disable) {
> +		struct dsa_port_pdata *port_pdata;
> +
> +		port_pdata = dev_get_parent_plat(pdev);
> +		ops->port_disable(dev, port_pdata->index, port_pdata->phy);
> +		ops->port_disable(dev, priv->cpu_port, NULL);
> +	}
> +
> +	/*
> +	 * stop master only if it's active, don't probe it otherwise.
> +	 * Under normal usage it would be active because we're using it, but
> +	 * during tear-down it may have been removed ahead of us.
> +	 */
> +	if (master && device_active(master))
> +		eth_get_ops(master)->stop(master);
> +}
> +
> +/*
> + * Insert a DSA tag and call master Ethernet send on the resulting 
> packet
> + * We copy the frame to a stack buffer where we have reserved headroom 
> and
> + * tailroom space.  Headroom and tailroom are set to 0.
> + */
> +static int dsa_port_send(struct udevice *pdev, void *packet, int 
> length)
> +{
> +	struct udevice *dev = dev_get_parent(pdev);
> +	struct dsa_priv *priv = dev_get_uclass_priv(dev);
> +	int head = priv->headroom, tail = priv->tailroom;
> +	struct udevice *master = dsa_get_master(dev);
> +	struct dsa_ops *ops = dsa_get_ops(dev);
> +	uchar dsa_packet_tmp[PKTSIZE_ALIGN];
> +	struct dsa_port_pdata *port_pdata;
> +	int err;
> +
> +	if (!master)
> +		return -EINVAL;
> +
> +	if (length + head + tail > PKTSIZE_ALIGN)
> +		return -EINVAL;
> +
> +	memset(dsa_packet_tmp, 0, head);
> +	memset(dsa_packet_tmp + head + length, 0, tail);
> +	memcpy(dsa_packet_tmp + head, packet, length);
> +	length += head + tail;
> +	/* copy back to preserve original buffer alignment */
> +	memcpy(packet, dsa_packet_tmp, length);
> +
> +	port_pdata = dev_get_parent_plat(pdev);
> +	err = ops->xmit(dev, port_pdata->index, packet, length);
> +	if (err)
> +		return err;
> +
> +	return eth_get_ops(master)->send(master, packet, length);
> +}
> +
> +/* Receive a frame from master Ethernet, process it and pass it on */
> +static int dsa_port_recv(struct udevice *pdev, int flags, uchar 
> **packetp)
> +{
> +	struct udevice *dev = dev_get_parent(pdev);
> +	struct dsa_priv *priv = dev_get_uclass_priv(dev);
> +	int head = priv->headroom, tail = priv->tailroom;
> +	struct udevice *master = dsa_get_master(dev);
> +	struct dsa_ops *ops = dsa_get_ops(dev);
> +	struct dsa_port_pdata *port_pdata;
> +	int length, port_index, err;
> +
> +	if (!master)
> +		return -EINVAL;
> +
> +	length = eth_get_ops(master)->recv(master, flags, packetp);
> +	if (length <= 0)
> +		return length;
> +
> +	/*
> +	 * If we receive frames from a different port or frames that DSA 
> driver
> +	 * doesn't like we discard them here.
> +	 * In case of discard we return with no frame and expect to be called
> +	 * again instead of looping here, so upper layer can deal with 
> timeouts.
> +	 */
> +	port_pdata = dev_get_parent_plat(pdev);
> +	err = ops->rcv(dev, &port_index, *packetp, length);
> +	if (err || port_index != port_pdata->index || (length <= head + 
> tail)) {
> +		if (eth_get_ops(master)->free_pkt)
> +			eth_get_ops(master)->free_pkt(master, *packetp, length);
> +		return -EAGAIN;
> +	}
> +
> +	/*
> +	 * We move the pointer over headroom here to avoid a copy.  If 
> free_pkt
> +	 * gets called we move the pointer back before calling master 
> free_pkt.
> +	 */
> +	*packetp += head;
> +
> +	return length - head - tail;
> +}
> +
> +static int dsa_port_free_pkt(struct udevice *pdev, uchar *packet, int 
> length)
> +{
> +	struct udevice *dev = dev_get_parent(pdev);
> +	struct udevice *master = dsa_get_master(dev);
> +	struct dsa_priv *priv;
> +
> +	if (!master)
> +		return -EINVAL;
> +
> +	priv = dev_get_uclass_priv(dev);
> +	if (eth_get_ops(master)->free_pkt) {
> +		/* return the original pointer and length to master Eth */
> +		packet -= priv->headroom;
> +		length += priv->headroom - priv->tailroom;
> +
> +		return eth_get_ops(master)->free_pkt(master, packet, length);
> +	}
> +
> +	return 0;
> +}
> +
> +static int dsa_port_of_to_pdata(struct udevice *pdev)
> +{
> +	struct dsa_port_pdata *port_pdata;
> +	struct dsa_pdata *dsa_pdata;
> +	struct eth_pdata *eth_pdata;
> +	struct udevice *dev;
> +	const char *label;
> +	u32 index;
> +	int err;
> +
> +	if (!pdev)
> +		return -ENODEV;
> +
> +	err = ofnode_read_u32(dev_ofnode(pdev), "reg", &index);
> +	if (err)
> +		return err;
> +
> +	dev = dev_get_parent(pdev);
> +	dsa_pdata = dev_get_uclass_plat(dev);
> +
> +	port_pdata = dev_get_parent_plat(pdev);
> +	port_pdata->index = index;
> +
> +	label = ofnode_read_string(dev_ofnode(pdev), "label");
> +	if (label)
> +		strncpy(port_pdata->name, label, DSA_PORT_NAME_LENGTH);
> +
> +	eth_pdata = dev_get_plat(pdev);
> +	eth_pdata->priv_pdata = port_pdata;
> +
> +	dev_dbg(pdev, "port %d node %s\n", port_pdata->index,
> +		ofnode_get_name(dev_ofnode(pdev)));
> +
> +	return 0;
> +}
> +
> +static const struct eth_ops dsa_port_ops = {
> +	.start		= dsa_port_start,
> +	.send		= dsa_port_send,
> +	.recv		= dsa_port_recv,
> +	.stop		= dsa_port_stop,
> +	.free_pkt	= dsa_port_free_pkt,
> +};
> +
> +static int dsa_port_probe(struct udevice *pdev)
> +{
> +	struct udevice *dev = dev_get_parent(pdev);
> +	struct eth_pdata *eth_pdata, *master_pdata;
> +	unsigned char env_enetaddr[ARP_HLEN];
> +	struct dsa_port_pdata *port_pdata;
> +	struct dsa_priv *dsa_priv;
> +	struct udevice *master;
> +
> +	port_pdata = dev_get_parent_plat(pdev);
> +	dsa_priv = dev_get_uclass_priv(dev);
> +
> +	port_pdata->phy = dm_eth_phy_connect(pdev);
> +
> +	/*
> +	 * Inherit port's hwaddr from the DSA master, unless the port already
> +	 * has a unique MAC address specified in the environment.
> +	 */
> +	eth_env_get_enetaddr_by_index("eth", dev_seq(pdev), env_enetaddr);
> +	if (!is_zero_ethaddr(env_enetaddr))
> +		return 0;
> +
> +	master = dsa_get_master(dev);
> +	if (!master)
> +		return 0;
> +
> +	master_pdata = dev_get_plat(master);
> +	eth_pdata = dev_get_plat(pdev);
> +	memcpy(eth_pdata->enetaddr, master_pdata->enetaddr, ARP_HLEN);
> +	eth_env_set_enetaddr_by_index("eth", dev_seq(pdev),
> +				      master_pdata->enetaddr);
> +
> +	return 0;
> +}
> +
> +static int dsa_port_remove(struct udevice *pdev)
> +{
> +	struct udevice *dev = dev_get_parent(pdev);
> +	struct dsa_port_pdata *port_pdata;
> +	struct dsa_priv *dsa_priv;
> +
> +	port_pdata = dev_get_parent_plat(pdev);
> +	dsa_priv = dev_get_uclass_priv(dev);
> +
> +	port_pdata->phy = NULL;
> +
> +	return 0;
> +}
> +
> +U_BOOT_DRIVER(dsa_port) = {
> +	.name	= DSA_PORT_CHILD_DRV_NAME,
> +	.id	= UCLASS_ETH,
> +	.ops	= &dsa_port_ops,
> +	.probe	= dsa_port_probe,
> +	.remove	= dsa_port_remove,
> +	.of_to_plat = dsa_port_of_to_pdata,
> +	.plat_auto = sizeof(struct eth_pdata),
> +};
> +
> +/*
> + * This function mostly deals with pulling information out of the 
> device tree
> + * into the pdata structure.
> + * It goes through the list of switch ports, registers an eth device 
> for each
> + * front panel port and identifies the cpu port connected to master 
> eth device.
> + * TODO: support cascaded switches
> + */
> +static int dsa_post_bind(struct udevice *dev)
> +{
> +	struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
> +	ofnode node = dev_ofnode(dev), pnode;
> +	int i, err, first_err = 0;
> +
> +	if (!pdata || !ofnode_valid(node))
> +		return -ENODEV;
> +
> +	pdata->master_node = ofnode_null();
> +
> +	node = ofnode_find_subnode(node, "ports");
> +	if (!ofnode_valid(node))
> +		node = ofnode_find_subnode(node, "ethernet-ports");
> +	if (!ofnode_valid(node)) {
> +		dev_err(dev, "ports node is missing under DSA device!\n");
> +		return -EINVAL;
> +	}
> +
> +	pdata->num_ports = ofnode_get_child_count(node);
> +	if (pdata->num_ports <= 0 || pdata->num_ports > DSA_MAX_PORTS) {
> +		dev_err(dev, "invalid number of ports (%d)\n",
> +			pdata->num_ports);
> +		return -EINVAL;
> +	}
> +
> +	/* look for the CPU port */
> +	ofnode_for_each_subnode(pnode, node) {
> +		u32 ethernet;
> +
> +		if (ofnode_read_u32(pnode, "ethernet", &ethernet))
> +			continue;
> +
> +		pdata->master_node = ofnode_get_by_phandle(ethernet);
> +		break;
> +	}
> +
> +	if (!ofnode_valid(pdata->master_node)) {
> +		dev_err(dev, "master eth node missing!\n");
> +		return -EINVAL;
> +	}
> +
> +	if (ofnode_read_u32(pnode, "reg", &pdata->cpu_port)) {
> +		dev_err(dev, "CPU port node not valid!\n");
> +		return -EINVAL;
> +	}
> +
> +	dev_dbg(dev, "master node %s on port %d\n",
> +		ofnode_get_name(pdata->master_node), pdata->cpu_port);
> +
> +	for (i = 0; i < pdata->num_ports; i++) {
> +		char name[DSA_PORT_NAME_LENGTH];
> +		struct udevice *pdev;
> +
> +		/*
> +		 * If this is the CPU port don't register it as an ETH device,
> +		 * we skip it on purpose since I/O to/from it from the CPU
> +		 * isn't useful
> +		 * TODO: cpu port may have a PHY and we don't handle that yet.
> +		 */
> +		if (i == pdata->cpu_port)
> +			continue;
> +
> +		/*
> +		 * Set up default port names.  If present, DT port labels
> +		 * will override the default port names.
> +		 */
> +		snprintf(name, DSA_PORT_NAME_LENGTH, "%s@%d", dev->name, i);
> +
> +		ofnode_for_each_subnode(pnode, node) {
> +			u32 reg;
> +
> +			if (ofnode_read_u32(pnode, "reg", &reg))
> +				continue;
> +
> +			if (reg == i)
> +				break;
> +		}
> +
> +		/*
> +		 * skip registration if port id not found or if the port
> +		 * is explicitly disabled in DT
> +		 */
> +		if (!ofnode_valid(pnode) || !ofnode_is_available(pnode))
> +			continue;
> +
> +		err = device_bind_driver_to_node(dev, DSA_PORT_CHILD_DRV_NAME,
> +						 name, pnode, &pdev);
> +		if (pdev) {
> +			struct dsa_port_pdata *port_pdata;
> +
> +			port_pdata = dev_get_parent_plat(pdev);
> +			strncpy(port_pdata->name, name, DSA_PORT_NAME_LENGTH);
> +			pdev->name = port_pdata->name;
> +		}
> +
> +		/* try to bind all ports but keep 1st error */
> +		if (err && !first_err)
> +			first_err = err;
> +	}
> +
> +	if (first_err)
> +		return first_err;
> +
> +	dev_dbg(dev, "DSA ports successfully bound\n");
> +
> +	return 0;
> +}
> +
> +/**
> + * Initialize the uclass per device internal state structure (priv).
> + * TODO: pick up references to other switch devices here, if we're 
> cascaded.
> + */
> +static int dsa_pre_probe(struct udevice *dev)
> +{
> +	struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
> +	struct dsa_priv *priv = dev_get_uclass_priv(dev);
> +
> +	if (!pdata || !priv)
> +		return -ENODEV;
> +
> +	priv->num_ports = pdata->num_ports;
> +	priv->cpu_port = pdata->cpu_port;
> +
> +	if (ofnode_valid(pdata->master_node))
> +		uclass_find_device_by_ofnode(UCLASS_ETH, pdata->master_node,
> +					     &priv->master_dev);
> +	return 0;
> +}
> +
> +UCLASS_DRIVER(dsa) = {
> +	.id = UCLASS_DSA,
> +	.name = "dsa",
> +	.post_bind = dsa_post_bind,
> +	.pre_probe = dsa_pre_probe,
> +	.per_device_auto = sizeof(struct dsa_priv),
> +	.per_device_plat_auto = sizeof(struct dsa_pdata),
> +	.per_child_plat_auto = sizeof(struct dsa_port_pdata),
> +	.flags = DM_UC_FLAG_SEQ_ALIAS,
> +};

-- 
-michael

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v3 1/5] net: Introduce DSA class for Ethernet switches
  2021-01-22 21:30   ` Michael Walle
@ 2021-01-22 22:24     ` Vladimir Oltean
  0 siblings, 0 replies; 10+ messages in thread
From: Vladimir Oltean @ 2021-01-22 22:24 UTC (permalink / raw)
  To: u-boot

On Fri, Jan 22, 2021 at 10:30:48PM +0100, Michael Walle wrote:
> > +	if (ops->port_enable) {
> > +		struct dsa_port_pdata *port_pdata;
> > +
> > +		port_pdata = dev_get_parent_plat(pdev);
> > +		err = ops->port_enable(dev, port_pdata->index,
> > +				       port_pdata->phy);
> > +		if (err)
> > +			return err;
> > +
> > +		err = ops->port_enable(dev, priv->cpu_port, NULL);
>
> This will lead to a NULL pointer dereference in felix_port_enable()
> when accessing the phy. Although somehow (due to caching?) u-boot
> won't panic until reaching board_phy_config() (the weak one in
> drivers/net/phy/phy.c).

Weird that this never panicked for me. Also, it must be annoying to
debug a panic in board_phy_config() due to a bad dereference in
felix_start_pcs...

Also, I didn't think we'd reach such fundamental questions about DSA so
soon, but nonetheless, here we are. We don't have a struct phy_device
for the CPU port because we can't call phy_connect, because we don't
have an udevice for the CPU port, because we don't want to present it as
an UCLASS_ETH to anybody, because the user won't actually be able to use
it for traffic. That has been beaten to death already, the question is
what we can do here.

I would hate to inflict upon drivers the pain of checking for a NULL
pointer for the phy_device. It's also not only the checking that's
missing. It's actual information that's missing - we don't know if we
need to set up a 10G port, or 1G, or 100M port. So keeping the phy
argument as NULL is really off the table.

The DSA master should always have a fixed-link stanza at the very least,
no? And phy_connect_fixed fabricates an actual phy_device for that
fixed-link, that we could harvest for the speed, duplex and
phy_interface_t (well, _almost_ for the latter, we'd have to do some
direction reversal for PHY_INTERFACE_MODE_RGMII*, like TXID becomes
RXID, RGMII becomes RGMII_ID...). And this could only ever work for
the fixed-link species of a phy_device. There have been reports from the
people at Bootlin that they were working with some mv88e6xxx switch that
needed an actual struct phy_device in Linux, and phylink/phylib gained
support for working without an attached net device. But that's fairly
odd, so in practice I think it wouldn't be a huge loss if fixed-link is
all we had for the CPU port.

The crux of the problem is that phy_connect needs an udevice to parse
the device tree information from. So it can't just be any udevice, it
must be the udevice bound to the OF node holding the phy-handle and/or
fixed-link stanza. If it could have been any udevice I would have just
passed it the UCLASS_DSA udevice corresponding to the switch itself in a
heartbeat. So if we decided to treat the actual problem, we could:
- Register yet another uclass, something along the lines of
  UCLASS_DSA_HIDDEN_PORT, which will bind to the OF node of the CPU port
  so that we can pass it to dm_eth_phy_connect. I looked at the code
  path and it looks like nobody really cares if it's UCLASS_ETH or not.
  That would inflict some pain to the maintainers of the networking
  code, nonetheless.
- We could simply fabricate a struct phy_device by hand-parsing the
  fixed-link stanza of the CPU port, right where we're skipping over it
  in dsa_post_bind, where we left that damn TODO. We could then keep
  this struct phy_device cpu_phy in struct dsa_priv, not connected to
  any udevice, just fabricated, so that we could pass it to port_enable.
  We'd still be limiting ourselves to just fixed-links though.
- Bite the bullet and register a UCLASS_ETH for the CPU port. It won't
  do anything useful for the user, but it would keep the code simple...

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2021-01-22 22:24 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-22 19:16 [PATCH v3 0/5] Introduce DSA Ethernet switch class and Felix driver Vladimir Oltean
2021-01-22 19:16 ` [PATCH v3 1/5] net: Introduce DSA class for Ethernet switches Vladimir Oltean
2021-01-22 21:30   ` Michael Walle
2021-01-22 22:24     ` Vladimir Oltean
2021-01-22 19:16 ` [PATCH v3 2/5] sandbox: Add a DSA sandbox driver and unit test Vladimir Oltean
2021-01-22 19:16 ` [PATCH v3 3/5] drivers: net: Add Felix DSA switch driver Vladimir Oltean
2021-01-22 19:16 ` [PATCH v3 4/5] arm: dts: ls1028a: Add Ethernet switch node and dependencies Vladimir Oltean
2021-01-22 21:25   ` Michael Walle
2021-01-22 19:16 ` [PATCH v3 5/5] configs: ls1028a: Enable the Ethernet switch driver in defconfig Vladimir Oltean
2021-01-22 21:25   ` Michael Walle

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