* [Intel-gfx] [PATCH v4 2/8] drm/i915: setup the LMEM region
2021-01-27 12:48 [Intel-gfx] [PATCH v4 1/8] drm/i915: make local-memory probing a GT operation Matthew Auld
@ 2021-01-27 12:48 ` Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 3/8] drm/i915: reserve stolen for " Matthew Auld
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Matthew Auld @ 2021-01-27 12:48 UTC (permalink / raw)
To: intel-gfx
Hook up the LMEM region. Addresses will start from zero, and for CPU
access we get LMEM_BAR which is just a 1:1 mapping of said region.
Based on a patch from Michel Thierry.
v2 by Jani:
- use intel_uncore_read/intel_uncore_write
- remove trailing blank line
v3: s/drm_info/drm_dbg for info which in non-pertinent for the user
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_gt.c | 4 ++-
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 35 +++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_region_lmem.h | 2 ++
3 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index edbee9991248..9ac67e0534b7 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -46,7 +46,9 @@ int intel_gt_probe_lmem(struct intel_gt *gt)
int id;
int err;
- mem = intel_gt_setup_fake_lmem(gt);
+ mem = intel_gt_setup_lmem(gt);
+ if (mem == ERR_PTR(-ENODEV))
+ mem = intel_gt_setup_fake_lmem(gt);
if (IS_ERR(mem)) {
err = PTR_ERR(mem);
if (err == -ENODEV)
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index a2401e1fe1a3..b3d1d0abb956 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -142,3 +142,38 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
return mem;
}
+
+static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
+{
+ struct drm_i915_private *i915 = gt->i915;
+ struct pci_dev *pdev = i915->drm.pdev;
+ struct intel_memory_region *mem;
+ resource_size_t io_start;
+ resource_size_t size;
+
+ if (!IS_DGFX(i915))
+ return ERR_PTR(-ENODEV);
+
+ io_start = pci_resource_start(pdev, 2);
+ size = pci_resource_len(pdev, 2);
+
+ mem = intel_memory_region_create(i915,
+ 0,
+ size,
+ I915_GTT_PAGE_SIZE_4K,
+ io_start,
+ &intel_region_lmem_ops);
+ if (!IS_ERR(mem)) {
+ drm_dbg(&i915->drm, "Local memory: %pR\n", &mem->region);
+ drm_dbg(&i915->drm, "Local memory IO start: %pa\n",
+ &mem->io_start);
+ drm_info(&i915->drm, "Local memory available: %pa\n", &size);
+ }
+
+ return mem;
+}
+
+struct intel_memory_region *intel_gt_setup_lmem(struct intel_gt *gt)
+{
+ return setup_lmem(gt);
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.h b/drivers/gpu/drm/i915/gt/intel_region_lmem.h
index a4baa0f077a1..062d0542ae34 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.h
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.h
@@ -8,6 +8,8 @@
struct intel_gt;
+struct intel_memory_region *intel_gt_setup_lmem(struct intel_gt *gt);
+
struct intel_memory_region *
intel_gt_setup_fake_lmem(struct intel_gt *gt);
--
2.26.2
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH v4 3/8] drm/i915: reserve stolen for LMEM region
2021-01-27 12:48 [Intel-gfx] [PATCH v4 1/8] drm/i915: make local-memory probing a GT operation Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 2/8] drm/i915: setup the LMEM region Matthew Auld
@ 2021-01-27 12:48 ` Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 4/8] drm/i915: introduce mem->reserved Matthew Auld
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Matthew Auld @ 2021-01-27 12:48 UTC (permalink / raw)
To: intel-gfx
From: CQ Tang <cq.tang@intel.com>
The lmem region needs to remove the stolen part, which should just be a
case of snipping it off the end.
Signed-off-by: CQ Tang <cq.tang@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 13 +++++++++----
drivers/gpu/drm/i915/i915_reg.h | 2 ++
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index b3d1d0abb956..71bb38706dbf 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -146,20 +146,24 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
+ struct intel_uncore *uncore = gt->uncore;
struct pci_dev *pdev = i915->drm.pdev;
struct intel_memory_region *mem;
resource_size_t io_start;
- resource_size_t size;
+ resource_size_t lmem_size;
if (!IS_DGFX(i915))
return ERR_PTR(-ENODEV);
+ /* Stolen starts from GSMBASE on DG1 */
+ lmem_size = intel_uncore_read64(uncore, GEN12_GSMBASE);
+
io_start = pci_resource_start(pdev, 2);
- size = pci_resource_len(pdev, 2);
+ GEM_BUG_ON(lmem_size > pci_resource_len(pdev, 2));
mem = intel_memory_region_create(i915,
0,
- size,
+ lmem_size,
I915_GTT_PAGE_SIZE_4K,
io_start,
&intel_region_lmem_ops);
@@ -167,7 +171,8 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
drm_dbg(&i915->drm, "Local memory: %pR\n", &mem->region);
drm_dbg(&i915->drm, "Local memory IO start: %pa\n",
&mem->io_start);
- drm_info(&i915->drm, "Local memory available: %pa\n", &size);
+ drm_info(&i915->drm, "Local memory available: %pa\n",
+ &lmem_size);
}
return mem;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aa872446337b..b39b46a974b5 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -12160,6 +12160,8 @@ enum skl_power_gate {
#define GEN12_GLOBAL_MOCS(i) _MMIO(0x4000 + (i) * 4) /* Global MOCS regs */
+#define GEN12_GSMBASE _MMIO(0x108100)
+
/* gamt regs */
#define GEN8_L3_LRA_1_GPGPU _MMIO(0x4dd4)
#define GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW 0x67F1427F /* max/min for LRA1/2 */
--
2.26.2
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH v4 4/8] drm/i915: introduce mem->reserved
2021-01-27 12:48 [Intel-gfx] [PATCH v4 1/8] drm/i915: make local-memory probing a GT operation Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 2/8] drm/i915: setup the LMEM region Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 3/8] drm/i915: reserve stolen for " Matthew Auld
@ 2021-01-27 12:48 ` Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 5/8] drm/i915/dg1: Reserve first 1MB of local memory Matthew Auld
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Matthew Auld @ 2021-01-27 12:48 UTC (permalink / raw)
To: intel-gfx
From: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
In the following patch we need to reserve regions unaccessible to the
driver during initialization, so add mem->reserved for collecting such
regions.
v2: turn into an actual intel_memory_region_reserve api
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_memory_region.c | 14 ++++
drivers/gpu/drm/i915/intel_memory_region.h | 5 ++
.../drm/i915/selftests/intel_memory_region.c | 77 +++++++++++++++++++
3 files changed, 96 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_memory_region.c b/drivers/gpu/drm/i915/intel_memory_region.c
index b1b610bfff09..49d306b5532f 100644
--- a/drivers/gpu/drm/i915/intel_memory_region.c
+++ b/drivers/gpu/drm/i915/intel_memory_region.c
@@ -156,9 +156,22 @@ int intel_memory_region_init_buddy(struct intel_memory_region *mem)
void intel_memory_region_release_buddy(struct intel_memory_region *mem)
{
+ i915_buddy_free_list(&mem->mm, &mem->reserved);
i915_buddy_fini(&mem->mm);
}
+int intel_memory_region_reserve(struct intel_memory_region *mem,
+ u64 offset, u64 size)
+{
+ int ret;
+
+ mutex_lock(&mem->mm_lock);
+ ret = i915_buddy_alloc_range(&mem->mm, &mem->reserved, offset, size);
+ mutex_unlock(&mem->mm_lock);
+
+ return ret;
+}
+
struct intel_memory_region *
intel_memory_region_create(struct drm_i915_private *i915,
resource_size_t start,
@@ -185,6 +198,7 @@ intel_memory_region_create(struct drm_i915_private *i915,
mutex_init(&mem->objects.lock);
INIT_LIST_HEAD(&mem->objects.list);
INIT_LIST_HEAD(&mem->objects.purgeable);
+ INIT_LIST_HEAD(&mem->reserved);
mutex_init(&mem->mm_lock);
diff --git a/drivers/gpu/drm/i915/intel_memory_region.h b/drivers/gpu/drm/i915/intel_memory_region.h
index 6ffc0673f005..d17e4fe3123c 100644
--- a/drivers/gpu/drm/i915/intel_memory_region.h
+++ b/drivers/gpu/drm/i915/intel_memory_region.h
@@ -89,6 +89,8 @@ struct intel_memory_region {
unsigned int id;
char name[8];
+ struct list_head reserved;
+
dma_addr_t remap_addr;
struct {
@@ -113,6 +115,9 @@ void __intel_memory_region_put_pages_buddy(struct intel_memory_region *mem,
struct list_head *blocks);
void __intel_memory_region_put_block_buddy(struct i915_buddy_block *block);
+int intel_memory_region_reserve(struct intel_memory_region *mem,
+ u64 offset, u64 size);
+
struct intel_memory_region *
intel_memory_region_create(struct drm_i915_private *i915,
resource_size_t start,
diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
index ce7adfa3bca0..64348528e1d5 100644
--- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
+++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
@@ -144,6 +144,82 @@ static bool is_contiguous(struct drm_i915_gem_object *obj)
return true;
}
+static int igt_mock_reserve(void *arg)
+{
+ struct intel_memory_region *mem = arg;
+ resource_size_t avail = resource_size(&mem->region);
+ struct drm_i915_gem_object *obj;
+ const u32 chunk_size = SZ_32M;
+ u32 i, offset, count, *order;
+ u64 allocated, cur_avail;
+ I915_RND_STATE(prng);
+ LIST_HEAD(objects);
+ int err = 0;
+
+ if (!list_empty(&mem->reserved)) {
+ pr_err("%s region reserved list is not empty\n", __func__);
+ return -EINVAL;
+ }
+
+ count = avail / chunk_size;
+ order = i915_random_order(count, &prng);
+ if (!order)
+ return 0;
+
+ /* Reserve a bunch of ranges within the region */
+ for (i = 0; i < count; ++i) {
+ u64 start = order[i] * chunk_size;
+ u64 size = i915_prandom_u32_max_state(chunk_size, &prng);
+
+ /* Allow for some really big holes */
+ if (!size)
+ continue;
+
+ size = round_up(size, PAGE_SIZE);
+ offset = igt_random_offset(&prng, 0, chunk_size, size,
+ PAGE_SIZE);
+
+ err = intel_memory_region_reserve(mem, start + offset, size);
+ if (err) {
+ pr_err("%s failed to reserve range", __func__);
+ goto out_close;
+ }
+
+ /* XXX: maybe sanity check the block range here? */
+ avail -= size;
+ }
+
+ /* Try to see if we can allocate from the remaining space */
+ allocated = 0;
+ cur_avail = avail;
+ do {
+ u32 size = i915_prandom_u32_max_state(cur_avail, &prng);
+
+ size = max_t(u32, round_up(size, PAGE_SIZE), PAGE_SIZE);
+ obj = igt_object_create(mem, &objects, size, 0);
+ if (IS_ERR(obj)) {
+ if (PTR_ERR(obj) == -ENXIO)
+ break;
+
+ err = PTR_ERR(obj);
+ goto out_close;
+ }
+ cur_avail -= size;
+ allocated += size;
+ } while (1);
+
+ if (allocated != avail) {
+ pr_err("%s mismatch between allocation and free space", __func__);
+ err = -EINVAL;
+ }
+
+out_close:
+ kfree(order);
+ close_objects(mem, &objects);
+ i915_buddy_free_list(&mem->mm, &mem->reserved);
+ return err;
+}
+
static int igt_mock_contiguous(void *arg)
{
struct intel_memory_region *mem = arg;
@@ -930,6 +1006,7 @@ static int perf_memcpy(void *arg)
int intel_memory_region_mock_selftests(void)
{
static const struct i915_subtest tests[] = {
+ SUBTEST(igt_mock_reserve),
SUBTEST(igt_mock_fill),
SUBTEST(igt_mock_contiguous),
SUBTEST(igt_mock_splintered_region),
--
2.26.2
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH v4 5/8] drm/i915/dg1: Reserve first 1MB of local memory
2021-01-27 12:48 [Intel-gfx] [PATCH v4 1/8] drm/i915: make local-memory probing a GT operation Matthew Auld
` (2 preceding siblings ...)
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 4/8] drm/i915: introduce mem->reserved Matthew Auld
@ 2021-01-27 12:48 ` Matthew Auld
2021-01-27 12:58 ` Chris Wilson
2021-01-27 12:59 ` Chris Wilson
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 6/8] drm/i915: allocate context from LMEM Matthew Auld
` (2 subsequent siblings)
6 siblings, 2 replies; 10+ messages in thread
From: Matthew Auld @ 2021-01-27 12:48 UTC (permalink / raw)
To: intel-gfx
From: Imre Deak <imre.deak@intel.com>
On DG1 A0/B0 steppings the first 1MB of local memory must be reserved.
One reason for this is that the 0xA0000-0xB0000 range is not accessible
by the display, probably since this region is redirected to another
memory location for legacy VGA compatibility.
BSpec: 50586
Testcase: igt/kms_big_fb/linear-64bpp-rotate-0
v2:
- Reserve the memory on B0 as well.
v3: replace DRM_DEBUG/DRM_ERROR with drm_dbg/drm_err
v4: fix the insanity
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 45 +++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 71bb38706dbf..763b21980d74 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -143,6 +143,41 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
return mem;
}
+static bool get_legacy_lowmem_region(struct intel_uncore *uncore,
+ u64 *start, u32 *size)
+{
+ if (!IS_DG1_REVID(uncore->i915, DG1_REVID_A0, DG1_REVID_B0))
+ return false;
+
+ *start = 0;
+ *size = SZ_1M;
+
+ drm_dbg(&uncore->i915->drm, "LMEM: reserved legacy low-memory [0x%llx-0x%llx]\n",
+ *start, *start + *size);
+
+ return true;
+}
+
+static int reserve_lowmem_region(struct intel_uncore *uncore,
+ struct intel_memory_region *mem)
+{
+ u64 reserve_start;
+ u32 reserve_size;
+ int ret;
+
+ if (!get_legacy_lowmem_region(uncore, &reserve_start, &reserve_size))
+ return 0;
+
+ if (!reserve_size)
+ return 0;
+
+ ret = intel_memory_region_reserve(mem, reserve_start, reserve_size);
+ if (ret)
+ drm_err(&uncore->i915->drm, "LMEM: reserving low memory region failed\n");
+
+ return ret;
+}
+
static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
@@ -167,6 +202,16 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
I915_GTT_PAGE_SIZE_4K,
io_start,
&intel_region_lmem_ops);
+ if (!IS_ERR(mem)) {
+ int err;
+
+ err = reserve_lowmem_region(uncore, mem);
+ if (err) {
+ intel_memory_region_put(mem);
+ return ERR_PTR(err);
+ }
+ }
+
if (!IS_ERR(mem)) {
drm_dbg(&i915->drm, "Local memory: %pR\n", &mem->region);
drm_dbg(&i915->drm, "Local memory IO start: %pa\n",
--
2.26.2
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^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [Intel-gfx] [PATCH v4 5/8] drm/i915/dg1: Reserve first 1MB of local memory
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 5/8] drm/i915/dg1: Reserve first 1MB of local memory Matthew Auld
@ 2021-01-27 12:58 ` Chris Wilson
2021-01-27 12:59 ` Chris Wilson
1 sibling, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2021-01-27 12:58 UTC (permalink / raw)
To: Matthew Auld, intel-gfx
Quoting Matthew Auld (2021-01-27 12:48:06)
> From: Imre Deak <imre.deak@intel.com>
>
> On DG1 A0/B0 steppings the first 1MB of local memory must be reserved.
> One reason for this is that the 0xA0000-0xB0000 range is not accessible
> by the display, probably since this region is redirected to another
> memory location for legacy VGA compatibility.
>
> BSpec: 50586
> Testcase: igt/kms_big_fb/linear-64bpp-rotate-0
>
> v2:
> - Reserve the memory on B0 as well.
>
> v3: replace DRM_DEBUG/DRM_ERROR with drm_dbg/drm_err
>
> v4: fix the insanity
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_region_lmem.c | 45 +++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> index 71bb38706dbf..763b21980d74 100644
> --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> @@ -143,6 +143,41 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
> return mem;
> }
>
> +static bool get_legacy_lowmem_region(struct intel_uncore *uncore,
> + u64 *start, u32 *size)
> +{
> + if (!IS_DG1_REVID(uncore->i915, DG1_REVID_A0, DG1_REVID_B0))
> + return false;
> +
> + *start = 0;
> + *size = SZ_1M;
> +
> + drm_dbg(&uncore->i915->drm, "LMEM: reserved legacy low-memory [0x%llx-0x%llx]\n",
> + *start, *start + *size);
> +
> + return true;
> +}
> +
> +static int reserve_lowmem_region(struct intel_uncore *uncore,
> + struct intel_memory_region *mem)
> +{
> + u64 reserve_start;
> + u32 reserve_size;
> + int ret;
> +
> + if (!get_legacy_lowmem_region(uncore, &reserve_start, &reserve_size))
> + return 0;
> +
> + if (!reserve_size)
> + return 0;
We can remove this check now as well since we can be assured it is
handled for us by get_legacy_lowmem_region()
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Intel-gfx] [PATCH v4 5/8] drm/i915/dg1: Reserve first 1MB of local memory
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 5/8] drm/i915/dg1: Reserve first 1MB of local memory Matthew Auld
2021-01-27 12:58 ` Chris Wilson
@ 2021-01-27 12:59 ` Chris Wilson
1 sibling, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2021-01-27 12:59 UTC (permalink / raw)
To: Matthew Auld, intel-gfx
Quoting Matthew Auld (2021-01-27 12:48:06)
> static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
> {
> struct drm_i915_private *i915 = gt->i915;
> @@ -167,6 +202,16 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
> I915_GTT_PAGE_SIZE_4K,
> io_start,
> &intel_region_lmem_ops);
> + if (!IS_ERR(mem)) {
> + int err;
> +
> + err = reserve_lowmem_region(uncore, mem);
> + if (err) {
> + intel_memory_region_put(mem);
> + return ERR_PTR(err);
Just a worry here, are we likely to antagonise Joonas by having multiple
error paths?
-Chris
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v4 6/8] drm/i915: allocate context from LMEM
2021-01-27 12:48 [Intel-gfx] [PATCH v4 1/8] drm/i915: make local-memory probing a GT operation Matthew Auld
` (3 preceding siblings ...)
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 5/8] drm/i915/dg1: Reserve first 1MB of local memory Matthew Auld
@ 2021-01-27 12:48 ` Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 7/8] drm/i915: move engine scratch to LMEM Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 8/8] drm/i915: allocate cmd ring in lmem Matthew Auld
6 siblings, 0 replies; 10+ messages in thread
From: Matthew Auld @ 2021-01-27 12:48 UTC (permalink / raw)
To: intel-gfx
Prefer allocating the context from LMEM on dgfx.
Based on a patch from Michel Thierry.
v2: flatten the chain
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 33b529dcb05f..8508b8d701c1 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3,6 +3,8 @@
* Copyright © 2014 Intel Corporation
*/
+#include "gem/i915_gem_lmem.h"
+
#include "gen8_engine_cs.h"
#include "i915_drv.h"
#include "i915_perf.h"
@@ -808,7 +810,9 @@ __lrc_alloc_state(struct intel_context *ce, struct intel_engine_cs *engine)
context_size += PAGE_SIZE;
}
- obj = i915_gem_object_create_shmem(engine->i915, context_size);
+ obj = i915_gem_object_create_lmem(engine->i915, context_size, 0);
+ if (IS_ERR(obj))
+ obj = i915_gem_object_create_shmem(engine->i915, context_size);
if (IS_ERR(obj))
return ERR_CAST(obj);
--
2.26.2
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH v4 7/8] drm/i915: move engine scratch to LMEM
2021-01-27 12:48 [Intel-gfx] [PATCH v4 1/8] drm/i915: make local-memory probing a GT operation Matthew Auld
` (4 preceding siblings ...)
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 6/8] drm/i915: allocate context from LMEM Matthew Auld
@ 2021-01-27 12:48 ` Matthew Auld
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 8/8] drm/i915: allocate cmd ring in lmem Matthew Auld
6 siblings, 0 replies; 10+ messages in thread
From: Matthew Auld @ 2021-01-27 12:48 UTC (permalink / raw)
To: intel-gfx
Prefer allocating the engine scratch from LMEM on dgfx.
v2: flatten the chain
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_gt.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 9ac67e0534b7..35ff68ada4f1 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -4,6 +4,8 @@
*/
#include "debugfs_gt.h"
+
+#include "gem/i915_gem_lmem.h"
#include "i915_drv.h"
#include "intel_context.h"
#include "intel_gt.h"
@@ -378,11 +380,13 @@ static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
struct i915_vma *vma;
int ret;
- obj = i915_gem_object_create_stolen(i915, size);
+ obj = i915_gem_object_create_lmem(i915, size, I915_BO_ALLOC_VOLATILE);
+ if (IS_ERR(obj))
+ obj = i915_gem_object_create_stolen(i915, size);
if (IS_ERR(obj))
obj = i915_gem_object_create_internal(i915, size);
if (IS_ERR(obj)) {
- DRM_ERROR("Failed to allocate scratch page\n");
+ drm_err(&i915->drm, "Failed to allocate scratch page\n");
return PTR_ERR(obj);
}
--
2.26.2
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [Intel-gfx] [PATCH v4 8/8] drm/i915: allocate cmd ring in lmem
2021-01-27 12:48 [Intel-gfx] [PATCH v4 1/8] drm/i915: make local-memory probing a GT operation Matthew Auld
` (5 preceding siblings ...)
2021-01-27 12:48 ` [Intel-gfx] [PATCH v4 7/8] drm/i915: move engine scratch to LMEM Matthew Auld
@ 2021-01-27 12:48 ` Matthew Auld
6 siblings, 0 replies; 10+ messages in thread
From: Matthew Auld @ 2021-01-27 12:48 UTC (permalink / raw)
To: intel-gfx
From: Michel Thierry <michel.thierry@intel.com>
Prefer allocating the cmd ring from LMEM on dgfx.
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_ring.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
index 29c87b3c23bc..aee0a77c77e0 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring.c
@@ -3,6 +3,7 @@
* Copyright © 2019 Intel Corporation
*/
+#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_object.h"
#include "i915_drv.h"
@@ -108,8 +109,8 @@ static struct i915_vma *create_ring_vma(struct i915_ggtt *ggtt, int size)
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
- obj = ERR_PTR(-ENODEV);
- if (i915_ggtt_has_aperture(ggtt))
+ obj = i915_gem_object_create_lmem(i915, size, I915_BO_ALLOC_VOLATILE);
+ if (IS_ERR(obj) && i915_ggtt_has_aperture(ggtt))
obj = i915_gem_object_create_stolen(i915, size);
if (IS_ERR(obj))
obj = i915_gem_object_create_internal(i915, size);
--
2.26.2
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