* [PATCH 1/5] target/sh4: Fix code style for checkpatch.pl
2021-01-27 23:21 [PATCH 0/5] target/sh4: Pass MMUAccessType to get_physical_address() Philippe Mathieu-Daudé
@ 2021-01-27 23:21 ` Philippe Mathieu-Daudé
2021-02-04 2:41 ` Richard Henderson
2021-01-27 23:21 ` [PATCH 2/5] target/sh4: Replace magic value by MMUAccessType definitions Philippe Mathieu-Daudé
` (3 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-27 23:21 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Joe Komlodi, Yoshinori Sato,
Philippe Mathieu-Daudé
We are going to move this code, fix its style first.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Easier to review using 'git-diff -w -b'
---
target/sh4/helper.c | 82 ++++++++++++++++++++++-----------------------
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 408478ce5dc..fc816137766 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -330,8 +330,8 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid
MMU_IADDR_ERROR, MMU_DADDR_ERROR_READ, MMU_DADDR_ERROR_WRITE.
*/
static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
- int *prot, target_ulong address,
- int rw, int access_type)
+ int *prot, target_ulong address,
+ int rw, int access_type)
{
int use_asid, n;
tlb_t *matching = NULL;
@@ -340,12 +340,12 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
if (rw == 2) {
n = find_itlb_entry(env, address, use_asid);
- if (n >= 0) {
- matching = &env->itlb[n];
+ if (n >= 0) {
+ matching = &env->itlb[n];
if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
- n = MMU_ITLB_VIOLATION;
+ n = MMU_ITLB_VIOLATION;
} else {
- *prot = PAGE_EXEC;
+ *prot = PAGE_EXEC;
}
} else {
n = find_utlb_entry(env, address, use_asid);
@@ -365,14 +365,14 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
} else if (n == MMU_DTLB_MISS) {
n = MMU_ITLB_MISS;
}
- }
+ }
} else {
- n = find_utlb_entry(env, address, use_asid);
- if (n >= 0) {
- matching = &env->utlb[n];
+ n = find_utlb_entry(env, address, use_asid);
+ if (n >= 0) {
+ matching = &env->utlb[n];
if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
- n = (rw == 1) ? MMU_DTLB_VIOLATION_WRITE :
- MMU_DTLB_VIOLATION_READ;
+ n = (rw == 1)
+ ? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ;
} else if ((rw == 1) && !(matching->pr & 1)) {
n = MMU_DTLB_VIOLATION_WRITE;
} else if ((rw == 1) && !matching->d) {
@@ -383,15 +383,15 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
*prot |= PAGE_WRITE;
}
}
- } else if (n == MMU_DTLB_MISS) {
- n = (rw == 1) ? MMU_DTLB_MISS_WRITE :
- MMU_DTLB_MISS_READ;
- }
+ } else if (n == MMU_DTLB_MISS) {
+ n = (rw == 1)
+ ? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ;
+ }
}
if (n >= 0) {
- n = MMU_OK;
- *physical = ((matching->ppn << 10) & ~(matching->size - 1)) |
- (address & (matching->size - 1));
+ n = MMU_OK;
+ *physical = ((matching->ppn << 10) & ~(matching->size - 1))
+ | (address & (matching->size - 1));
}
return n;
}
@@ -401,34 +401,34 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
int rw, int access_type)
{
/* P1, P2 and P4 areas do not use translation */
- if ((address >= 0x80000000 && address < 0xc0000000) ||
- address >= 0xe0000000) {
+ if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) {
if (!(env->sr & (1u << SR_MD))
- && (address < 0xe0000000 || address >= 0xe4000000)) {
- /* Unauthorized access in user mode (only store queues are available) */
+ && (address < 0xe0000000 || address >= 0xe4000000)) {
+ /* Unauthorized access in user mode (only store queues are available) */
qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n");
- if (rw == 0)
- return MMU_DADDR_ERROR_READ;
- else if (rw == 1)
- return MMU_DADDR_ERROR_WRITE;
- else
- return MMU_IADDR_ERROR;
- }
- if (address >= 0x80000000 && address < 0xc0000000) {
- /* Mask upper 3 bits for P1 and P2 areas */
- *physical = address & 0x1fffffff;
- } else {
- *physical = address;
- }
- *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
- return MMU_OK;
+ if (rw == 0) {
+ return MMU_DADDR_ERROR_READ;
+ } else if (rw == 1) {
+ return MMU_DADDR_ERROR_WRITE;
+ } else {
+ return MMU_IADDR_ERROR;
+ }
+ }
+ if (address >= 0x80000000 && address < 0xc0000000) {
+ /* Mask upper 3 bits for P1 and P2 areas */
+ *physical = address & 0x1fffffff;
+ } else {
+ *physical = address;
+ }
+ *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+ return MMU_OK;
}
/* If MMU is disabled, return the corresponding physical page */
if (!(env->mmucr & MMUCR_AT)) {
- *physical = address & 0x1FFFFFFF;
- *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
- return MMU_OK;
+ *physical = address & 0x1FFFFFFF;
+ *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+ return MMU_OK;
}
/* We need to resort to the MMU */
--
2.26.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 1/5] target/sh4: Fix code style for checkpatch.pl
2021-01-27 23:21 ` [PATCH 1/5] target/sh4: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
@ 2021-02-04 2:41 ` Richard Henderson
0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-02-04 2:41 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: Joe Komlodi, Yoshinori Sato
On 1/27/21 1:21 PM, Philippe Mathieu-Daudé wrote:
> We are going to move this code, fix its style first.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> Easier to review using 'git-diff -w -b'
> ---
> target/sh4/helper.c | 82 ++++++++++++++++++++++-----------------------
> 1 file changed, 41 insertions(+), 41 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/5] target/sh4: Replace magic value by MMUAccessType definitions
2021-01-27 23:21 [PATCH 0/5] target/sh4: Pass MMUAccessType to get_physical_address() Philippe Mathieu-Daudé
2021-01-27 23:21 ` [PATCH 1/5] target/sh4: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
@ 2021-01-27 23:21 ` Philippe Mathieu-Daudé
2021-02-04 2:41 ` Richard Henderson
2021-01-27 23:21 ` [PATCH 3/5] target/sh4: Pass mmu_idx to get_physical_address() Philippe Mathieu-Daudé
` (2 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-27 23:21 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Joe Komlodi, Yoshinori Sato,
Philippe Mathieu-Daudé
Replace the 0/1/2 magic values by the corresponding MMUAccessType.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/sh4/helper.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index fc816137766..4303ebf018b 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -338,7 +338,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD));
- if (rw == 2) {
+ if (rw == MMU_INST_FETCH) {
n = find_itlb_entry(env, address, use_asid);
if (n >= 0) {
matching = &env->itlb[n];
@@ -371,11 +371,11 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
if (n >= 0) {
matching = &env->utlb[n];
if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
- n = (rw == 1)
+ n = (rw == MMU_DATA_STORE)
? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ;
- } else if ((rw == 1) && !(matching->pr & 1)) {
+ } else if ((rw == MMU_DATA_STORE) && !(matching->pr & 1)) {
n = MMU_DTLB_VIOLATION_WRITE;
- } else if ((rw == 1) && !matching->d) {
+ } else if ((rw == MMU_DATA_STORE) && !matching->d) {
n = MMU_DTLB_INITIAL_WRITE;
} else {
*prot = PAGE_READ;
@@ -384,7 +384,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
}
}
} else if (n == MMU_DTLB_MISS) {
- n = (rw == 1)
+ n = (rw == MMU_DATA_STORE)
? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ;
}
}
@@ -406,9 +406,9 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
&& (address < 0xe0000000 || address >= 0xe4000000)) {
/* Unauthorized access in user mode (only store queues are available) */
qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n");
- if (rw == 0) {
+ if (rw == MMU_DATA_LOAD) {
return MMU_DADDR_ERROR_READ;
- } else if (rw == 1) {
+ } else if (rw == MMU_DATA_STORE) {
return MMU_DADDR_ERROR_WRITE;
} else {
return MMU_IADDR_ERROR;
@@ -441,7 +441,7 @@ hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
target_ulong physical;
int prot;
- get_physical_address(&cpu->env, &physical, &prot, addr, 0, 0);
+ get_physical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD, 0);
return physical;
}
--
2.26.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 3/5] target/sh4: Pass mmu_idx to get_physical_address()
2021-01-27 23:21 [PATCH 0/5] target/sh4: Pass MMUAccessType to get_physical_address() Philippe Mathieu-Daudé
2021-01-27 23:21 ` [PATCH 1/5] target/sh4: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
2021-01-27 23:21 ` [PATCH 2/5] target/sh4: Replace magic value by MMUAccessType definitions Philippe Mathieu-Daudé
@ 2021-01-27 23:21 ` Philippe Mathieu-Daudé
2021-02-04 2:42 ` Richard Henderson
2021-01-27 23:21 ` [PATCH 4/5] target/sh4: Let get_physical_address() use MMUAccessType access_type Philippe Mathieu-Daudé
2021-01-27 23:21 ` [PATCH 5/5] target/sh4: Remove unused definitions Philippe Mathieu-Daudé
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-27 23:21 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Joe Komlodi, Yoshinori Sato,
Philippe Mathieu-Daudé
get_mmu_address() and get_physical_address() don't use their
'int access_type' argument: remove it along with ACCESS_INT
in superh_cpu_tlb_fill().
Pass the MMU index along, as other targets do.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/sh4/helper.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 4303ebf018b..737938d2fd1 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -331,7 +331,7 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid
*/
static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
int *prot, target_ulong address,
- int rw, int access_type)
+ int rw, int mmu_idx)
{
int use_asid, n;
tlb_t *matching = NULL;
@@ -398,7 +398,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
static int get_physical_address(CPUSH4State * env, target_ulong * physical,
int *prot, target_ulong address,
- int rw, int access_type)
+ int rw, int mmu_idx)
{
/* P1, P2 and P4 areas do not use translation */
if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) {
@@ -432,7 +432,7 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
}
/* We need to resort to the MMU */
- return get_mmu_address(env, physical, prot, address, rw, access_type);
+ return get_mmu_address(env, physical, prot, address, rw, mmu_idx);
}
hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
@@ -813,11 +813,10 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMU_DTLB_VIOLATION_READ);
#else
target_ulong physical;
- int prot, sh_access_type;
+ int prot;
- sh_access_type = ACCESS_INT;
ret = get_physical_address(env, &physical, &prot, address,
- access_type, sh_access_type);
+ access_type, mmu_idx);
if (ret == MMU_OK) {
address &= TARGET_PAGE_MASK;
--
2.26.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 4/5] target/sh4: Let get_physical_address() use MMUAccessType access_type
2021-01-27 23:21 [PATCH 0/5] target/sh4: Pass MMUAccessType to get_physical_address() Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2021-01-27 23:21 ` [PATCH 3/5] target/sh4: Pass mmu_idx to get_physical_address() Philippe Mathieu-Daudé
@ 2021-01-27 23:21 ` Philippe Mathieu-Daudé
2021-02-04 2:42 ` Richard Henderson
2021-01-27 23:21 ` [PATCH 5/5] target/sh4: Remove unused definitions Philippe Mathieu-Daudé
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-27 23:21 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Joe Komlodi, Yoshinori Sato,
Philippe Mathieu-Daudé
superh_cpu_tlb_fill() already provides a access_type variable of
type MMUAccessType, and it is passed along, but casted as integer
and renamed 'rw'.
Simply replace 'int rw' by 'MMUAccessType access_type'.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/sh4/helper.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 737938d2fd1..fad5f906ef6 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -331,14 +331,14 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid
*/
static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
int *prot, target_ulong address,
- int rw, int mmu_idx)
+ MMUAccessType access_type, int mmu_idx)
{
int use_asid, n;
tlb_t *matching = NULL;
use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD));
- if (rw == MMU_INST_FETCH) {
+ if (access_type == MMU_INST_FETCH) {
n = find_itlb_entry(env, address, use_asid);
if (n >= 0) {
matching = &env->itlb[n];
@@ -371,11 +371,11 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
if (n >= 0) {
matching = &env->utlb[n];
if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
- n = (rw == MMU_DATA_STORE)
+ n = (access_type == MMU_DATA_STORE)
? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ;
- } else if ((rw == MMU_DATA_STORE) && !(matching->pr & 1)) {
+ } else if ((access_type == MMU_DATA_STORE) && !(matching->pr & 1)) {
n = MMU_DTLB_VIOLATION_WRITE;
- } else if ((rw == MMU_DATA_STORE) && !matching->d) {
+ } else if ((access_type == MMU_DATA_STORE) && !matching->d) {
n = MMU_DTLB_INITIAL_WRITE;
} else {
*prot = PAGE_READ;
@@ -384,7 +384,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
}
}
} else if (n == MMU_DTLB_MISS) {
- n = (rw == MMU_DATA_STORE)
+ n = (access_type == MMU_DATA_STORE)
? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ;
}
}
@@ -398,7 +398,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
static int get_physical_address(CPUSH4State * env, target_ulong * physical,
int *prot, target_ulong address,
- int rw, int mmu_idx)
+ MMUAccessType access_type, int mmu_idx)
{
/* P1, P2 and P4 areas do not use translation */
if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) {
@@ -406,9 +406,9 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
&& (address < 0xe0000000 || address >= 0xe4000000)) {
/* Unauthorized access in user mode (only store queues are available) */
qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n");
- if (rw == MMU_DATA_LOAD) {
+ if (access_type == MMU_DATA_LOAD) {
return MMU_DADDR_ERROR_READ;
- } else if (rw == MMU_DATA_STORE) {
+ } else if (access_type == MMU_DATA_STORE) {
return MMU_DADDR_ERROR_WRITE;
} else {
return MMU_IADDR_ERROR;
@@ -432,7 +432,7 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
}
/* We need to resort to the MMU */
- return get_mmu_address(env, physical, prot, address, rw, mmu_idx);
+ return get_mmu_address(env, physical, prot, address, access_type, mmu_idx);
}
hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
--
2.26.2
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 4/5] target/sh4: Let get_physical_address() use MMUAccessType access_type
2021-01-27 23:21 ` [PATCH 4/5] target/sh4: Let get_physical_address() use MMUAccessType access_type Philippe Mathieu-Daudé
@ 2021-02-04 2:42 ` Richard Henderson
0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-02-04 2:42 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: Joe Komlodi, Yoshinori Sato
On 1/27/21 1:21 PM, Philippe Mathieu-Daudé wrote:
> superh_cpu_tlb_fill() already provides a access_type variable of
> type MMUAccessType, and it is passed along, but casted as integer
> and renamed 'rw'.
> Simply replace 'int rw' by 'MMUAccessType access_type'.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> target/sh4/helper.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 5/5] target/sh4: Remove unused definitions
2021-01-27 23:21 [PATCH 0/5] target/sh4: Pass MMUAccessType to get_physical_address() Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2021-01-27 23:21 ` [PATCH 4/5] target/sh4: Let get_physical_address() use MMUAccessType access_type Philippe Mathieu-Daudé
@ 2021-01-27 23:21 ` Philippe Mathieu-Daudé
2021-02-04 2:42 ` Richard Henderson
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-27 23:21 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Joe Komlodi, Yoshinori Sato,
Philippe Mathieu-Daudé
Remove these confusing and unused definitions.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/sh4/cpu.h | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 714e3b56413..01c43440822 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -271,17 +271,6 @@ typedef SuperHCPU ArchCPU;
#include "exec/cpu-all.h"
-/* Memory access type */
-enum {
- /* Privilege */
- ACCESS_PRIV = 0x01,
- /* Direction */
- ACCESS_WRITE = 0x02,
- /* Type of instruction */
- ACCESS_CODE = 0x10,
- ACCESS_INT = 0x20
-};
-
/* MMU control register */
#define MMUCR 0x1F000010
#define MMUCR_AT (1<<0)
--
2.26.2
^ permalink raw reply related [flat|nested] 11+ messages in thread