From: michael.nawrocki--- via <qemu-devel@nongnu.org>
To: <qemu-arm@nongnu.org>
Cc: qemu-trivial@nongnu.org, peter.maydell@linaro.org,
qemu-devel@nongnu.org,
Mike Nawrocki <michael.nawrocki@gtri.gatech.edu>
Subject: [PATCH 0/1] target/arm: Fix SCR_EL3 migration issue
Date: Thu, 28 Jan 2021 09:31:01 -0500 [thread overview]
Message-ID: <20210128143102.7834-1-michael.nawrocki@gtri.gatech.edu> (raw)
The SCR_EL3 register reset value (0) and the value produced when
writing 0 via the scr_write function (set as writefn in the register
struct) differ. This causes migration to fail.
I believe the solution is to specify a raw_writefn for that register.
Failing invocation:
$ qemu-system-arm -machine vexpress-a9 -cpu cortex-a9 -nographic
QEMU 5.2.0 monitor - type 'help' for more information
(qemu) migrate "exec:cat > img"
(qemu) q
$ qemu-system-arm -machine vexpress-a9 -cpu cortex-a9 -nographic -incoming "exec:cat img"
qemu-system-arm: error while loading state for instance 0x0 of device 'cpu'
qemu-system-arm: load of migration failed: Operation not permitted
Mike Nawrocki (1):
target/arm: Add raw_writefn to SCR_EL3 register
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.20.1
next reply other threads:[~2021-01-28 14:58 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-28 14:31 michael.nawrocki--- via [this message]
2021-01-28 14:31 ` [PATCH 1/1] target/arm: Add raw_writefn to SCR_EL3 register michael.nawrocki--- via
2021-02-02 11:29 ` Peter Maydell
2021-02-03 14:50 ` michael.nawrocki--- via
2021-02-03 15:04 ` Peter Maydell
2021-02-03 16:58 ` michael.nawrocki--- via
2021-01-28 14:38 ` [PATCH 0/1] target/arm: Fix SCR_EL3 migration issue Peter Maydell
2021-02-03 16:28 ` Philippe Mathieu-Daudé
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