* [PULL hvf 1/5] hvf: Guard xgetbv call
2021-02-09 13:57 [PULL hvf 0/5] HVF updates for 2021-02-09 Roman Bolshakov
@ 2021-02-09 13:57 ` Roman Bolshakov
2021-02-09 13:57 ` [PULL hvf 2/5] target/i386/hvf: add vmware-cpuid-freq cpu feature Roman Bolshakov
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Roman Bolshakov @ 2021-02-09 13:57 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Richard Henderson, Roman Bolshakov, Hill Ma, Eduardo Habkost,
Cameron Esfahani
From: Hill Ma <maahiuzeon@gmail.com>
This prevents illegal instruction on cpus that do not support xgetbv.
Buglink: https://bugs.launchpad.net/qemu/+bug/1758819
Reviewed-by: Cameron Esfahani <dirty@apple.com>
Signed-off-by: Hill Ma <maahiuzeon@gmail.com>
Message-Id: <X/6OJ7qk0W6bHkHQ@Hills-Mac-Pro.local>
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
---
target/i386/hvf/x86_cpuid.c | 34 ++++++++++++++++++++++------------
1 file changed, 22 insertions(+), 12 deletions(-)
diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
index a6842912f5..32b0d131df 100644
--- a/target/i386/hvf/x86_cpuid.c
+++ b/target/i386/hvf/x86_cpuid.c
@@ -27,15 +27,22 @@
#include "vmx.h"
#include "sysemu/hvf.h"
-static uint64_t xgetbv(uint32_t xcr)
+static bool xgetbv(uint32_t cpuid_ecx, uint32_t idx, uint64_t *xcr)
{
- uint32_t eax, edx;
+ uint32_t xcrl, xcrh;
- __asm__ volatile ("xgetbv"
- : "=a" (eax), "=d" (edx)
- : "c" (xcr));
+ if (cpuid_ecx & CPUID_EXT_OSXSAVE) {
+ /*
+ * The xgetbv instruction is not available to older versions of
+ * the assembler, so we encode the instruction manually.
+ */
+ asm(".byte 0x0f, 0x01, 0xd0" : "=a" (xcrl), "=d" (xcrh) : "c" (idx));
- return (((uint64_t)edx) << 32) | eax;
+ *xcr = (((uint64_t)xcrh) << 32) | xcrl;
+ return true;
+ }
+
+ return false;
}
uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
@@ -100,12 +107,15 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx,
break;
case 0xD:
if (idx == 0) {
- uint64_t host_xcr0 = xgetbv(0);
- uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK | XSTATE_SSE_MASK |
- XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK |
- XSTATE_BNDCSR_MASK | XSTATE_OPMASK_MASK |
- XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK);
- eax &= supp_xcr0;
+ uint64_t host_xcr0;
+ if (xgetbv(ecx, 0, &host_xcr0)) {
+ uint64_t supp_xcr0 = host_xcr0 & (XSTATE_FP_MASK |
+ XSTATE_SSE_MASK | XSTATE_YMM_MASK |
+ XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
+ XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK |
+ XSTATE_Hi16_ZMM_MASK);
+ eax &= supp_xcr0;
+ }
} else if (idx == 1) {
hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &cap);
eax &= CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1;
--
2.30.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PULL hvf 2/5] target/i386/hvf: add vmware-cpuid-freq cpu feature
2021-02-09 13:57 [PULL hvf 0/5] HVF updates for 2021-02-09 Roman Bolshakov
2021-02-09 13:57 ` [PULL hvf 1/5] hvf: Guard xgetbv call Roman Bolshakov
@ 2021-02-09 13:57 ` Roman Bolshakov
2021-02-09 13:57 ` [PULL hvf 3/5] hvf: x86: Remove unused definitions Roman Bolshakov
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Roman Bolshakov @ 2021-02-09 13:57 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Roman Bolshakov, Richard Henderson, Cameron Esfahani,
Vladislav Yaroshchuk, Eduardo Habkost
From: Vladislav Yaroshchuk <yaroshchuk2000@gmail.com>
For `-accel hvf` cpu_x86_cpuid() is wrapped with hvf_cpu_x86_cpuid() to
add paravirtualization cpuid leaf 0x40000010
https://lkml.org/lkml/2008/10/1/246
Leaf 0x40000010, Timing Information:
EAX: (Virtual) TSC frequency in kHz.
EBX: (Virtual) Bus (local apic timer) frequency in kHz.
ECX, EDX: RESERVED (Per above, reserved fields are set to zero).
On macOS TSC and APIC Bus frequencies can be readed by sysctl call with
names `machdep.tsc.frequency` and `hw.busfrequency`
This options is required for Darwin-XNU guest to be synchronized with
host
Leaf 0x40000000 not exposes HVF leaving hypervisor signature empty
Signed-off-by: Vladislav Yaroshchuk <yaroshchuk2000@gmail.com>
Message-Id: <20210122150518.3551-1-yaroshchuk2000@gmail.com>
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
---
target/i386/hvf/hvf.c | 96 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 95 insertions(+), 1 deletion(-)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index ed9356565c..5a8914564b 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -65,6 +65,7 @@
#include <Hypervisor/hv.h>
#include <Hypervisor/hv_vmx.h>
+#include <sys/sysctl.h>
#include "exec/address-spaces.h"
#include "hw/i386/apic_internal.h"
@@ -456,6 +457,48 @@ static void dummy_signal(int sig)
{
}
+static void init_tsc_freq(CPUX86State *env)
+{
+ size_t length;
+ uint64_t tsc_freq;
+
+ if (env->tsc_khz != 0) {
+ return;
+ }
+
+ length = sizeof(uint64_t);
+ if (sysctlbyname("machdep.tsc.frequency", &tsc_freq, &length, NULL, 0)) {
+ return;
+ }
+ env->tsc_khz = tsc_freq / 1000; /* Hz to KHz */
+}
+
+static void init_apic_bus_freq(CPUX86State *env)
+{
+ size_t length;
+ uint64_t bus_freq;
+
+ if (env->apic_bus_freq != 0) {
+ return;
+ }
+
+ length = sizeof(uint64_t);
+ if (sysctlbyname("hw.busfrequency", &bus_freq, &length, NULL, 0)) {
+ return;
+ }
+ env->apic_bus_freq = bus_freq;
+}
+
+static inline bool tsc_is_known(CPUX86State *env)
+{
+ return env->tsc_khz != 0;
+}
+
+static inline bool apic_bus_freq_is_known(CPUX86State *env)
+{
+ return env->apic_bus_freq != 0;
+}
+
int hvf_init_vcpu(CPUState *cpu)
{
@@ -480,6 +523,15 @@ int hvf_init_vcpu(CPUState *cpu)
hvf_state->hvf_caps = g_new0(struct hvf_vcpu_caps, 1);
env->hvf_mmio_buf = g_new(char, 4096);
+ if (x86cpu->vmware_cpuid_freq) {
+ init_tsc_freq(env);
+ init_apic_bus_freq(env);
+
+ if (!tsc_is_known(env) || !apic_bus_freq_is_known(env)) {
+ error_report("vmware-cpuid-freq: feature couldn't be enabled");
+ }
+ }
+
r = hv_vcpu_create((hv_vcpuid_t *)&cpu->hvf_fd, HV_VCPU_DEFAULT);
cpu->vcpu_dirty = 1;
assert_hvf_ok(r);
@@ -597,6 +649,48 @@ static void hvf_store_events(CPUState *cpu, uint32_t ins_len, uint64_t idtvec_in
}
}
+static void hvf_cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
+ uint32_t *eax, uint32_t *ebx,
+ uint32_t *ecx, uint32_t *edx)
+{
+ /*
+ * A wrapper extends cpu_x86_cpuid with 0x40000000 and 0x40000010 leafs,
+ * leafs 0x40000001-0x4000000F are filled with zeros
+ * Provides vmware-cpuid-freq support to hvf
+ *
+ * Note: leaf 0x40000000 not exposes HVF,
+ * leaving hypervisor signature empty
+ */
+
+ if (index < 0x40000000 || index > 0x40000010 ||
+ !tsc_is_known(env) || !apic_bus_freq_is_known(env)) {
+
+ cpu_x86_cpuid(env, index, count, eax, ebx, ecx, edx);
+ return;
+ }
+
+ switch (index) {
+ case 0x40000000:
+ *eax = 0x40000010; /* Max available cpuid leaf */
+ *ebx = 0; /* Leave signature empty */
+ *ecx = 0;
+ *edx = 0;
+ break;
+ case 0x40000010:
+ *eax = env->tsc_khz;
+ *ebx = env->apic_bus_freq / 1000; /* Hz to KHz */
+ *ecx = 0;
+ *edx = 0;
+ break;
+ default:
+ *eax = 0;
+ *ebx = 0;
+ *ecx = 0;
+ *edx = 0;
+ break;
+ }
+}
+
int hvf_vcpu_exec(CPUState *cpu)
{
X86CPU *x86_cpu = X86_CPU(cpu);
@@ -734,7 +828,7 @@ int hvf_vcpu_exec(CPUState *cpu)
uint32_t rcx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RCX);
uint32_t rdx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RDX);
- cpu_x86_cpuid(env, rax, rcx, &rax, &rbx, &rcx, &rdx);
+ hvf_cpu_x86_cpuid(env, rax, rcx, &rax, &rbx, &rcx, &rdx);
wreg(cpu->hvf_fd, HV_X86_RAX, rax);
wreg(cpu->hvf_fd, HV_X86_RBX, rbx);
--
2.30.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PULL hvf 3/5] hvf: x86: Remove unused definitions
2021-02-09 13:57 [PULL hvf 0/5] HVF updates for 2021-02-09 Roman Bolshakov
2021-02-09 13:57 ` [PULL hvf 1/5] hvf: Guard xgetbv call Roman Bolshakov
2021-02-09 13:57 ` [PULL hvf 2/5] target/i386/hvf: add vmware-cpuid-freq cpu feature Roman Bolshakov
@ 2021-02-09 13:57 ` Roman Bolshakov
2021-02-09 13:57 ` [PULL hvf 4/5] target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT Roman Bolshakov
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Roman Bolshakov @ 2021-02-09 13:57 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Eduardo Habkost, Richard Henderson, Cameron Esfahani,
Roman Bolshakov, Alexander Graf, Philippe Mathieu-Daudé
From: Alexander Graf <agraf@csgraf.de>
The hvf i386 has a few struct and cpp definitions that are never
used. Remove them.
Suggested-by: Roman Bolshakov <r.bolshakov@yadro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Message-Id: <20210120224444.71840-3-agraf@csgraf.de>
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
---
target/i386/hvf/hvf-i386.h | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h
index e0edffd077..e31938e5ff 100644
--- a/target/i386/hvf/hvf-i386.h
+++ b/target/i386/hvf/hvf-i386.h
@@ -21,21 +21,6 @@
#include "cpu.h"
#include "x86.h"
-#define HVF_MAX_VCPU 0x10
-
-extern struct hvf_state hvf_global;
-
-struct hvf_vm {
- int id;
- struct hvf_vcpu_state *vcpus[HVF_MAX_VCPU];
-};
-
-struct hvf_state {
- uint32_t version;
- struct hvf_vm *vm;
- uint64_t mem_quota;
-};
-
/* hvf_slot flags */
#define HVF_SLOT_LOG (1 << 0)
@@ -75,7 +60,6 @@ hvf_slot *hvf_find_overlap_slot(uint64_t, uint64_t);
/* Host specific functions */
int hvf_inject_interrupt(CPUArchState *env, int vector);
-int hvf_vcpu_run(struct hvf_vcpu_state *vcpu);
#endif
#endif
--
2.30.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PULL hvf 4/5] target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT
2021-02-09 13:57 [PULL hvf 0/5] HVF updates for 2021-02-09 Roman Bolshakov
` (2 preceding siblings ...)
2021-02-09 13:57 ` [PULL hvf 3/5] hvf: x86: Remove unused definitions Roman Bolshakov
@ 2021-02-09 13:57 ` Roman Bolshakov
2021-02-09 13:57 ` [PULL hvf 5/5] hvf: Fetch cr4 before evaluating CPUID(1) Roman Bolshakov
2021-02-09 14:12 ` [PULL hvf 0/5] HVF updates for 2021-02-09 Paolo Bonzini
5 siblings, 0 replies; 7+ messages in thread
From: Roman Bolshakov @ 2021-02-09 13:57 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Cameron Esfahani, Roman Bolshakov, Richard Henderson,
Eduardo Habkost, Vladislav Yaroshchuk
From: Vladislav Yaroshchuk <yaroshchuk2000@gmail.com>
Some guests (ex. Darwin-XNU) can attemp to read this MSR to retrieve and
validate CPU topology comparing it to ACPI MADT content
MSR description from Intel Manual:
35H: MSR_CORE_THREAD_COUNT: Configured State of Enabled Processor Core
Count and Logical Processor Count
Bits 15:0 THREAD_COUNT The number of logical processors that are
currently enabled in the physical package
Bits 31:16 Core_COUNT The number of processor cores that are currently
enabled in the physical package
Bits 63:32 Reserved
Signed-off-by: Vladislav Yaroshchuk <yaroshchuk2000@gmail.com>
Message-Id: <20210113205323.33310-1-yaroshchuk2000@gmail.com>
[RB: reordered MSR definition and dropped u suffix from shift offset]
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
---
target/i386/cpu.h | 1 +
target/i386/hvf/x86_emu.c | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index d23a5b340a..e2fe0689cc 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -366,6 +366,7 @@ typedef enum X86Seg {
#define MSR_IA32_SMBASE 0x9e
#define MSR_SMI_COUNT 0x34
+#define MSR_CORE_THREAD_COUNT 0x35
#define MSR_MTRRcap 0xfe
#define MSR_MTRRcap_VCNT 8
#define MSR_MTRRcap_FIXRANGE_SUPPORT (1 << 8)
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index da570e352b..e52c39ddb1 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -668,6 +668,7 @@ void simulate_rdmsr(struct CPUState *cpu)
{
X86CPU *x86_cpu = X86_CPU(cpu);
CPUX86State *env = &x86_cpu->env;
+ CPUState *cs = env_cpu(env);
uint32_t msr = ECX(env);
uint64_t val = 0;
@@ -745,6 +746,10 @@ void simulate_rdmsr(struct CPUState *cpu)
case MSR_MTRRdefType:
val = env->mtrr_deftype;
break;
+ case MSR_CORE_THREAD_COUNT:
+ val = cs->nr_threads * cs->nr_cores; /* thread count, bits 15..0 */
+ val |= ((uint32_t)cs->nr_cores << 16); /* core count, bits 31..16 */
+ break;
default:
/* fprintf(stderr, "%s: unknown msr 0x%x\n", __func__, msr); */
val = 0;
--
2.30.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PULL hvf 5/5] hvf: Fetch cr4 before evaluating CPUID(1)
2021-02-09 13:57 [PULL hvf 0/5] HVF updates for 2021-02-09 Roman Bolshakov
` (3 preceding siblings ...)
2021-02-09 13:57 ` [PULL hvf 4/5] target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT Roman Bolshakov
@ 2021-02-09 13:57 ` Roman Bolshakov
2021-02-09 14:12 ` [PULL hvf 0/5] HVF updates for 2021-02-09 Paolo Bonzini
5 siblings, 0 replies; 7+ messages in thread
From: Roman Bolshakov @ 2021-02-09 13:57 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Cc: Eduardo Habkost, Asad Ali, Richard Henderson, Cameron Esfahani,
Roman Bolshakov, Alexander Graf
From: Alexander Graf <agraf@csgraf.de>
The CPUID function 1 has a bit called OSXSAVE which tells user space the
status of the CR4.OSXSAVE bit. Our generic CPUID function injects that bit
based on the status of CR4.
With Hypervisor.framework, we do not synchronize full CPU state often enough
for this function to see the CR4 update before guest user space asks for it.
To be on the save side, let's just always synchronize it when we receive a
CPUID(1) request. That way we can set the bit with real confidence.
Reported-by: Asad Ali <asad@osaro.com>
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Message-Id: <20210123004129.6364-1-agraf@csgraf.de>
[RB: resolved conflict with another CPUID change]
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
---
target/i386/hvf/hvf.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 5a8914564b..d2fb680058 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -828,6 +828,10 @@ int hvf_vcpu_exec(CPUState *cpu)
uint32_t rcx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RCX);
uint32_t rdx = (uint32_t)rreg(cpu->hvf_fd, HV_X86_RDX);
+ if (rax == 1) {
+ /* CPUID1.ecx.OSXSAVE needs to know CR4 */
+ env->cr[4] = rvmcs(cpu->hvf_fd, VMCS_GUEST_CR4);
+ }
hvf_cpu_x86_cpuid(env, rax, rcx, &rax, &rbx, &rcx, &rdx);
wreg(cpu->hvf_fd, HV_X86_RAX, rax);
--
2.30.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PULL hvf 0/5] HVF updates for 2021-02-09
2021-02-09 13:57 [PULL hvf 0/5] HVF updates for 2021-02-09 Roman Bolshakov
` (4 preceding siblings ...)
2021-02-09 13:57 ` [PULL hvf 5/5] hvf: Fetch cr4 before evaluating CPUID(1) Roman Bolshakov
@ 2021-02-09 14:12 ` Paolo Bonzini
5 siblings, 0 replies; 7+ messages in thread
From: Paolo Bonzini @ 2021-02-09 14:12 UTC (permalink / raw)
To: Roman Bolshakov, qemu-devel
On 09/02/21 14:57, Roman Bolshakov wrote:
> Hi Paolo,
>
> Please apply the PR to i386 queue (not for master). It contains bug
> fixes, cleanups and improvements for HVF accel:
> - Added support of older HW (Hill)
> - Fixed OSXSAVE reporting in CPUID (Alex)
> - Improved Darwin-XNU support (Vladislav)
> - dead code removed (Alex)
>
> Test results: https://gitlab.com/roolebo/qemu/-/pipelines/253575182
> The patches don't introduce regressions in kvm-unit-tests.
>
> The following changes since commit d0dddab40e472ba62b5f43f11cc7dba085dabe71:
>
> Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging (2021-02-05 15:27:02 +0000)
>
> are available in the Git repository at:
>
> https://gitlab.com/roolebo/qemu.git tags/hvf-queue-20210209
>
> for you to fetch changes up to db7884ccdde5425584bec758f72ed658b6549f8a:
>
> hvf: Fetch cr4 before evaluating CPUID(1) (2021-02-09 12:25:09 +0300)
>
> Thanks,
> Roman
>
> ----------------------------------------------------------------
> Alexander Graf (2):
> hvf: x86: Remove unused definitions
> hvf: Fetch cr4 before evaluating CPUID(1)
>
> Hill Ma (1):
> hvf: Guard xgetbv call
>
> Vladislav Yaroshchuk (2):
> target/i386/hvf: add vmware-cpuid-freq cpu feature
> target/i386/hvf: add rdmsr 35H MSR_CORE_THREAD_COUNT
>
> target/i386/cpu.h | 1 +
> target/i386/hvf/hvf-i386.h | 16 -------
> target/i386/hvf/hvf.c | 100 +++++++++++++++++++++++++++++++++++++++++++-
> target/i386/hvf/x86_cpuid.c | 34 +++++++++------
> target/i386/hvf/x86_emu.c | 5 +++
> 5 files changed, 127 insertions(+), 29 deletions(-)
>
Queued, thanks!
Paolo
^ permalink raw reply [flat|nested] 7+ messages in thread