From: Krzysztof Kozlowski <krzk@kernel.org> To: "Paul J. Murphy" <paul.j.murphy@intel.com>, Daniele Alessandrelli <daniele.alessandrelli@intel.com>, Rob Herring <robh+dt@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, arm@kernel.org, soc@kernel.org, Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net> Cc: Krzysztof Kozlowski <krzk@kernel.org> Subject: [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Date: Wed, 10 Feb 2021 18:18:13 +0100 [thread overview] Message-ID: <20210210171823.333802-1-krzk@kernel.org> (raw) Enable in defconfig two Intel ARM64 architectures: the eASIC N5X SoCFPGA and Keem Bay SoC. This allows compile coverage when building default config. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5348c0be2fcf..008314d8d1af 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -29,6 +29,7 @@ CONFIG_KALLSYMS_ALL=y CONFIG_PROFILING=y CONFIG_ARCH_ACTIONS=y CONFIG_ARCH_AGILEX=y +CONFIG_ARCH_N5X=y CONFIG_ARCH_SUNXI=y CONFIG_ARCH_ALPINE=y CONFIG_ARCH_BCM2835=y @@ -41,6 +42,7 @@ CONFIG_ARCH_K3=y CONFIG_ARCH_LAYERSCAPE=y CONFIG_ARCH_LG1K=y CONFIG_ARCH_HISI=y +CONFIG_ARCH_KEEMBAY=y CONFIG_ARCH_MEDIATEK=y CONFIG_ARCH_MESON=y CONFIG_ARCH_MVEBU=y -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org> To: "Paul J. Murphy" <paul.j.murphy@intel.com>, Daniele Alessandrelli <daniele.alessandrelli@intel.com>, Rob Herring <robh+dt@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, arm@kernel.org, soc@kernel.org, Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net> Cc: Krzysztof Kozlowski <krzk@kernel.org> Subject: [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Date: Wed, 10 Feb 2021 18:18:13 +0100 [thread overview] Message-ID: <20210210171823.333802-1-krzk@kernel.org> (raw) Message-ID: <20210210171813.rM3wDS51z_yaFzyaWYQas2PGJUzk76VtAPFkU0Zl6c8@z> (raw) Enable in defconfig two Intel ARM64 architectures: the eASIC N5X SoCFPGA and Keem Bay SoC. This allows compile coverage when building default config. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5348c0be2fcf..008314d8d1af 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -29,6 +29,7 @@ CONFIG_KALLSYMS_ALL=y CONFIG_PROFILING=y CONFIG_ARCH_ACTIONS=y CONFIG_ARCH_AGILEX=y +CONFIG_ARCH_N5X=y CONFIG_ARCH_SUNXI=y CONFIG_ARCH_ALPINE=y CONFIG_ARCH_BCM2835=y @@ -41,6 +42,7 @@ CONFIG_ARCH_K3=y CONFIG_ARCH_LAYERSCAPE=y CONFIG_ARCH_LG1K=y CONFIG_ARCH_HISI=y +CONFIG_ARCH_KEEMBAY=y CONFIG_ARCH_MEDIATEK=y CONFIG_ARCH_MESON=y CONFIG_ARCH_MVEBU=y -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2021-02-10 17:18 UTC|newest] Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-02-10 17:18 Krzysztof Kozlowski [this message] 2021-02-10 17:18 ` [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 02/11] dt-bindings: arm: intel,keembay: limit the dtschema to root node Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 02/11] dt-bindings: arm: intel, keembay: " Krzysztof Kozlowski 2021-02-11 15:03 ` [PATCH 02/11] dt-bindings: arm: intel,keembay: " Alessandrelli, Daniele 2021-02-11 15:03 ` [PATCH 02/11] dt-bindings: arm: intel, keembay: " Alessandrelli, Daniele 2021-02-11 15:03 ` [PATCH 02/11] dt-bindings: arm: intel,keembay: " Alessandrelli, Daniele 2021-02-10 17:18 ` [PATCH 03/11] arm64: dts: intel: socfpga: override clocks by label Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-03-03 18:15 ` Krzysztof Kozlowski 2021-03-03 18:15 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 04/11] arm64: dts: intel: socfpga_agilex: move clocks out of soc node Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 05/11] arm64: dts: intel: socfpga_agilex: move timer " Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 06/11] arm64: dts: intel: socfpga_agilex: remove default status=okay Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 07/11] arm64: dts: intel: socfpga_agilex: move usbphy out of soc node Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 08/11] arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 09/11] arm64: dts: intel: socfpga_agilex: align node names with dtschema Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 10/11] arm64: dts: intel: socfpga_agilex_socdk: align LED " Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 11/11] arm64: dts: intel: socfpga_agilex_socdk_nand: " Krzysztof Kozlowski 2021-02-10 17:18 ` Krzysztof Kozlowski
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