* [Intel-gfx] [PATCH i-g-t] i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers
@ 2021-02-16 14:32 ` Chris Wilson
0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2021-02-16 14:32 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev, Matthew Auld, Chris Wilson
In light of the VT-d workarounds, we may introduce padding around the
scanout vma. This should not affect relocations referencing the scanout
on !full-ppgtt where we leak the GGTT address of scanout to users.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
---
tests/i915/gem_exec_reloc.c | 102 ++++++++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index cc9b8cd6d..98960bb84 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -26,7 +26,9 @@
#include "i915/gem.h"
#include "igt.h"
+#include "igt_device.h"
#include "igt_dummyload.h"
+#include "igt_kms.h"
#include "sw_sync.h"
IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations.");
@@ -1286,6 +1288,83 @@ static void concurrent(int i915, int num_common)
igt_assert_eq(result, 0);
}
+static uint32_t
+pin_scanout(igt_display_t *dpy, igt_output_t *output, struct igt_fb *fb)
+{
+ drmModeModeInfoPtr mode;
+ igt_plane_t *primary;
+
+ mode = igt_output_get_mode(output);
+
+ igt_create_pattern_fb(dpy->drm_fd, mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888,
+ LOCAL_I915_FORMAT_MOD_X_TILED, fb);
+
+ primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+ igt_plane_set_fb(primary, fb);
+
+ igt_display_commit2(dpy, COMMIT_LEGACY);
+
+ return fb->gem_handle;
+}
+
+static void scanout(int i915,
+ igt_display_t *dpy,
+ const struct intel_execution_engine2 *e)
+{
+ struct drm_i915_gem_relocation_entry reloc;
+ struct drm_i915_gem_exec_object2 obj[2] = {
+ [1] = { .handle = batch_create(i915) },
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(obj),
+ .buffer_count = 2,
+ };
+ igt_output_t *output;
+ struct igt_fb fb;
+ uint64_t *map;
+
+ igt_display_reset(dpy);
+
+ output = igt_get_single_output_for_pipe(dpy, PIPE_A);
+ igt_require(output);
+ igt_output_set_pipe(output, PIPE_A);
+
+ /*
+ * Find where the scanout is in our GTT; on !full-ppgtt this will be
+ * the actual GGTT address of the scanout.
+ */
+ obj[0].handle = pin_scanout(dpy, output, &fb);
+ gem_execbuf(i915, &execbuf);
+ igt_info("Scanout GTT address: %#llx\n", obj[0].offset);
+
+ /* Relocations should match the scanout address */
+ reloc.target_handle = obj[0].handle;
+ reloc.delta = 0;
+ reloc.presumed_offset = -1;
+ reloc.offset = 4000;
+ obj[1].relocation_count = 1;
+ obj[1].relocs_ptr = to_user_pointer(&reloc);
+ gem_execbuf(i915, &execbuf);
+ igt_info("Reloc address: %#llx\n", reloc.presumed_offset);
+ igt_assert_eq_u64(reloc.presumed_offset, obj[0].offset);
+
+ gem_sync(i915, obj[1].handle);
+ map = gem_mmap__device_coherent(i915, obj[1].handle,
+ 0, 4096, PROT_WRITE);
+ igt_assert_eq_u64(map[500], obj[0].offset);
+ munmap(map, 4096);
+
+ /* And finally softpinning with the scanout address should work */
+ obj[0].flags |= EXEC_OBJECT_PINNED;
+ obj[1].relocation_count = 0;
+ gem_execbuf(i915, &execbuf);
+ igt_assert_eq_u64(obj[0].offset, reloc.presumed_offset);
+
+ gem_close(i915, obj[1].handle);
+ igt_remove_fb(dpy->drm_fd, &fb);
+}
+
#define I915_GEM_GPU_DOMAINS \
(I915_GEM_DOMAIN_RENDER | \
I915_GEM_DOMAIN_SAMPLER | \
@@ -1511,6 +1590,29 @@ igt_main
igt_subtest("invalid-domains")
invalid_domains(fd);
+ igt_subtest_group {
+ igt_display_t display = {
+ .drm_fd = fd,
+ .n_pipes = IGT_MAX_PIPES
+ };
+
+ igt_fixture {
+ igt_device_set_master(fd);
+ kmstest_set_vt_graphics_mode();
+ igt_display_require(&display, fd);
+ }
+
+ igt_subtest_with_dynamic("basic-scanout") {
+ __for_each_physical_engine(fd, e) {
+ igt_dynamic_f("%s", e->name)
+ scanout(fd, &display, e);
+ }
+ }
+
+ igt_fixture
+ igt_display_fini(&display);
+ }
+
igt_fixture
close(fd);
}
--
2.30.0
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t] i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers
@ 2021-02-16 14:32 ` Chris Wilson
0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2021-02-16 14:32 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev, Matthew Auld, Chris Wilson
In light of the VT-d workarounds, we may introduce padding around the
scanout vma. This should not affect relocations referencing the scanout
on !full-ppgtt where we leak the GGTT address of scanout to users.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
---
tests/i915/gem_exec_reloc.c | 102 ++++++++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index cc9b8cd6d..98960bb84 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -26,7 +26,9 @@
#include "i915/gem.h"
#include "igt.h"
+#include "igt_device.h"
#include "igt_dummyload.h"
+#include "igt_kms.h"
#include "sw_sync.h"
IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations.");
@@ -1286,6 +1288,83 @@ static void concurrent(int i915, int num_common)
igt_assert_eq(result, 0);
}
+static uint32_t
+pin_scanout(igt_display_t *dpy, igt_output_t *output, struct igt_fb *fb)
+{
+ drmModeModeInfoPtr mode;
+ igt_plane_t *primary;
+
+ mode = igt_output_get_mode(output);
+
+ igt_create_pattern_fb(dpy->drm_fd, mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888,
+ LOCAL_I915_FORMAT_MOD_X_TILED, fb);
+
+ primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+ igt_plane_set_fb(primary, fb);
+
+ igt_display_commit2(dpy, COMMIT_LEGACY);
+
+ return fb->gem_handle;
+}
+
+static void scanout(int i915,
+ igt_display_t *dpy,
+ const struct intel_execution_engine2 *e)
+{
+ struct drm_i915_gem_relocation_entry reloc;
+ struct drm_i915_gem_exec_object2 obj[2] = {
+ [1] = { .handle = batch_create(i915) },
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(obj),
+ .buffer_count = 2,
+ };
+ igt_output_t *output;
+ struct igt_fb fb;
+ uint64_t *map;
+
+ igt_display_reset(dpy);
+
+ output = igt_get_single_output_for_pipe(dpy, PIPE_A);
+ igt_require(output);
+ igt_output_set_pipe(output, PIPE_A);
+
+ /*
+ * Find where the scanout is in our GTT; on !full-ppgtt this will be
+ * the actual GGTT address of the scanout.
+ */
+ obj[0].handle = pin_scanout(dpy, output, &fb);
+ gem_execbuf(i915, &execbuf);
+ igt_info("Scanout GTT address: %#llx\n", obj[0].offset);
+
+ /* Relocations should match the scanout address */
+ reloc.target_handle = obj[0].handle;
+ reloc.delta = 0;
+ reloc.presumed_offset = -1;
+ reloc.offset = 4000;
+ obj[1].relocation_count = 1;
+ obj[1].relocs_ptr = to_user_pointer(&reloc);
+ gem_execbuf(i915, &execbuf);
+ igt_info("Reloc address: %#llx\n", reloc.presumed_offset);
+ igt_assert_eq_u64(reloc.presumed_offset, obj[0].offset);
+
+ gem_sync(i915, obj[1].handle);
+ map = gem_mmap__device_coherent(i915, obj[1].handle,
+ 0, 4096, PROT_WRITE);
+ igt_assert_eq_u64(map[500], obj[0].offset);
+ munmap(map, 4096);
+
+ /* And finally softpinning with the scanout address should work */
+ obj[0].flags |= EXEC_OBJECT_PINNED;
+ obj[1].relocation_count = 0;
+ gem_execbuf(i915, &execbuf);
+ igt_assert_eq_u64(obj[0].offset, reloc.presumed_offset);
+
+ gem_close(i915, obj[1].handle);
+ igt_remove_fb(dpy->drm_fd, &fb);
+}
+
#define I915_GEM_GPU_DOMAINS \
(I915_GEM_DOMAIN_RENDER | \
I915_GEM_DOMAIN_SAMPLER | \
@@ -1511,6 +1590,29 @@ igt_main
igt_subtest("invalid-domains")
invalid_domains(fd);
+ igt_subtest_group {
+ igt_display_t display = {
+ .drm_fd = fd,
+ .n_pipes = IGT_MAX_PIPES
+ };
+
+ igt_fixture {
+ igt_device_set_master(fd);
+ kmstest_set_vt_graphics_mode();
+ igt_display_require(&display, fd);
+ }
+
+ igt_subtest_with_dynamic("basic-scanout") {
+ __for_each_physical_engine(fd, e) {
+ igt_dynamic_f("%s", e->name)
+ scanout(fd, &display, e);
+ }
+ }
+
+ igt_fixture
+ igt_display_fini(&display);
+ }
+
igt_fixture
close(fd);
}
--
2.30.0
_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers
2021-02-16 14:32 ` [igt-dev] " Chris Wilson
(?)
@ 2021-02-16 15:29 ` Patchwork
-1 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2021-02-16 15:29 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
[-- Attachment #1.1: Type: text/plain, Size: 2889 bytes --]
== Series Details ==
Series: i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers
URL : https://patchwork.freedesktop.org/series/87127/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9779 -> IGTPW_5515
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_5515 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_5515, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5515/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_5515:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9779/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5515/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
Known issues
------------
Here are the changes found in IGTPW_5515 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_getparams_basic@basic-subslice-total:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9779/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5515/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
#### Possible fixes ####
* igt@prime_vgem@basic-fence-flip:
- fi-tgl-y: [DMESG-WARN][5] ([i915#402]) -> [PASS][6] +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9779/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5515/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (45 -> 38)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-dg1-1 fi-bdw-samus fi-skl-6600u
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_6004 -> IGTPW_5515
CI-20190529: 20190529
CI_DRM_9779: 775dbe8d5e041442fcadf63894468a63582a87a2 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5515: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5515/index.html
IGT_6004: fe9ac2aeffc1828c6d61763a611a44fbd450aa96 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@gem_exec_reloc@basic-scanout
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5515/index.html
[-- Attachment #1.2: Type: text/html, Size: 3618 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers
2021-02-16 14:32 ` [igt-dev] " Chris Wilson
(?)
(?)
@ 2021-02-16 16:49 ` Matthew Auld
2021-02-16 17:14 ` Chris Wilson
-1 siblings, 1 reply; 8+ messages in thread
From: Matthew Auld @ 2021-02-16 16:49 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev, Intel Graphics Development, Matthew Auld
On Tue, 16 Feb 2021 at 14:32, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> In light of the VT-d workarounds, we may introduce padding around the
> scanout vma. This should not affect relocations referencing the scanout
> on !full-ppgtt where we leak the GGTT address of scanout to users.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> ---
> tests/i915/gem_exec_reloc.c | 102 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 102 insertions(+)
>
> diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
> index cc9b8cd6d..98960bb84 100644
> --- a/tests/i915/gem_exec_reloc.c
> +++ b/tests/i915/gem_exec_reloc.c
> @@ -26,7 +26,9 @@
>
> #include "i915/gem.h"
> #include "igt.h"
> +#include "igt_device.h"
> #include "igt_dummyload.h"
> +#include "igt_kms.h"
> #include "sw_sync.h"
>
> IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations.");
> @@ -1286,6 +1288,83 @@ static void concurrent(int i915, int num_common)
> igt_assert_eq(result, 0);
> }
>
> +static uint32_t
> +pin_scanout(igt_display_t *dpy, igt_output_t *output, struct igt_fb *fb)
> +{
> + drmModeModeInfoPtr mode;
> + igt_plane_t *primary;
> +
> + mode = igt_output_get_mode(output);
> +
> + igt_create_pattern_fb(dpy->drm_fd, mode->hdisplay, mode->vdisplay,
> + DRM_FORMAT_XRGB8888,
> + LOCAL_I915_FORMAT_MOD_X_TILED, fb);
> +
> + primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
> + igt_plane_set_fb(primary, fb);
> +
> + igt_display_commit2(dpy, COMMIT_LEGACY);
> +
> + return fb->gem_handle;
> +}
> +
> +static void scanout(int i915,
> + igt_display_t *dpy,
> + const struct intel_execution_engine2 *e)
Missing feeding the engine into the execbuf?
I didn't really understand all the specifics of the kms stuff, but in
terms of coverage, I think this makes sense,
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers
2021-02-16 16:49 ` [Intel-gfx] [igt-dev] [PATCH i-g-t] " Matthew Auld
@ 2021-02-16 17:14 ` Chris Wilson
0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2021-02-16 17:14 UTC (permalink / raw)
To: Matthew Auld; +Cc: igt-dev, Intel Graphics Development, Matthew Auld
Quoting Matthew Auld (2021-02-16 16:49:28)
> On Tue, 16 Feb 2021 at 14:32, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >
> > In light of the VT-d workarounds, we may introduce padding around the
> > scanout vma. This should not affect relocations referencing the scanout
> > on !full-ppgtt where we leak the GGTT address of scanout to users.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > ---
> > tests/i915/gem_exec_reloc.c | 102 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 102 insertions(+)
> >
> > diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
> > index cc9b8cd6d..98960bb84 100644
> > --- a/tests/i915/gem_exec_reloc.c
> > +++ b/tests/i915/gem_exec_reloc.c
> > @@ -26,7 +26,9 @@
> >
> > #include "i915/gem.h"
> > #include "igt.h"
> > +#include "igt_device.h"
> > #include "igt_dummyload.h"
> > +#include "igt_kms.h"
> > #include "sw_sync.h"
> >
> > IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations.");
> > @@ -1286,6 +1288,83 @@ static void concurrent(int i915, int num_common)
> > igt_assert_eq(result, 0);
> > }
> >
> > +static uint32_t
> > +pin_scanout(igt_display_t *dpy, igt_output_t *output, struct igt_fb *fb)
> > +{
> > + drmModeModeInfoPtr mode;
> > + igt_plane_t *primary;
> > +
> > + mode = igt_output_get_mode(output);
> > +
> > + igt_create_pattern_fb(dpy->drm_fd, mode->hdisplay, mode->vdisplay,
> > + DRM_FORMAT_XRGB8888,
> > + LOCAL_I915_FORMAT_MOD_X_TILED, fb);
> > +
> > + primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
> > + igt_plane_set_fb(primary, fb);
> > +
> > + igt_display_commit2(dpy, COMMIT_LEGACY);
> > +
> > + return fb->gem_handle;
> > +}
> > +
> > +static void scanout(int i915,
> > + igt_display_t *dpy,
> > + const struct intel_execution_engine2 *e)
>
> Missing feeding the engine into the execbuf?
Oops. Pretty pointless in making it loop over the engines without
selecting one!
-Chris
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers
@ 2021-02-16 17:14 ` Chris Wilson
0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2021-02-16 17:14 UTC (permalink / raw)
To: Matthew Auld; +Cc: igt-dev, Intel Graphics Development, Matthew Auld
Quoting Matthew Auld (2021-02-16 16:49:28)
> On Tue, 16 Feb 2021 at 14:32, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >
> > In light of the VT-d workarounds, we may introduce padding around the
> > scanout vma. This should not affect relocations referencing the scanout
> > on !full-ppgtt where we leak the GGTT address of scanout to users.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > ---
> > tests/i915/gem_exec_reloc.c | 102 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 102 insertions(+)
> >
> > diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
> > index cc9b8cd6d..98960bb84 100644
> > --- a/tests/i915/gem_exec_reloc.c
> > +++ b/tests/i915/gem_exec_reloc.c
> > @@ -26,7 +26,9 @@
> >
> > #include "i915/gem.h"
> > #include "igt.h"
> > +#include "igt_device.h"
> > #include "igt_dummyload.h"
> > +#include "igt_kms.h"
> > #include "sw_sync.h"
> >
> > IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations.");
> > @@ -1286,6 +1288,83 @@ static void concurrent(int i915, int num_common)
> > igt_assert_eq(result, 0);
> > }
> >
> > +static uint32_t
> > +pin_scanout(igt_display_t *dpy, igt_output_t *output, struct igt_fb *fb)
> > +{
> > + drmModeModeInfoPtr mode;
> > + igt_plane_t *primary;
> > +
> > + mode = igt_output_get_mode(output);
> > +
> > + igt_create_pattern_fb(dpy->drm_fd, mode->hdisplay, mode->vdisplay,
> > + DRM_FORMAT_XRGB8888,
> > + LOCAL_I915_FORMAT_MOD_X_TILED, fb);
> > +
> > + primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
> > + igt_plane_set_fb(primary, fb);
> > +
> > + igt_display_commit2(dpy, COMMIT_LEGACY);
> > +
> > + return fb->gem_handle;
> > +}
> > +
> > +static void scanout(int i915,
> > + igt_display_t *dpy,
> > + const struct intel_execution_engine2 *e)
>
> Missing feeding the engine into the execbuf?
Oops. Pretty pointless in making it loop over the engines without
selecting one!
-Chris
_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] [PATCH i-g-t] i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers
2021-02-16 14:32 ` [igt-dev] " Chris Wilson
` (2 preceding siblings ...)
(?)
@ 2021-02-16 17:20 ` Chris Wilson
-1 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2021-02-16 17:20 UTC (permalink / raw)
To: intel-gfx; +Cc: igt-dev, Matthew Auld, Chris Wilson
In light of the VT-d workarounds, we may introduce padding around the
scanout vma. This should not affect relocations referencing the scanout
on !full-ppgtt where we leak the GGTT address of scanout to users.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
---
tests/i915/gem_exec_reloc.c | 102 ++++++++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index cc9b8cd6d..23057f76e 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -26,7 +26,9 @@
#include "i915/gem.h"
#include "igt.h"
+#include "igt_device.h"
#include "igt_dummyload.h"
+#include "igt_kms.h"
#include "sw_sync.h"
IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations.");
@@ -1286,6 +1288,83 @@ static void concurrent(int i915, int num_common)
igt_assert_eq(result, 0);
}
+static uint32_t
+pin_scanout(igt_display_t *dpy, igt_output_t *output, struct igt_fb *fb)
+{
+ drmModeModeInfoPtr mode = igt_output_get_mode(output);
+ igt_plane_t *primary;
+
+ igt_create_pattern_fb(dpy->drm_fd, mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888,
+ LOCAL_I915_FORMAT_MOD_X_TILED, fb);
+
+ primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+ igt_plane_set_fb(primary, fb);
+
+ igt_display_commit2(dpy, COMMIT_LEGACY);
+
+ return fb->gem_handle;
+}
+
+static void scanout(int i915,
+ igt_display_t *dpy,
+ const struct intel_execution_engine2 *e)
+{
+ struct drm_i915_gem_relocation_entry reloc;
+ struct drm_i915_gem_exec_object2 obj[2] = {
+ [1] = { .handle = batch_create(i915) },
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(obj),
+ .buffer_count = 2,
+ .flags = e->flags,
+ };
+ igt_output_t *output;
+ struct igt_fb fb;
+ uint64_t *map;
+
+ igt_display_reset(dpy);
+
+ output = igt_get_single_output_for_pipe(dpy, PIPE_A);
+ igt_require(output);
+ igt_output_set_pipe(output, PIPE_A);
+
+ /*
+ * Find where the scanout is in our GTT; on !full-ppgtt this will be
+ * the actual GGTT address of the scanout.
+ */
+ obj[0].handle = pin_scanout(dpy, output, &fb);
+ gem_execbuf(i915, &execbuf);
+ igt_info("Scanout GTT address: %#llx\n", obj[0].offset);
+
+ /* Relocations should match the scanout address */
+ reloc.target_handle = obj[0].handle;
+ reloc.delta = 0;
+ reloc.presumed_offset = -1;
+ reloc.offset = 4000;
+ obj[1].relocation_count = 1;
+ obj[1].relocs_ptr = to_user_pointer(&reloc);
+ gem_execbuf(i915, &execbuf);
+ igt_info("Reloc address: %#llx\n", reloc.presumed_offset);
+ igt_assert_eq_u64(reloc.presumed_offset, obj[0].offset);
+
+ /* The address written into the batch should match the relocation */
+ gem_sync(i915, obj[1].handle);
+ map = gem_mmap__device_coherent(i915, obj[1].handle,
+ 0, 4096, PROT_WRITE);
+ igt_assert_eq_u64(map[500], obj[0].offset);
+ munmap(map, 4096);
+
+ /* And finally softpinning with the scanout address should work */
+ obj[0].flags |= EXEC_OBJECT_PINNED;
+ obj[1].relocation_count = 0;
+ gem_execbuf(i915, &execbuf);
+ igt_assert_eq_u64(obj[0].offset, reloc.presumed_offset);
+
+ gem_close(i915, obj[1].handle);
+ igt_remove_fb(dpy->drm_fd, &fb);
+}
+
#define I915_GEM_GPU_DOMAINS \
(I915_GEM_DOMAIN_RENDER | \
I915_GEM_DOMAIN_SAMPLER | \
@@ -1511,6 +1590,29 @@ igt_main
igt_subtest("invalid-domains")
invalid_domains(fd);
+ igt_subtest_group {
+ igt_display_t display = {
+ .drm_fd = fd,
+ .n_pipes = IGT_MAX_PIPES
+ };
+
+ igt_fixture {
+ igt_device_set_master(fd);
+ kmstest_set_vt_graphics_mode();
+ igt_display_require(&display, fd);
+ }
+
+ igt_subtest_with_dynamic("basic-scanout") {
+ __for_each_physical_engine(fd, e) {
+ igt_dynamic_f("%s", e->name)
+ scanout(fd, &display, e);
+ }
+ }
+
+ igt_fixture
+ igt_display_fini(&display);
+ }
+
igt_fixture
close(fd);
}
--
2.30.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers (rev2)
2021-02-16 14:32 ` [igt-dev] " Chris Wilson
` (3 preceding siblings ...)
(?)
@ 2021-02-16 18:13 ` Patchwork
-1 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2021-02-16 18:13 UTC (permalink / raw)
To: Chris Wilson; +Cc: igt-dev
[-- Attachment #1.1: Type: text/plain, Size: 2843 bytes --]
== Series Details ==
Series: i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers (rev2)
URL : https://patchwork.freedesktop.org/series/87127/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9779 -> IGTPW_5518
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_5518 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_5518, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5518/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_5518:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@blt:
- fi-snb-2600: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9779/fi-snb-2600/igt@i915_selftest@live@blt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5518/fi-snb-2600/igt@i915_selftest@live@blt.html
Known issues
------------
Here are the changes found in IGTPW_5518 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9779/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5518/fi-tgl-y/igt@debugfs_test@read_all_entries.html
#### Possible fixes ####
* igt@prime_vgem@basic-fence-flip:
- fi-tgl-y: [DMESG-WARN][5] ([i915#402]) -> [PASS][6] +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9779/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5518/fi-tgl-y/igt@prime_vgem@basic-fence-flip.html
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (45 -> 39)
------------------------------
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-dg1-1 fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_6004 -> IGTPW_5518
CI-20190529: 20190529
CI_DRM_9779: 775dbe8d5e041442fcadf63894468a63582a87a2 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5518: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5518/index.html
IGT_6004: fe9ac2aeffc1828c6d61763a611a44fbd450aa96 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@gem_exec_reloc@basic-scanout
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5518/index.html
[-- Attachment #1.2: Type: text/html, Size: 3572 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 8+ messages in thread
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2021-02-16 14:32 [Intel-gfx] [PATCH i-g-t] i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers Chris Wilson
2021-02-16 14:32 ` [igt-dev] " Chris Wilson
2021-02-16 15:29 ` [igt-dev] ✗ Fi.CI.BAT: failure for " Patchwork
2021-02-16 16:49 ` [Intel-gfx] [igt-dev] [PATCH i-g-t] " Matthew Auld
2021-02-16 17:14 ` Chris Wilson
2021-02-16 17:14 ` Chris Wilson
2021-02-16 17:20 ` [Intel-gfx] " Chris Wilson
2021-02-16 18:13 ` [igt-dev] ✗ Fi.CI.BAT: failure for i915/gem_exec_reloc: Verify relocations with pinned scanout framebuffers (rev2) Patchwork
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