* [PATCH v3 0/2] mtd: spi-nor: OTP support
@ 2021-02-16 16:28 ` Michael Walle
0 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-02-16 16:28 UTC (permalink / raw)
To: linux-kernel, linux-mtd
Cc: Tudor Ambarus, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Michael Walle
The first version of this patchset was posted over a year ago and since
then, there was not a single comment. I have to admit, this is rather
frustrating. I've now stripped down the patchset to only two patches and
moved the code into an own module otp.c. If you like, I can also add myself
to a reviewer for the OTP code.
This patchset implements the MTD OTP functions to allow access to the SPI
OTP data. Specific support is added for Winbond flash chips.
In the past there was already an attempt by Rahul Bedarkar to add this, but
there was no response. These patches are slightly based on his work.
https://lore.kernel.org/linux-mtd/1489754636-21461-1-git-send-email-rahul.bedarkar@imgtec.com/
Changes since v2:
- improved commit messages
- add buffer size check in spi_nor_mtd_otp_info(). just to be sure, the
buffer is hardcoded to 4k by the mtd subsys
- moved all code to otp.c
- dropped the patches introduced in v2
Changes since v1:
- added methods for Macronix and similar flashes
- added patch to cleanup/consolidate code in core.c
Michael Walle (2):
mtd: spi-nor: add OTP support
mtd: spi-nor: implement OTP support for Winbond and similar flashes
drivers/mtd/spi-nor/Makefile | 1 +
drivers/mtd/spi-nor/core.c | 10 +-
drivers/mtd/spi-nor/core.h | 56 ++++++
drivers/mtd/spi-nor/otp.c | 313 ++++++++++++++++++++++++++++++++++
drivers/mtd/spi-nor/winbond.c | 17 +-
include/linux/mtd/spi-nor.h | 9 +
6 files changed, 403 insertions(+), 3 deletions(-)
create mode 100644 drivers/mtd/spi-nor/otp.c
--
2.20.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 0/2] mtd: spi-nor: OTP support
@ 2021-02-16 16:28 ` Michael Walle
0 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-02-16 16:28 UTC (permalink / raw)
To: linux-kernel, linux-mtd
Cc: Richard Weinberger, Michael Walle, Miquel Raynal,
Vignesh Raghavendra, Tudor Ambarus
The first version of this patchset was posted over a year ago and since
then, there was not a single comment. I have to admit, this is rather
frustrating. I've now stripped down the patchset to only two patches and
moved the code into an own module otp.c. If you like, I can also add myself
to a reviewer for the OTP code.
This patchset implements the MTD OTP functions to allow access to the SPI
OTP data. Specific support is added for Winbond flash chips.
In the past there was already an attempt by Rahul Bedarkar to add this, but
there was no response. These patches are slightly based on his work.
https://lore.kernel.org/linux-mtd/1489754636-21461-1-git-send-email-rahul.bedarkar@imgtec.com/
Changes since v2:
- improved commit messages
- add buffer size check in spi_nor_mtd_otp_info(). just to be sure, the
buffer is hardcoded to 4k by the mtd subsys
- moved all code to otp.c
- dropped the patches introduced in v2
Changes since v1:
- added methods for Macronix and similar flashes
- added patch to cleanup/consolidate code in core.c
Michael Walle (2):
mtd: spi-nor: add OTP support
mtd: spi-nor: implement OTP support for Winbond and similar flashes
drivers/mtd/spi-nor/Makefile | 1 +
drivers/mtd/spi-nor/core.c | 10 +-
drivers/mtd/spi-nor/core.h | 56 ++++++
drivers/mtd/spi-nor/otp.c | 313 ++++++++++++++++++++++++++++++++++
drivers/mtd/spi-nor/winbond.c | 17 +-
include/linux/mtd/spi-nor.h | 9 +
6 files changed, 403 insertions(+), 3 deletions(-)
create mode 100644 drivers/mtd/spi-nor/otp.c
--
2.20.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 1/2] mtd: spi-nor: add OTP support
2021-02-16 16:28 ` Michael Walle
@ 2021-02-16 16:28 ` Michael Walle
-1 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-02-16 16:28 UTC (permalink / raw)
To: linux-kernel, linux-mtd
Cc: Tudor Ambarus, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Michael Walle
SPI flashes sometimes have a special OTP area, which can (and is) used to
store immutable properties like board serial number or vendor assigned
network hardware addresses.
The MTD subsystem already supports accessing such areas and some (non
SPI-NOR) flashes already implement support for it. It differentiates
between user and factory areas. User areas can be written by the user and
factory ones are pre-programmed and locked down by the vendor, usually
containing an "electrical serial number". This patch will only add support
for the user areas.
Lay the foundation and implement the MTD callbacks for the SPI-NOR and add
necessary parameters to the flash_info structure. If a flash supports OTP
it can be added by the convenience macro OTP_INFO(). Sometimes there are
individual regions, which might have individual offsets. Therefore, it is
possible to specify the starting address of the first regions as well as
the distance between two regions (e.g. Winbond devices uses this method).
Additionally, the regions might be locked down. Once locked, no further
write access is possible.
For SPI-NOR flashes the OTP area is accessed like the normal memory, e.g.
by offset addressing; except that you either have to use special read/write
commands (Winbond) or you have to enter (and exit) a specific OTP mode
(Macronix, Micron).
Thus we introduce four operations to which the MTD callbacks will be
mapped: .read(), .write(), .lock() and .is_locked(). The read and the write
ops will be given an address offset to operate on while the locking ops use
regions because locking always affects a whole region. It is up to the
flash driver to implement these ops.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/mtd/spi-nor/Makefile | 1 +
drivers/mtd/spi-nor/core.c | 8 ++
drivers/mtd/spi-nor/core.h | 50 +++++++++++
drivers/mtd/spi-nor/otp.c | 157 +++++++++++++++++++++++++++++++++++
4 files changed, 216 insertions(+)
create mode 100644 drivers/mtd/spi-nor/otp.c
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index 653923896205..2ed2e76ce4f1 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -12,6 +12,7 @@ spi-nor-objs += intel.o
spi-nor-objs += issi.o
spi-nor-objs += macronix.o
spi-nor-objs += micron-st.o
+spi-nor-objs += otp.o
spi-nor-objs += spansion.o
spi-nor-objs += sst.o
spi-nor-objs += winbond.o
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0522304f52fa..af9d7f194f01 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3012,6 +3012,12 @@ static void spi_nor_info_init_params(struct spi_nor *nor)
spi_nor_set_erase_type(&map->erase_type[i], info->sector_size,
SPINOR_OP_SE);
spi_nor_init_uniform_erase_map(map, erase_mask, params->size);
+
+ /* OTP parameters */
+ nor->params->otp_info.otp_size = info->otp_size;
+ nor->params->otp_info.n_otps = info->n_otps;
+ nor->params->otp_info.otp_start_addr = info->otp_start_addr;
+ nor->params->otp_info.otp_addr_offset = info->otp_addr_offset;
}
/**
@@ -3502,6 +3508,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
mtd->_is_locked = spi_nor_is_locked;
}
+ spi_nor_otp_init(nor);
+
if (info->flags & USE_FSR)
nor->flags |= SNOR_F_USE_FSR;
if (info->flags & SPI_NOR_HAS_TB) {
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 4a3f7f150b5d..5fb54ae08c5b 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -175,6 +175,21 @@ struct spi_nor_erase_map {
u8 uniform_erase_type;
};
+/**
+ * struct spi_nor_otp_info - Structure to describe the SPI NOR OTP region
+ * @otp_size: size of one OTP region in bytes.
+ * @n_otps: number of individual OTP regions.
+ * @otp_start_addr: start address of the OTP area.
+ * @otp_addr_offset: offset between consecutive OTP regions if there are
+ * more than one.
+ */
+struct spi_nor_otp_info {
+ u32 otp_size;
+ int n_otps;
+ u32 otp_start_addr;
+ u32 otp_addr_offset;
+};
+
/**
* struct spi_nor_locking_ops - SPI NOR locking methods
* @lock: lock a region of the SPI NOR.
@@ -187,6 +202,20 @@ struct spi_nor_locking_ops {
int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
};
+/**
+ * struct spi_nor_otp_ops - SPI NOR OTP methods
+ * @read: read from the SPI NOR OTP area.
+ * @write: write to the SPI NOR OTP area.
+ * @lock: lock an OTP region.
+ * @is_locked: check if an OTP region of the SPI NOR is locked.
+ */
+struct spi_nor_otp_ops {
+ int (*read)(struct spi_nor *nor, loff_t ofs, uint64_t len, u8 *buf);
+ int (*write)(struct spi_nor *nor, loff_t ofs, uint64_t len, u8 *buf);
+ int (*lock)(struct spi_nor *nor, unsigned int region);
+ int (*is_locked)(struct spi_nor *nor, unsigned int region);
+};
+
/**
* struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
* Includes legacy flash parameters and settings that can be overwritten
@@ -208,6 +237,7 @@ struct spi_nor_locking_ops {
* higher index in the array, the higher priority.
* @erase_map: the erase map parsed from the SFDP Sector Map Parameter
* Table.
+ * @otp_info: describes the OTP regions.
* @octal_dtr_enable: enables SPI NOR octal DTR mode.
* @quad_enable: enables SPI NOR quad mode.
* @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
@@ -219,6 +249,7 @@ struct spi_nor_locking_ops {
* e.g. different opcodes, specific address calculation,
* page size, etc.
* @locking_ops: SPI NOR locking methods.
+ * @otp_ops: SPI NOR OTP methods.
*/
struct spi_nor_flash_parameter {
u64 size;
@@ -232,6 +263,7 @@ struct spi_nor_flash_parameter {
struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
struct spi_nor_erase_map erase_map;
+ struct spi_nor_otp_info otp_info;
int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
int (*quad_enable)(struct spi_nor *nor);
@@ -240,6 +272,7 @@ struct spi_nor_flash_parameter {
int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
const struct spi_nor_locking_ops *locking_ops;
+ const struct spi_nor_otp_ops *otp_ops;
};
/**
@@ -341,6 +374,15 @@ struct flash_info {
/* Part specific fixup hooks. */
const struct spi_nor_fixups *fixups;
+
+ /* OTP size in bytes */
+ u16 otp_size;
+ /* Number of OTP banks */
+ u16 n_otps;
+ /* Start address of OTP area */
+ u32 otp_start_addr;
+ /* Offset between consecutive OTP banks if there are more than one */
+ u32 otp_addr_offset;
};
/* Used when the "_ext_id" is two bytes at most */
@@ -393,6 +435,12 @@ struct flash_info {
.addr_width = 3, \
.flags = SPI_NOR_NO_FR | SPI_NOR_XSR_RDY,
+#define OTP_INFO(_otp_size, _n_otps, _otp_start_addr, _otp_addr_offset) \
+ .otp_size = (_otp_size), \
+ .n_otps = (_n_otps), \
+ .otp_start_addr = (_otp_start_addr), \
+ .otp_addr_offset = (_otp_addr_offset),
+
/**
* struct spi_nor_manufacturer - SPI NOR manufacturer object
* @name: manufacturer name
@@ -473,6 +521,8 @@ int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
const struct sfdp_bfpt *bfpt,
struct spi_nor_flash_parameter *params);
+void spi_nor_otp_init(struct spi_nor *nor);
+
static struct spi_nor __maybe_unused *mtd_to_spi_nor(struct mtd_info *mtd)
{
return mtd->priv;
diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
new file mode 100644
index 000000000000..59bd1a3f450d
--- /dev/null
+++ b/drivers/mtd/spi-nor/otp.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * OTP support for SPI-NOR flashes
+ *
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
+ */
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/spi-nor.h>
+
+#include "core.h"
+
+static loff_t spi_nor_otp_region_start(struct spi_nor *nor, int region)
+{
+ struct spi_nor_otp_info *info = &nor->params->otp_info;
+
+ return info->otp_start_addr + region * info->otp_addr_offset;
+}
+
+static loff_t spi_nor_otp_region_end(struct spi_nor *nor, int region)
+{
+ struct spi_nor_otp_info *info = &nor->params->otp_info;
+
+ return spi_nor_otp_region_start(nor, region) + info->otp_size - 1;
+}
+
+static int spi_nor_mtd_otp_info(struct mtd_info *mtd, size_t len,
+ size_t *retlen, struct otp_info *buf)
+{
+ struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ int n_otps = nor->params->otp_info.n_otps;
+ int locked, i;
+
+ if (len < n_otps * sizeof(*buf))
+ return -ENOSPC;
+
+ for (i = 0; i < n_otps; i++) {
+ buf[i].start = spi_nor_otp_region_start(nor, i);
+ buf[i].length = nor->params->otp_info.otp_size;
+
+ locked = nor->params->otp_ops->is_locked(nor, i);
+ if (locked < 0)
+ return locked;
+
+ buf[i].locked = !!locked;
+ }
+
+ *retlen = n_otps * sizeof(*buf);
+
+ return 0;
+}
+
+static int spi_nor_otp_addr_to_region(struct spi_nor *nor, loff_t addr)
+{
+ int i;
+
+ for (i = 0; i < nor->params->otp_info.n_otps; i++)
+ if (addr >= spi_nor_otp_region_start(nor, i) &&
+ addr <= spi_nor_otp_region_end(nor, i))
+ return i;
+
+ return -EINVAL;
+}
+
+static int spi_nor_mtd_otp_read_write(struct mtd_info *mtd, loff_t ofs,
+ size_t len, size_t *retlen, u_char *buf,
+ bool is_write)
+{
+ struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ int region;
+ int ret;
+
+ *retlen = 0;
+
+ region = spi_nor_otp_addr_to_region(nor, ofs);
+ if (region < 0)
+ return 0;
+
+ if (ofs < spi_nor_otp_region_start(nor, region))
+ return 0;
+
+ if ((ofs + len - 1) > spi_nor_otp_region_end(nor, region))
+ return 0;
+
+ ret = spi_nor_lock_and_prep(nor);
+
+ if (is_write)
+ ret = nor->params->otp_ops->write(nor, ofs, len, buf);
+ else
+ ret = nor->params->otp_ops->read(nor, ofs, len, buf);
+
+ spi_nor_unlock_and_unprep(nor);
+
+ if (ret < 0)
+ return ret;
+
+ *retlen = len;
+ return 0;
+}
+
+static int spi_nor_mtd_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ return spi_nor_mtd_otp_read_write(mtd, from, len, retlen, buf, false);
+}
+
+static int spi_nor_mtd_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ return spi_nor_mtd_otp_read_write(mtd, to, len, retlen, buf, true);
+}
+
+static int spi_nor_mtd_otp_lock(struct mtd_info *mtd, loff_t from, size_t len)
+{
+ struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ int region;
+ int ret;
+
+ region = spi_nor_otp_addr_to_region(nor, from);
+ if (region < 0)
+ return -EINVAL;
+
+ if (len != nor->params->otp_info.otp_size)
+ return -EINVAL;
+
+ ret = spi_nor_lock_and_prep(nor);
+ if (ret)
+ return ret;
+
+ ret = nor->params->otp_ops->lock(nor, region);
+
+ spi_nor_unlock_and_unprep(nor);
+
+ return ret;
+}
+
+void spi_nor_otp_init(struct spi_nor *nor)
+{
+ struct mtd_info *mtd = &nor->mtd;
+
+ if (!nor->params->otp_ops)
+ return;
+
+ /*
+ * We only support user_prot callbacks (yet).
+ *
+ * Some SPI-NOR flashes like Macronix ones can be ordered in two
+ * different variants. One with a factory locked OTP area and one where
+ * it is left to the user to write to it. The factory locked OTP is
+ * usually preprogrammed with an "electrical serial number". We don't
+ * support these for now.
+ */
+ mtd->_get_user_prot_info = spi_nor_mtd_otp_info;
+ mtd->_read_user_prot_reg = spi_nor_mtd_otp_read;
+ mtd->_write_user_prot_reg = spi_nor_mtd_otp_write;
+ mtd->_lock_user_prot_reg = spi_nor_mtd_otp_lock;
+}
--
2.20.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 1/2] mtd: spi-nor: add OTP support
@ 2021-02-16 16:28 ` Michael Walle
0 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-02-16 16:28 UTC (permalink / raw)
To: linux-kernel, linux-mtd
Cc: Richard Weinberger, Michael Walle, Miquel Raynal,
Vignesh Raghavendra, Tudor Ambarus
SPI flashes sometimes have a special OTP area, which can (and is) used to
store immutable properties like board serial number or vendor assigned
network hardware addresses.
The MTD subsystem already supports accessing such areas and some (non
SPI-NOR) flashes already implement support for it. It differentiates
between user and factory areas. User areas can be written by the user and
factory ones are pre-programmed and locked down by the vendor, usually
containing an "electrical serial number". This patch will only add support
for the user areas.
Lay the foundation and implement the MTD callbacks for the SPI-NOR and add
necessary parameters to the flash_info structure. If a flash supports OTP
it can be added by the convenience macro OTP_INFO(). Sometimes there are
individual regions, which might have individual offsets. Therefore, it is
possible to specify the starting address of the first regions as well as
the distance between two regions (e.g. Winbond devices uses this method).
Additionally, the regions might be locked down. Once locked, no further
write access is possible.
For SPI-NOR flashes the OTP area is accessed like the normal memory, e.g.
by offset addressing; except that you either have to use special read/write
commands (Winbond) or you have to enter (and exit) a specific OTP mode
(Macronix, Micron).
Thus we introduce four operations to which the MTD callbacks will be
mapped: .read(), .write(), .lock() and .is_locked(). The read and the write
ops will be given an address offset to operate on while the locking ops use
regions because locking always affects a whole region. It is up to the
flash driver to implement these ops.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/mtd/spi-nor/Makefile | 1 +
drivers/mtd/spi-nor/core.c | 8 ++
drivers/mtd/spi-nor/core.h | 50 +++++++++++
drivers/mtd/spi-nor/otp.c | 157 +++++++++++++++++++++++++++++++++++
4 files changed, 216 insertions(+)
create mode 100644 drivers/mtd/spi-nor/otp.c
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index 653923896205..2ed2e76ce4f1 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -12,6 +12,7 @@ spi-nor-objs += intel.o
spi-nor-objs += issi.o
spi-nor-objs += macronix.o
spi-nor-objs += micron-st.o
+spi-nor-objs += otp.o
spi-nor-objs += spansion.o
spi-nor-objs += sst.o
spi-nor-objs += winbond.o
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0522304f52fa..af9d7f194f01 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3012,6 +3012,12 @@ static void spi_nor_info_init_params(struct spi_nor *nor)
spi_nor_set_erase_type(&map->erase_type[i], info->sector_size,
SPINOR_OP_SE);
spi_nor_init_uniform_erase_map(map, erase_mask, params->size);
+
+ /* OTP parameters */
+ nor->params->otp_info.otp_size = info->otp_size;
+ nor->params->otp_info.n_otps = info->n_otps;
+ nor->params->otp_info.otp_start_addr = info->otp_start_addr;
+ nor->params->otp_info.otp_addr_offset = info->otp_addr_offset;
}
/**
@@ -3502,6 +3508,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
mtd->_is_locked = spi_nor_is_locked;
}
+ spi_nor_otp_init(nor);
+
if (info->flags & USE_FSR)
nor->flags |= SNOR_F_USE_FSR;
if (info->flags & SPI_NOR_HAS_TB) {
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 4a3f7f150b5d..5fb54ae08c5b 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -175,6 +175,21 @@ struct spi_nor_erase_map {
u8 uniform_erase_type;
};
+/**
+ * struct spi_nor_otp_info - Structure to describe the SPI NOR OTP region
+ * @otp_size: size of one OTP region in bytes.
+ * @n_otps: number of individual OTP regions.
+ * @otp_start_addr: start address of the OTP area.
+ * @otp_addr_offset: offset between consecutive OTP regions if there are
+ * more than one.
+ */
+struct spi_nor_otp_info {
+ u32 otp_size;
+ int n_otps;
+ u32 otp_start_addr;
+ u32 otp_addr_offset;
+};
+
/**
* struct spi_nor_locking_ops - SPI NOR locking methods
* @lock: lock a region of the SPI NOR.
@@ -187,6 +202,20 @@ struct spi_nor_locking_ops {
int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
};
+/**
+ * struct spi_nor_otp_ops - SPI NOR OTP methods
+ * @read: read from the SPI NOR OTP area.
+ * @write: write to the SPI NOR OTP area.
+ * @lock: lock an OTP region.
+ * @is_locked: check if an OTP region of the SPI NOR is locked.
+ */
+struct spi_nor_otp_ops {
+ int (*read)(struct spi_nor *nor, loff_t ofs, uint64_t len, u8 *buf);
+ int (*write)(struct spi_nor *nor, loff_t ofs, uint64_t len, u8 *buf);
+ int (*lock)(struct spi_nor *nor, unsigned int region);
+ int (*is_locked)(struct spi_nor *nor, unsigned int region);
+};
+
/**
* struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
* Includes legacy flash parameters and settings that can be overwritten
@@ -208,6 +237,7 @@ struct spi_nor_locking_ops {
* higher index in the array, the higher priority.
* @erase_map: the erase map parsed from the SFDP Sector Map Parameter
* Table.
+ * @otp_info: describes the OTP regions.
* @octal_dtr_enable: enables SPI NOR octal DTR mode.
* @quad_enable: enables SPI NOR quad mode.
* @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
@@ -219,6 +249,7 @@ struct spi_nor_locking_ops {
* e.g. different opcodes, specific address calculation,
* page size, etc.
* @locking_ops: SPI NOR locking methods.
+ * @otp_ops: SPI NOR OTP methods.
*/
struct spi_nor_flash_parameter {
u64 size;
@@ -232,6 +263,7 @@ struct spi_nor_flash_parameter {
struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
struct spi_nor_erase_map erase_map;
+ struct spi_nor_otp_info otp_info;
int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
int (*quad_enable)(struct spi_nor *nor);
@@ -240,6 +272,7 @@ struct spi_nor_flash_parameter {
int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
const struct spi_nor_locking_ops *locking_ops;
+ const struct spi_nor_otp_ops *otp_ops;
};
/**
@@ -341,6 +374,15 @@ struct flash_info {
/* Part specific fixup hooks. */
const struct spi_nor_fixups *fixups;
+
+ /* OTP size in bytes */
+ u16 otp_size;
+ /* Number of OTP banks */
+ u16 n_otps;
+ /* Start address of OTP area */
+ u32 otp_start_addr;
+ /* Offset between consecutive OTP banks if there are more than one */
+ u32 otp_addr_offset;
};
/* Used when the "_ext_id" is two bytes at most */
@@ -393,6 +435,12 @@ struct flash_info {
.addr_width = 3, \
.flags = SPI_NOR_NO_FR | SPI_NOR_XSR_RDY,
+#define OTP_INFO(_otp_size, _n_otps, _otp_start_addr, _otp_addr_offset) \
+ .otp_size = (_otp_size), \
+ .n_otps = (_n_otps), \
+ .otp_start_addr = (_otp_start_addr), \
+ .otp_addr_offset = (_otp_addr_offset),
+
/**
* struct spi_nor_manufacturer - SPI NOR manufacturer object
* @name: manufacturer name
@@ -473,6 +521,8 @@ int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
const struct sfdp_bfpt *bfpt,
struct spi_nor_flash_parameter *params);
+void spi_nor_otp_init(struct spi_nor *nor);
+
static struct spi_nor __maybe_unused *mtd_to_spi_nor(struct mtd_info *mtd)
{
return mtd->priv;
diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
new file mode 100644
index 000000000000..59bd1a3f450d
--- /dev/null
+++ b/drivers/mtd/spi-nor/otp.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * OTP support for SPI-NOR flashes
+ *
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
+ */
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/spi-nor.h>
+
+#include "core.h"
+
+static loff_t spi_nor_otp_region_start(struct spi_nor *nor, int region)
+{
+ struct spi_nor_otp_info *info = &nor->params->otp_info;
+
+ return info->otp_start_addr + region * info->otp_addr_offset;
+}
+
+static loff_t spi_nor_otp_region_end(struct spi_nor *nor, int region)
+{
+ struct spi_nor_otp_info *info = &nor->params->otp_info;
+
+ return spi_nor_otp_region_start(nor, region) + info->otp_size - 1;
+}
+
+static int spi_nor_mtd_otp_info(struct mtd_info *mtd, size_t len,
+ size_t *retlen, struct otp_info *buf)
+{
+ struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ int n_otps = nor->params->otp_info.n_otps;
+ int locked, i;
+
+ if (len < n_otps * sizeof(*buf))
+ return -ENOSPC;
+
+ for (i = 0; i < n_otps; i++) {
+ buf[i].start = spi_nor_otp_region_start(nor, i);
+ buf[i].length = nor->params->otp_info.otp_size;
+
+ locked = nor->params->otp_ops->is_locked(nor, i);
+ if (locked < 0)
+ return locked;
+
+ buf[i].locked = !!locked;
+ }
+
+ *retlen = n_otps * sizeof(*buf);
+
+ return 0;
+}
+
+static int spi_nor_otp_addr_to_region(struct spi_nor *nor, loff_t addr)
+{
+ int i;
+
+ for (i = 0; i < nor->params->otp_info.n_otps; i++)
+ if (addr >= spi_nor_otp_region_start(nor, i) &&
+ addr <= spi_nor_otp_region_end(nor, i))
+ return i;
+
+ return -EINVAL;
+}
+
+static int spi_nor_mtd_otp_read_write(struct mtd_info *mtd, loff_t ofs,
+ size_t len, size_t *retlen, u_char *buf,
+ bool is_write)
+{
+ struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ int region;
+ int ret;
+
+ *retlen = 0;
+
+ region = spi_nor_otp_addr_to_region(nor, ofs);
+ if (region < 0)
+ return 0;
+
+ if (ofs < spi_nor_otp_region_start(nor, region))
+ return 0;
+
+ if ((ofs + len - 1) > spi_nor_otp_region_end(nor, region))
+ return 0;
+
+ ret = spi_nor_lock_and_prep(nor);
+
+ if (is_write)
+ ret = nor->params->otp_ops->write(nor, ofs, len, buf);
+ else
+ ret = nor->params->otp_ops->read(nor, ofs, len, buf);
+
+ spi_nor_unlock_and_unprep(nor);
+
+ if (ret < 0)
+ return ret;
+
+ *retlen = len;
+ return 0;
+}
+
+static int spi_nor_mtd_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ return spi_nor_mtd_otp_read_write(mtd, from, len, retlen, buf, false);
+}
+
+static int spi_nor_mtd_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ return spi_nor_mtd_otp_read_write(mtd, to, len, retlen, buf, true);
+}
+
+static int spi_nor_mtd_otp_lock(struct mtd_info *mtd, loff_t from, size_t len)
+{
+ struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ int region;
+ int ret;
+
+ region = spi_nor_otp_addr_to_region(nor, from);
+ if (region < 0)
+ return -EINVAL;
+
+ if (len != nor->params->otp_info.otp_size)
+ return -EINVAL;
+
+ ret = spi_nor_lock_and_prep(nor);
+ if (ret)
+ return ret;
+
+ ret = nor->params->otp_ops->lock(nor, region);
+
+ spi_nor_unlock_and_unprep(nor);
+
+ return ret;
+}
+
+void spi_nor_otp_init(struct spi_nor *nor)
+{
+ struct mtd_info *mtd = &nor->mtd;
+
+ if (!nor->params->otp_ops)
+ return;
+
+ /*
+ * We only support user_prot callbacks (yet).
+ *
+ * Some SPI-NOR flashes like Macronix ones can be ordered in two
+ * different variants. One with a factory locked OTP area and one where
+ * it is left to the user to write to it. The factory locked OTP is
+ * usually preprogrammed with an "electrical serial number". We don't
+ * support these for now.
+ */
+ mtd->_get_user_prot_info = spi_nor_mtd_otp_info;
+ mtd->_read_user_prot_reg = spi_nor_mtd_otp_read;
+ mtd->_write_user_prot_reg = spi_nor_mtd_otp_write;
+ mtd->_lock_user_prot_reg = spi_nor_mtd_otp_lock;
+}
--
2.20.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 2/2] mtd: spi-nor: implement OTP support for Winbond and similar flashes
2021-02-16 16:28 ` Michael Walle
@ 2021-02-16 16:28 ` Michael Walle
-1 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-02-16 16:28 UTC (permalink / raw)
To: linux-kernel, linux-mtd
Cc: Tudor Ambarus, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Michael Walle
Use the new OTP ops to implement OTP access on Winbond flashes. Most
Winbond flashes provides up to four different OTP regions ("Security
Registers").
Winbond devices use a special opcode to read and write to the OTP
regions, just like the RDSFDP opcode. In fact, it seems that the
(undocumented) first OTP area of the newer flashes is the actual SFDP
table.
On a side note, Winbond devices also allow erasing the OTP regions as
long as the area isn't locked down.
This was tested on a Winbond W25Q32JW as well as on a W25Q32FW.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/mtd/spi-nor/core.c | 2 +-
drivers/mtd/spi-nor/core.h | 6 ++
drivers/mtd/spi-nor/otp.c | 163 ++++++++++++++++++++++++++++++++++
drivers/mtd/spi-nor/winbond.c | 17 +++-
include/linux/mtd/spi-nor.h | 9 ++
5 files changed, 194 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index af9d7f194f01..1115046e2680 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -1034,7 +1034,7 @@ static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1)
*
* Return: 0 on success, -errno otherwise.
*/
-static int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr)
+int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr)
{
int ret;
u8 *sr_cr = nor->bouncebuf;
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 5fb54ae08c5b..d755f2bf77e0 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -492,6 +492,7 @@ int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
+int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr);
ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
@@ -499,6 +500,11 @@ ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
const u8 *buf);
+int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, uint64_t len, u8 *buf);
+int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, uint64_t len, u8 *buf);
+int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
+int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
+
int spi_nor_hwcaps_read2cmd(u32 hwcaps);
u8 spi_nor_convert_3to4_read(u8 opcode);
void spi_nor_set_read_settings(struct spi_nor_read_command *read,
diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
index 59bd1a3f450d..89d055215d1e 100644
--- a/drivers/mtd/spi-nor/otp.c
+++ b/drivers/mtd/spi-nor/otp.c
@@ -10,6 +10,169 @@
#include "core.h"
+/**
+ * spi_nor_otp_read_secr() - read OTP data
+ * @nor: pointer to 'struct spi_nor'
+ * @from: offset to read from
+ * @len: number of bytes to read
+ * @buf: pointer to dst buffer
+ *
+ * Read OTP data by using the SPINOR_OP_RSECR commands. This method is used on
+ * GigaDevice and Winbond flashes.
+ *
+ * Return: number of bytes read successfully, -errno otherwise
+ */
+int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, uint64_t len, u8 *buf)
+{
+ u8 addr_width, read_opcode, read_dummy;
+ struct spi_mem_dirmap_desc *rdesc;
+ enum spi_nor_protocol read_proto;
+ int ret;
+
+ read_opcode = nor->read_opcode;
+ addr_width = nor->addr_width;
+ read_dummy = nor->read_dummy;
+ read_proto = nor->read_proto;
+ rdesc = nor->dirmap.rdesc;
+
+ nor->read_opcode = SPINOR_OP_RSECR;
+ nor->addr_width = 3;
+ nor->read_dummy = 8;
+ nor->read_proto = SNOR_PROTO_1_1_1;
+ nor->dirmap.rdesc = NULL;
+
+ ret = spi_nor_read_data(nor, addr, len, buf);
+
+ nor->read_opcode = read_opcode;
+ nor->addr_width = addr_width;
+ nor->read_dummy = read_dummy;
+ nor->read_proto = read_proto;
+ nor->dirmap.rdesc = rdesc;
+
+ return ret;
+}
+
+/**
+ * spi_nor_otp_write_secr() - write OTP data
+ * @nor: pointer to 'struct spi_nor'
+ * @to: offset to write to
+ * @len: number of bytes to write
+ * @buf: pointer to src buffer
+ *
+ * Write OTP data by using the SPINOR_OP_PSECR commands. This method is used on
+ * GigaDevice and Winbond flashes.
+ *
+ * Return: number of bytes written successfully, -errno otherwise
+ */
+int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, uint64_t len, u8 *buf)
+{
+ enum spi_nor_protocol write_proto;
+ struct spi_mem_dirmap_desc *wdesc;
+ u8 addr_width, program_opcode;
+ int ret;
+
+ program_opcode = nor->program_opcode;
+ addr_width = nor->addr_width;
+ write_proto = nor->write_proto;
+ wdesc = nor->dirmap.wdesc;
+
+ nor->program_opcode = SPINOR_OP_PSECR;
+ nor->addr_width = 3;
+ nor->write_proto = SNOR_PROTO_1_1_1;
+ nor->dirmap.wdesc = NULL;
+
+ /*
+ * We only support a write to one single page. For now all winbond
+ * flashes only have one page per OTP region.
+ */
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto out;
+
+ ret = spi_nor_write_data(nor, addr, len, buf);
+ if (ret < 0)
+ goto out;
+
+ ret = spi_nor_wait_till_ready(nor);
+
+out:
+ nor->program_opcode = program_opcode;
+ nor->addr_width = addr_width;
+ nor->write_proto = write_proto;
+ nor->dirmap.wdesc = wdesc;
+
+ return ret;
+}
+
+static int spi_nor_otp_lock_bit_cr(unsigned int region)
+{
+ static const int lock_bits[] = { SR2_LB1, SR2_LB2, SR2_LB3 };
+
+ if (region >= ARRAY_SIZE(lock_bits))
+ return -EINVAL;
+
+ return lock_bits[region];
+}
+
+/**
+ * spi_nor_otp_lock_sr2() - lock the OTP region
+ * @nor: pointer to 'struct spi_nor'
+ * @region: OTP region
+ *
+ * Lock the OTP region by writing the status register-2. This method is used on
+ * GigaDevice and Winbond flashes.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region)
+{
+ u8 *cr = nor->bouncebuf;
+ int lock_bit;
+ int ret;
+
+ lock_bit = spi_nor_otp_lock_bit_cr(region);
+ if (lock_bit < 0)
+ return lock_bit;
+
+ ret = spi_nor_read_cr(nor, cr);
+ if (ret)
+ return ret;
+
+ /* no need to write the register if region is already locked */
+ if (cr[0] & lock_bit)
+ return 0;
+
+ cr[0] |= lock_bit;
+
+ return spi_nor_write_16bit_cr_and_check(nor, cr[0]);
+}
+
+/**
+ * spi_nor_otp_is_locked_sr2() - get the OTP region lock status
+ * @nor: pointer to 'struct spi_nor'
+ * @region: OTP region
+ *
+ * Retrieve the OTP region lock bit by reading the status register-2. This
+ * method is used on GigaDevice and Winbond flashes.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region)
+{
+ u8 *cr = nor->bouncebuf;
+ int lock_bit;
+ int ret;
+
+ lock_bit = spi_nor_otp_lock_bit_cr(region);
+ if (lock_bit < 0)
+ return lock_bit;
+
+ ret = spi_nor_read_cr(nor, cr);
+ if (ret)
+ return ret;
+
+ return cr[0] & lock_bit;
+}
static loff_t spi_nor_otp_region_start(struct spi_nor *nor, int region)
{
struct spi_nor_otp_info *info = &nor->params->otp_info;
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index e5dfa786f190..d3bbd2df7500 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -55,14 +55,18 @@ static const struct flash_info winbond_parts[] = {
{ "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) },
{ "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ OTP_INFO(256, 3, 0x1000, 0x1000)
+ },
+
{ "w25q32jv", INFO(0xef7016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
{ "w25q32jwm", INFO(0xef8016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ OTP_INFO(256, 3, 0x1000, 0x1000) },
{ "w25q64jwm", INFO(0xef8017, 0, 64 * 1024, 128,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
@@ -131,9 +135,18 @@ static int winbond_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
return spi_nor_write_disable(nor);
}
+static const struct spi_nor_otp_ops winbond_otp_ops = {
+ .read = spi_nor_otp_read_secr,
+ .write = spi_nor_otp_write_secr,
+ .lock = spi_nor_otp_lock_sr2,
+ .is_locked = spi_nor_otp_is_locked_sr2,
+};
+
static void winbond_default_init(struct spi_nor *nor)
{
nor->params->set_4byte_addr_mode = winbond_set_4byte_addr_mode;
+ if (nor->params->otp_info.n_otps)
+ nor->params->otp_ops = &winbond_otp_ops;
}
static const struct spi_nor_fixups winbond_fixups = {
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index a0d572855444..6d1956049e90 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -107,6 +107,11 @@
#define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */
#define SPINOR_OP_WD_EVCR 0x61 /* Write EVCR register */
+/* Used for GigaDevices and Winbond flashes. */
+#define SPINOR_OP_ESECR 0x44 /* Erase Security registers */
+#define SPINOR_OP_PSECR 0x42 /* Program Security registers */
+#define SPINOR_OP_RSECR 0x48 /* Read Security registers */
+
/* Status Register bits. */
#define SR_WIP BIT(0) /* Write in progress */
#define SR_WEL BIT(1) /* Write enable latch */
@@ -138,8 +143,12 @@
/* Status Register 2 bits. */
#define SR2_QUAD_EN_BIT1 BIT(1)
+#define SR2_LB1 BIT(3) /* Security Register Lock Bit 1 */
+#define SR2_LB2 BIT(4) /* Security Register Lock Bit 2 */
+#define SR2_LB3 BIT(5) /* Security Register Lock Bit 3 */
#define SR2_QUAD_EN_BIT7 BIT(7)
+
/* Supported SPI protocols */
#define SNOR_PROTO_INST_MASK GENMASK(23, 16)
#define SNOR_PROTO_INST_SHIFT 16
--
2.20.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 2/2] mtd: spi-nor: implement OTP support for Winbond and similar flashes
@ 2021-02-16 16:28 ` Michael Walle
0 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-02-16 16:28 UTC (permalink / raw)
To: linux-kernel, linux-mtd
Cc: Richard Weinberger, Michael Walle, Miquel Raynal,
Vignesh Raghavendra, Tudor Ambarus
Use the new OTP ops to implement OTP access on Winbond flashes. Most
Winbond flashes provides up to four different OTP regions ("Security
Registers").
Winbond devices use a special opcode to read and write to the OTP
regions, just like the RDSFDP opcode. In fact, it seems that the
(undocumented) first OTP area of the newer flashes is the actual SFDP
table.
On a side note, Winbond devices also allow erasing the OTP regions as
long as the area isn't locked down.
This was tested on a Winbond W25Q32JW as well as on a W25Q32FW.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/mtd/spi-nor/core.c | 2 +-
drivers/mtd/spi-nor/core.h | 6 ++
drivers/mtd/spi-nor/otp.c | 163 ++++++++++++++++++++++++++++++++++
drivers/mtd/spi-nor/winbond.c | 17 +++-
include/linux/mtd/spi-nor.h | 9 ++
5 files changed, 194 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index af9d7f194f01..1115046e2680 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -1034,7 +1034,7 @@ static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1)
*
* Return: 0 on success, -errno otherwise.
*/
-static int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr)
+int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr)
{
int ret;
u8 *sr_cr = nor->bouncebuf;
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 5fb54ae08c5b..d755f2bf77e0 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -492,6 +492,7 @@ int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
+int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr);
ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
@@ -499,6 +500,11 @@ ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
const u8 *buf);
+int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, uint64_t len, u8 *buf);
+int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, uint64_t len, u8 *buf);
+int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
+int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
+
int spi_nor_hwcaps_read2cmd(u32 hwcaps);
u8 spi_nor_convert_3to4_read(u8 opcode);
void spi_nor_set_read_settings(struct spi_nor_read_command *read,
diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
index 59bd1a3f450d..89d055215d1e 100644
--- a/drivers/mtd/spi-nor/otp.c
+++ b/drivers/mtd/spi-nor/otp.c
@@ -10,6 +10,169 @@
#include "core.h"
+/**
+ * spi_nor_otp_read_secr() - read OTP data
+ * @nor: pointer to 'struct spi_nor'
+ * @from: offset to read from
+ * @len: number of bytes to read
+ * @buf: pointer to dst buffer
+ *
+ * Read OTP data by using the SPINOR_OP_RSECR commands. This method is used on
+ * GigaDevice and Winbond flashes.
+ *
+ * Return: number of bytes read successfully, -errno otherwise
+ */
+int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, uint64_t len, u8 *buf)
+{
+ u8 addr_width, read_opcode, read_dummy;
+ struct spi_mem_dirmap_desc *rdesc;
+ enum spi_nor_protocol read_proto;
+ int ret;
+
+ read_opcode = nor->read_opcode;
+ addr_width = nor->addr_width;
+ read_dummy = nor->read_dummy;
+ read_proto = nor->read_proto;
+ rdesc = nor->dirmap.rdesc;
+
+ nor->read_opcode = SPINOR_OP_RSECR;
+ nor->addr_width = 3;
+ nor->read_dummy = 8;
+ nor->read_proto = SNOR_PROTO_1_1_1;
+ nor->dirmap.rdesc = NULL;
+
+ ret = spi_nor_read_data(nor, addr, len, buf);
+
+ nor->read_opcode = read_opcode;
+ nor->addr_width = addr_width;
+ nor->read_dummy = read_dummy;
+ nor->read_proto = read_proto;
+ nor->dirmap.rdesc = rdesc;
+
+ return ret;
+}
+
+/**
+ * spi_nor_otp_write_secr() - write OTP data
+ * @nor: pointer to 'struct spi_nor'
+ * @to: offset to write to
+ * @len: number of bytes to write
+ * @buf: pointer to src buffer
+ *
+ * Write OTP data by using the SPINOR_OP_PSECR commands. This method is used on
+ * GigaDevice and Winbond flashes.
+ *
+ * Return: number of bytes written successfully, -errno otherwise
+ */
+int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, uint64_t len, u8 *buf)
+{
+ enum spi_nor_protocol write_proto;
+ struct spi_mem_dirmap_desc *wdesc;
+ u8 addr_width, program_opcode;
+ int ret;
+
+ program_opcode = nor->program_opcode;
+ addr_width = nor->addr_width;
+ write_proto = nor->write_proto;
+ wdesc = nor->dirmap.wdesc;
+
+ nor->program_opcode = SPINOR_OP_PSECR;
+ nor->addr_width = 3;
+ nor->write_proto = SNOR_PROTO_1_1_1;
+ nor->dirmap.wdesc = NULL;
+
+ /*
+ * We only support a write to one single page. For now all winbond
+ * flashes only have one page per OTP region.
+ */
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ goto out;
+
+ ret = spi_nor_write_data(nor, addr, len, buf);
+ if (ret < 0)
+ goto out;
+
+ ret = spi_nor_wait_till_ready(nor);
+
+out:
+ nor->program_opcode = program_opcode;
+ nor->addr_width = addr_width;
+ nor->write_proto = write_proto;
+ nor->dirmap.wdesc = wdesc;
+
+ return ret;
+}
+
+static int spi_nor_otp_lock_bit_cr(unsigned int region)
+{
+ static const int lock_bits[] = { SR2_LB1, SR2_LB2, SR2_LB3 };
+
+ if (region >= ARRAY_SIZE(lock_bits))
+ return -EINVAL;
+
+ return lock_bits[region];
+}
+
+/**
+ * spi_nor_otp_lock_sr2() - lock the OTP region
+ * @nor: pointer to 'struct spi_nor'
+ * @region: OTP region
+ *
+ * Lock the OTP region by writing the status register-2. This method is used on
+ * GigaDevice and Winbond flashes.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region)
+{
+ u8 *cr = nor->bouncebuf;
+ int lock_bit;
+ int ret;
+
+ lock_bit = spi_nor_otp_lock_bit_cr(region);
+ if (lock_bit < 0)
+ return lock_bit;
+
+ ret = spi_nor_read_cr(nor, cr);
+ if (ret)
+ return ret;
+
+ /* no need to write the register if region is already locked */
+ if (cr[0] & lock_bit)
+ return 0;
+
+ cr[0] |= lock_bit;
+
+ return spi_nor_write_16bit_cr_and_check(nor, cr[0]);
+}
+
+/**
+ * spi_nor_otp_is_locked_sr2() - get the OTP region lock status
+ * @nor: pointer to 'struct spi_nor'
+ * @region: OTP region
+ *
+ * Retrieve the OTP region lock bit by reading the status register-2. This
+ * method is used on GigaDevice and Winbond flashes.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region)
+{
+ u8 *cr = nor->bouncebuf;
+ int lock_bit;
+ int ret;
+
+ lock_bit = spi_nor_otp_lock_bit_cr(region);
+ if (lock_bit < 0)
+ return lock_bit;
+
+ ret = spi_nor_read_cr(nor, cr);
+ if (ret)
+ return ret;
+
+ return cr[0] & lock_bit;
+}
static loff_t spi_nor_otp_region_start(struct spi_nor *nor, int region)
{
struct spi_nor_otp_info *info = &nor->params->otp_info;
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index e5dfa786f190..d3bbd2df7500 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -55,14 +55,18 @@ static const struct flash_info winbond_parts[] = {
{ "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) },
{ "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ OTP_INFO(256, 3, 0x1000, 0x1000)
+ },
+
{ "w25q32jv", INFO(0xef7016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
{ "w25q32jwm", INFO(0xef8016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ OTP_INFO(256, 3, 0x1000, 0x1000) },
{ "w25q64jwm", INFO(0xef8017, 0, 64 * 1024, 128,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
@@ -131,9 +135,18 @@ static int winbond_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
return spi_nor_write_disable(nor);
}
+static const struct spi_nor_otp_ops winbond_otp_ops = {
+ .read = spi_nor_otp_read_secr,
+ .write = spi_nor_otp_write_secr,
+ .lock = spi_nor_otp_lock_sr2,
+ .is_locked = spi_nor_otp_is_locked_sr2,
+};
+
static void winbond_default_init(struct spi_nor *nor)
{
nor->params->set_4byte_addr_mode = winbond_set_4byte_addr_mode;
+ if (nor->params->otp_info.n_otps)
+ nor->params->otp_ops = &winbond_otp_ops;
}
static const struct spi_nor_fixups winbond_fixups = {
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index a0d572855444..6d1956049e90 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -107,6 +107,11 @@
#define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */
#define SPINOR_OP_WD_EVCR 0x61 /* Write EVCR register */
+/* Used for GigaDevices and Winbond flashes. */
+#define SPINOR_OP_ESECR 0x44 /* Erase Security registers */
+#define SPINOR_OP_PSECR 0x42 /* Program Security registers */
+#define SPINOR_OP_RSECR 0x48 /* Read Security registers */
+
/* Status Register bits. */
#define SR_WIP BIT(0) /* Write in progress */
#define SR_WEL BIT(1) /* Write enable latch */
@@ -138,8 +143,12 @@
/* Status Register 2 bits. */
#define SR2_QUAD_EN_BIT1 BIT(1)
+#define SR2_LB1 BIT(3) /* Security Register Lock Bit 1 */
+#define SR2_LB2 BIT(4) /* Security Register Lock Bit 2 */
+#define SR2_LB3 BIT(5) /* Security Register Lock Bit 3 */
#define SR2_QUAD_EN_BIT7 BIT(7)
+
/* Supported SPI protocols */
#define SNOR_PROTO_INST_MASK GENMASK(23, 16)
#define SNOR_PROTO_INST_SHIFT 16
--
2.20.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] mtd: spi-nor: add OTP support
2021-02-16 16:28 ` Michael Walle
@ 2021-02-28 12:00 ` Tudor.Ambarus
-1 siblings, 0 replies; 12+ messages in thread
From: Tudor.Ambarus @ 2021-02-28 12:00 UTC (permalink / raw)
To: michael, linux-kernel, linux-mtd; +Cc: miquel.raynal, richard, vigneshr
Hi, Michael,
On 2/16/21 6:28 PM, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> SPI flashes sometimes have a special OTP area, which can (and is) used to
> store immutable properties like board serial number or vendor assigned
> network hardware addresses.
>
> The MTD subsystem already supports accessing such areas and some (non
> SPI-NOR) flashes already implement support for it. It differentiates
> between user and factory areas. User areas can be written by the user and
> factory ones are pre-programmed and locked down by the vendor, usually
> containing an "electrical serial number". This patch will only add support
> for the user areas.
>
> Lay the foundation and implement the MTD callbacks for the SPI-NOR and add
> necessary parameters to the flash_info structure. If a flash supports OTP
> it can be added by the convenience macro OTP_INFO(). Sometimes there are
> individual regions, which might have individual offsets. Therefore, it is
> possible to specify the starting address of the first regions as well as
> the distance between two regions (e.g. Winbond devices uses this method).
>
> Additionally, the regions might be locked down. Once locked, no further
> write access is possible.
>
> For SPI-NOR flashes the OTP area is accessed like the normal memory, e.g.
> by offset addressing; except that you either have to use special read/write
> commands (Winbond) or you have to enter (and exit) a specific OTP mode
> (Macronix, Micron).
>
> Thus we introduce four operations to which the MTD callbacks will be
> mapped: .read(), .write(), .lock() and .is_locked(). The read and the write
> ops will be given an address offset to operate on while the locking ops use
> regions because locking always affects a whole region. It is up to the
> flash driver to implement these ops.
>
SPI NORs can support some OTP-like behaviour, meaning that in addition to
the tipical OTP ops (read, write, lock), the SPI NORs can also erase the
OTP-like memory before the permanent lock. I find the erase useful, in
case one writes something wrong from the start, in case of errors where
what was written differs from what is read back, or simply at development
stage, to check the implementation. So I think we should add support for
that too. If not now, maybe later.
Michael, the overall implementation looks good, and I think we can have
a version of it merged in the following merge window. Some suggestions
and comments below.
cut
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0522304f52fa..af9d7f194f01 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
cut
> @@ -3502,6 +3508,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> mtd->_is_locked = spi_nor_is_locked;
> }
>
> + spi_nor_otp_init(nor);
since this returns void, we can do it the last thing in the spi_nor_scan(), so
that we don't gratuitously init fields in case of errors.
> +
> if (info->flags & USE_FSR)
> nor->flags |= SNOR_F_USE_FSR;
> if (info->flags & SPI_NOR_HAS_TB) {
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 4a3f7f150b5d..5fb54ae08c5b 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -175,6 +175,21 @@ struct spi_nor_erase_map {
> u8 uniform_erase_type;
> };
>
> +/**
> + * struct spi_nor_otp_info - Structure to describe the SPI NOR OTP region
> + * @otp_size: size of one OTP region in bytes.
> + * @n_otps: number of individual OTP regions.
> + * @otp_start_addr: start address of the OTP area.
> + * @otp_addr_offset: offset between consecutive OTP regions if there are
> + * more than one.
> + */
> +struct spi_nor_otp_info {
> + u32 otp_size;
> + int n_otps;
> + u32 otp_start_addr;
> + u32 otp_addr_offset;
> +};
How about the following:
struct spi_nor_otp_memory_organization {
loff_t base;
loff_t offset;
size_t len;
unsigned int n_regions;
};
> +
> /**
> * struct spi_nor_locking_ops - SPI NOR locking methods
> * @lock: lock a region of the SPI NOR.
> @@ -187,6 +202,20 @@ struct spi_nor_locking_ops {
> int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
> };
>
> +/**
> + * struct spi_nor_otp_ops - SPI NOR OTP methods
> + * @read: read from the SPI NOR OTP area.
> + * @write: write to the SPI NOR OTP area.
> + * @lock: lock an OTP region.
> + * @is_locked: check if an OTP region of the SPI NOR is locked.
> + */
> +struct spi_nor_otp_ops {
> + int (*read)(struct spi_nor *nor, loff_t ofs, uint64_t len, u8 *buf);
int (*read)(struct spi_nor *nor, loff_t offset, size_t len, u8 *buf);
> + int (*write)(struct spi_nor *nor, loff_t ofs, uint64_t len, u8 *buf);
same here
> + int (*lock)(struct spi_nor *nor, unsigned int region);
> + int (*is_locked)(struct spi_nor *nor, unsigned int region);
> +};
> +
> /**
> * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
> * Includes legacy flash parameters and settings that can be overwritten
> @@ -208,6 +237,7 @@ struct spi_nor_locking_ops {
> * higher index in the array, the higher priority.
> * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
> * Table.
> + * @otp_info: describes the OTP regions.
> * @octal_dtr_enable: enables SPI NOR octal DTR mode.
> * @quad_enable: enables SPI NOR quad mode.
> * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
> @@ -219,6 +249,7 @@ struct spi_nor_locking_ops {
> * e.g. different opcodes, specific address calculation,
> * page size, etc.
> * @locking_ops: SPI NOR locking methods.
> + * @otp_ops: SPI NOR OTP methods.
> */
> struct spi_nor_flash_parameter {
> u64 size;
> @@ -232,6 +263,7 @@ struct spi_nor_flash_parameter {
> struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
>
> struct spi_nor_erase_map erase_map;
> + struct spi_nor_otp_info otp_info;
>
> int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
> int (*quad_enable)(struct spi_nor *nor);
> @@ -240,6 +272,7 @@ struct spi_nor_flash_parameter {
> int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
>
> const struct spi_nor_locking_ops *locking_ops;
> + const struct spi_nor_otp_ops *otp_ops;
> };
Let's group these altogether:
struct spi_nor_otp {
struct spi_nor_otp_memory_organization memorg;
const struct spi_nor_otp_ops *ops;
};
and then in:
struct spi_nor_flash_parameter {
...
struct spi_nor_erase_map erase_map;
struct spi_nor_otp otp;
...
}
So that we use:
nor->params->otp->memorg and nor->params->otp->ops
>
> /**
> @@ -341,6 +374,15 @@ struct flash_info {
>
> /* Part specific fixup hooks. */
> const struct spi_nor_fixups *fixups;
> +
> + /* OTP size in bytes */
> + u16 otp_size;
> + /* Number of OTP banks */
> + u16 n_otps;
> + /* Start address of OTP area */
> + u32 otp_start_addr;
> + /* Offset between consecutive OTP banks if there are more than one */
> + u32 otp_addr_offset;
Let's use the structure that we have already defined:
struct spi_nor_otp_memory_organization otp_memorg;
cut
> diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
> new file mode 100644
> index 000000000000..59bd1a3f450d
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/otp.c
> @@ -0,0 +1,157 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * OTP support for SPI-NOR flashes
> + *
> + * Copyright (C) 2021 Michael Walle <michael@walle.cc>
> + */
> +
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/spi-nor.h>
> +
> +#include "core.h"
> +
> +static loff_t spi_nor_otp_region_start(struct spi_nor *nor, int region)
const struct spi_nor *nor, unsigned int region
> +{
> + struct spi_nor_otp_info *info = &nor->params->otp_info;
> +
> + return info->otp_start_addr + region * info->otp_addr_offset;
> +}
> +
> +static loff_t spi_nor_otp_region_end(struct spi_nor *nor, int region)
same
> +{
> + struct spi_nor_otp_info *info = &nor->params->otp_info;
> +
> + return spi_nor_otp_region_start(nor, region) + info->otp_size - 1;
> +}
> +
> +static int spi_nor_mtd_otp_info(struct mtd_info *mtd, size_t len,
> + size_t *retlen, struct otp_info *buf)
> +{
> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
const struct spi_nor *nor
> + int n_otps = nor->params->otp_info.n_otps;
> + int locked, i;
unsigned int i;
> +
> + if (len < n_otps * sizeof(*buf))
> + return -ENOSPC;
> +
> + for (i = 0; i < n_otps; i++) {
> + buf[i].start = spi_nor_otp_region_start(nor, i);
> + buf[i].length = nor->params->otp_info.otp_size;
> +
> + locked = nor->params->otp_ops->is_locked(nor, i);
> + if (locked < 0)
> + return locked;
> +
> + buf[i].locked = !!locked;
> + }
> +
> + *retlen = n_otps * sizeof(*buf);
> +
> + return 0;
> +}
> +
> +static int spi_nor_otp_addr_to_region(struct spi_nor *nor, loff_t addr)
> +{
> + int i;
unsigned int i;
> +
> + for (i = 0; i < nor->params->otp_info.n_otps; i++)
> + if (addr >= spi_nor_otp_region_start(nor, i) &&
> + addr <= spi_nor_otp_region_end(nor, i))
> + return i;
> +
> + return -EINVAL;
> +}
> +
> +static int spi_nor_mtd_otp_read_write(struct mtd_info *mtd, loff_t ofs,
> + size_t len, size_t *retlen, u_char *buf,
> + bool is_write)
> +{
> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
const
> + int region;
> + int ret;
> +
> + *retlen = 0;
> +
> + region = spi_nor_otp_addr_to_region(nor, ofs);
> + if (region < 0)
> + return 0;
> +
> + if (ofs < spi_nor_otp_region_start(nor, region))
> + return 0;
> +
> + if ((ofs + len - 1) > spi_nor_otp_region_end(nor, region))
> + return 0;
> +
> + ret = spi_nor_lock_and_prep(nor);
please check the ret value
> +
> + if (is_write)
> + ret = nor->params->otp_ops->write(nor, ofs, len, buf);
> + else
> + ret = nor->params->otp_ops->read(nor, ofs, len, buf);
> +
> + spi_nor_unlock_and_unprep(nor);
> +
> + if (ret < 0)
> + return ret;
> +
> + *retlen = len;
> + return 0;
> +}
> +
> +static int spi_nor_mtd_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
> + size_t *retlen, u_char *buf)
> +{
> + return spi_nor_mtd_otp_read_write(mtd, from, len, retlen, buf, false);
> +}
> +
> +static int spi_nor_mtd_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
> + size_t *retlen, u_char *buf)
> +{
> + return spi_nor_mtd_otp_read_write(mtd, to, len, retlen, buf, true);
> +}
> +
> +static int spi_nor_mtd_otp_lock(struct mtd_info *mtd, loff_t from, size_t len)
> +{
> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
const
> + int region;
> + int ret;
> +
> + region = spi_nor_otp_addr_to_region(nor, from);
> + if (region < 0)
> + return -EINVAL;
> +
> + if (len != nor->params->otp_info.otp_size)
> + return -EINVAL;
Does the otp memory organization matter for the end user?
Can't we lock/read/write past region size, for example 2 or 3 regions in a row,
depending on length?
Cheers,
ta
> +
> + ret = spi_nor_lock_and_prep(nor);
> + if (ret)
> + return ret;
> +
> + ret = nor->params->otp_ops->lock(nor, region);
> +
> + spi_nor_unlock_and_unprep(nor);
> +
> + return ret;
> +}
> +
> +void spi_nor_otp_init(struct spi_nor *nor)
> +{
> + struct mtd_info *mtd = &nor->mtd;
> +
> + if (!nor->params->otp_ops)
> + return;
> +
> + /*
> + * We only support user_prot callbacks (yet).
> + *
> + * Some SPI-NOR flashes like Macronix ones can be ordered in two
> + * different variants. One with a factory locked OTP area and one where
> + * it is left to the user to write to it. The factory locked OTP is
> + * usually preprogrammed with an "electrical serial number". We don't
> + * support these for now.
> + */
> + mtd->_get_user_prot_info = spi_nor_mtd_otp_info;
> + mtd->_read_user_prot_reg = spi_nor_mtd_otp_read;
> + mtd->_write_user_prot_reg = spi_nor_mtd_otp_write;
> + mtd->_lock_user_prot_reg = spi_nor_mtd_otp_lock;
> +}
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] mtd: spi-nor: add OTP support
@ 2021-02-28 12:00 ` Tudor.Ambarus
0 siblings, 0 replies; 12+ messages in thread
From: Tudor.Ambarus @ 2021-02-28 12:00 UTC (permalink / raw)
To: michael, linux-kernel, linux-mtd; +Cc: richard, vigneshr, miquel.raynal
Hi, Michael,
On 2/16/21 6:28 PM, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> SPI flashes sometimes have a special OTP area, which can (and is) used to
> store immutable properties like board serial number or vendor assigned
> network hardware addresses.
>
> The MTD subsystem already supports accessing such areas and some (non
> SPI-NOR) flashes already implement support for it. It differentiates
> between user and factory areas. User areas can be written by the user and
> factory ones are pre-programmed and locked down by the vendor, usually
> containing an "electrical serial number". This patch will only add support
> for the user areas.
>
> Lay the foundation and implement the MTD callbacks for the SPI-NOR and add
> necessary parameters to the flash_info structure. If a flash supports OTP
> it can be added by the convenience macro OTP_INFO(). Sometimes there are
> individual regions, which might have individual offsets. Therefore, it is
> possible to specify the starting address of the first regions as well as
> the distance between two regions (e.g. Winbond devices uses this method).
>
> Additionally, the regions might be locked down. Once locked, no further
> write access is possible.
>
> For SPI-NOR flashes the OTP area is accessed like the normal memory, e.g.
> by offset addressing; except that you either have to use special read/write
> commands (Winbond) or you have to enter (and exit) a specific OTP mode
> (Macronix, Micron).
>
> Thus we introduce four operations to which the MTD callbacks will be
> mapped: .read(), .write(), .lock() and .is_locked(). The read and the write
> ops will be given an address offset to operate on while the locking ops use
> regions because locking always affects a whole region. It is up to the
> flash driver to implement these ops.
>
SPI NORs can support some OTP-like behaviour, meaning that in addition to
the tipical OTP ops (read, write, lock), the SPI NORs can also erase the
OTP-like memory before the permanent lock. I find the erase useful, in
case one writes something wrong from the start, in case of errors where
what was written differs from what is read back, or simply at development
stage, to check the implementation. So I think we should add support for
that too. If not now, maybe later.
Michael, the overall implementation looks good, and I think we can have
a version of it merged in the following merge window. Some suggestions
and comments below.
cut
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0522304f52fa..af9d7f194f01 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
cut
> @@ -3502,6 +3508,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> mtd->_is_locked = spi_nor_is_locked;
> }
>
> + spi_nor_otp_init(nor);
since this returns void, we can do it the last thing in the spi_nor_scan(), so
that we don't gratuitously init fields in case of errors.
> +
> if (info->flags & USE_FSR)
> nor->flags |= SNOR_F_USE_FSR;
> if (info->flags & SPI_NOR_HAS_TB) {
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 4a3f7f150b5d..5fb54ae08c5b 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -175,6 +175,21 @@ struct spi_nor_erase_map {
> u8 uniform_erase_type;
> };
>
> +/**
> + * struct spi_nor_otp_info - Structure to describe the SPI NOR OTP region
> + * @otp_size: size of one OTP region in bytes.
> + * @n_otps: number of individual OTP regions.
> + * @otp_start_addr: start address of the OTP area.
> + * @otp_addr_offset: offset between consecutive OTP regions if there are
> + * more than one.
> + */
> +struct spi_nor_otp_info {
> + u32 otp_size;
> + int n_otps;
> + u32 otp_start_addr;
> + u32 otp_addr_offset;
> +};
How about the following:
struct spi_nor_otp_memory_organization {
loff_t base;
loff_t offset;
size_t len;
unsigned int n_regions;
};
> +
> /**
> * struct spi_nor_locking_ops - SPI NOR locking methods
> * @lock: lock a region of the SPI NOR.
> @@ -187,6 +202,20 @@ struct spi_nor_locking_ops {
> int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
> };
>
> +/**
> + * struct spi_nor_otp_ops - SPI NOR OTP methods
> + * @read: read from the SPI NOR OTP area.
> + * @write: write to the SPI NOR OTP area.
> + * @lock: lock an OTP region.
> + * @is_locked: check if an OTP region of the SPI NOR is locked.
> + */
> +struct spi_nor_otp_ops {
> + int (*read)(struct spi_nor *nor, loff_t ofs, uint64_t len, u8 *buf);
int (*read)(struct spi_nor *nor, loff_t offset, size_t len, u8 *buf);
> + int (*write)(struct spi_nor *nor, loff_t ofs, uint64_t len, u8 *buf);
same here
> + int (*lock)(struct spi_nor *nor, unsigned int region);
> + int (*is_locked)(struct spi_nor *nor, unsigned int region);
> +};
> +
> /**
> * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
> * Includes legacy flash parameters and settings that can be overwritten
> @@ -208,6 +237,7 @@ struct spi_nor_locking_ops {
> * higher index in the array, the higher priority.
> * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
> * Table.
> + * @otp_info: describes the OTP regions.
> * @octal_dtr_enable: enables SPI NOR octal DTR mode.
> * @quad_enable: enables SPI NOR quad mode.
> * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
> @@ -219,6 +249,7 @@ struct spi_nor_locking_ops {
> * e.g. different opcodes, specific address calculation,
> * page size, etc.
> * @locking_ops: SPI NOR locking methods.
> + * @otp_ops: SPI NOR OTP methods.
> */
> struct spi_nor_flash_parameter {
> u64 size;
> @@ -232,6 +263,7 @@ struct spi_nor_flash_parameter {
> struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
>
> struct spi_nor_erase_map erase_map;
> + struct spi_nor_otp_info otp_info;
>
> int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
> int (*quad_enable)(struct spi_nor *nor);
> @@ -240,6 +272,7 @@ struct spi_nor_flash_parameter {
> int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
>
> const struct spi_nor_locking_ops *locking_ops;
> + const struct spi_nor_otp_ops *otp_ops;
> };
Let's group these altogether:
struct spi_nor_otp {
struct spi_nor_otp_memory_organization memorg;
const struct spi_nor_otp_ops *ops;
};
and then in:
struct spi_nor_flash_parameter {
...
struct spi_nor_erase_map erase_map;
struct spi_nor_otp otp;
...
}
So that we use:
nor->params->otp->memorg and nor->params->otp->ops
>
> /**
> @@ -341,6 +374,15 @@ struct flash_info {
>
> /* Part specific fixup hooks. */
> const struct spi_nor_fixups *fixups;
> +
> + /* OTP size in bytes */
> + u16 otp_size;
> + /* Number of OTP banks */
> + u16 n_otps;
> + /* Start address of OTP area */
> + u32 otp_start_addr;
> + /* Offset between consecutive OTP banks if there are more than one */
> + u32 otp_addr_offset;
Let's use the structure that we have already defined:
struct spi_nor_otp_memory_organization otp_memorg;
cut
> diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
> new file mode 100644
> index 000000000000..59bd1a3f450d
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/otp.c
> @@ -0,0 +1,157 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * OTP support for SPI-NOR flashes
> + *
> + * Copyright (C) 2021 Michael Walle <michael@walle.cc>
> + */
> +
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/spi-nor.h>
> +
> +#include "core.h"
> +
> +static loff_t spi_nor_otp_region_start(struct spi_nor *nor, int region)
const struct spi_nor *nor, unsigned int region
> +{
> + struct spi_nor_otp_info *info = &nor->params->otp_info;
> +
> + return info->otp_start_addr + region * info->otp_addr_offset;
> +}
> +
> +static loff_t spi_nor_otp_region_end(struct spi_nor *nor, int region)
same
> +{
> + struct spi_nor_otp_info *info = &nor->params->otp_info;
> +
> + return spi_nor_otp_region_start(nor, region) + info->otp_size - 1;
> +}
> +
> +static int spi_nor_mtd_otp_info(struct mtd_info *mtd, size_t len,
> + size_t *retlen, struct otp_info *buf)
> +{
> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
const struct spi_nor *nor
> + int n_otps = nor->params->otp_info.n_otps;
> + int locked, i;
unsigned int i;
> +
> + if (len < n_otps * sizeof(*buf))
> + return -ENOSPC;
> +
> + for (i = 0; i < n_otps; i++) {
> + buf[i].start = spi_nor_otp_region_start(nor, i);
> + buf[i].length = nor->params->otp_info.otp_size;
> +
> + locked = nor->params->otp_ops->is_locked(nor, i);
> + if (locked < 0)
> + return locked;
> +
> + buf[i].locked = !!locked;
> + }
> +
> + *retlen = n_otps * sizeof(*buf);
> +
> + return 0;
> +}
> +
> +static int spi_nor_otp_addr_to_region(struct spi_nor *nor, loff_t addr)
> +{
> + int i;
unsigned int i;
> +
> + for (i = 0; i < nor->params->otp_info.n_otps; i++)
> + if (addr >= spi_nor_otp_region_start(nor, i) &&
> + addr <= spi_nor_otp_region_end(nor, i))
> + return i;
> +
> + return -EINVAL;
> +}
> +
> +static int spi_nor_mtd_otp_read_write(struct mtd_info *mtd, loff_t ofs,
> + size_t len, size_t *retlen, u_char *buf,
> + bool is_write)
> +{
> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
const
> + int region;
> + int ret;
> +
> + *retlen = 0;
> +
> + region = spi_nor_otp_addr_to_region(nor, ofs);
> + if (region < 0)
> + return 0;
> +
> + if (ofs < spi_nor_otp_region_start(nor, region))
> + return 0;
> +
> + if ((ofs + len - 1) > spi_nor_otp_region_end(nor, region))
> + return 0;
> +
> + ret = spi_nor_lock_and_prep(nor);
please check the ret value
> +
> + if (is_write)
> + ret = nor->params->otp_ops->write(nor, ofs, len, buf);
> + else
> + ret = nor->params->otp_ops->read(nor, ofs, len, buf);
> +
> + spi_nor_unlock_and_unprep(nor);
> +
> + if (ret < 0)
> + return ret;
> +
> + *retlen = len;
> + return 0;
> +}
> +
> +static int spi_nor_mtd_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
> + size_t *retlen, u_char *buf)
> +{
> + return spi_nor_mtd_otp_read_write(mtd, from, len, retlen, buf, false);
> +}
> +
> +static int spi_nor_mtd_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
> + size_t *retlen, u_char *buf)
> +{
> + return spi_nor_mtd_otp_read_write(mtd, to, len, retlen, buf, true);
> +}
> +
> +static int spi_nor_mtd_otp_lock(struct mtd_info *mtd, loff_t from, size_t len)
> +{
> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
const
> + int region;
> + int ret;
> +
> + region = spi_nor_otp_addr_to_region(nor, from);
> + if (region < 0)
> + return -EINVAL;
> +
> + if (len != nor->params->otp_info.otp_size)
> + return -EINVAL;
Does the otp memory organization matter for the end user?
Can't we lock/read/write past region size, for example 2 or 3 regions in a row,
depending on length?
Cheers,
ta
> +
> + ret = spi_nor_lock_and_prep(nor);
> + if (ret)
> + return ret;
> +
> + ret = nor->params->otp_ops->lock(nor, region);
> +
> + spi_nor_unlock_and_unprep(nor);
> +
> + return ret;
> +}
> +
> +void spi_nor_otp_init(struct spi_nor *nor)
> +{
> + struct mtd_info *mtd = &nor->mtd;
> +
> + if (!nor->params->otp_ops)
> + return;
> +
> + /*
> + * We only support user_prot callbacks (yet).
> + *
> + * Some SPI-NOR flashes like Macronix ones can be ordered in two
> + * different variants. One with a factory locked OTP area and one where
> + * it is left to the user to write to it. The factory locked OTP is
> + * usually preprogrammed with an "electrical serial number". We don't
> + * support these for now.
> + */
> + mtd->_get_user_prot_info = spi_nor_mtd_otp_info;
> + mtd->_read_user_prot_reg = spi_nor_mtd_otp_read;
> + mtd->_write_user_prot_reg = spi_nor_mtd_otp_write;
> + mtd->_lock_user_prot_reg = spi_nor_mtd_otp_lock;
> +}
> --
> 2.20.1
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] mtd: spi-nor: add OTP support
2021-02-28 12:00 ` Tudor.Ambarus
@ 2021-03-01 17:32 ` Michael Walle
-1 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-03-01 17:32 UTC (permalink / raw)
To: Tudor.Ambarus; +Cc: linux-kernel, linux-mtd, miquel.raynal, richard, vigneshr
Hi Tudor,
thanks for the review.
Am 2021-02-28 13:00, schrieb Tudor.Ambarus@microchip.com:
> On 2/16/21 6:28 PM, Michael Walle wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know
>> the content is safe
>>
>> SPI flashes sometimes have a special OTP area, which can (and is) used
>> to
>> store immutable properties like board serial number or vendor assigned
>> network hardware addresses.
>>
>> The MTD subsystem already supports accessing such areas and some (non
>> SPI-NOR) flashes already implement support for it. It differentiates
>> between user and factory areas. User areas can be written by the user
>> and
>> factory ones are pre-programmed and locked down by the vendor, usually
>> containing an "electrical serial number". This patch will only add
>> support
>> for the user areas.
>>
>> Lay the foundation and implement the MTD callbacks for the SPI-NOR and
>> add
>> necessary parameters to the flash_info structure. If a flash supports
>> OTP
>> it can be added by the convenience macro OTP_INFO(). Sometimes there
>> are
>> individual regions, which might have individual offsets. Therefore, it
>> is
>> possible to specify the starting address of the first regions as well
>> as
>> the distance between two regions (e.g. Winbond devices uses this
>> method).
>>
>> Additionally, the regions might be locked down. Once locked, no
>> further
>> write access is possible.
>>
>> For SPI-NOR flashes the OTP area is accessed like the normal memory,
>> e.g.
>> by offset addressing; except that you either have to use special
>> read/write
>> commands (Winbond) or you have to enter (and exit) a specific OTP mode
>> (Macronix, Micron).
>>
>> Thus we introduce four operations to which the MTD callbacks will be
>> mapped: .read(), .write(), .lock() and .is_locked(). The read and the
>> write
>> ops will be given an address offset to operate on while the locking
>> ops use
>> regions because locking always affects a whole region. It is up to the
>> flash driver to implement these ops.
>>
>
> SPI NORs can support some OTP-like behaviour, meaning that in addition
> to
> the tipical OTP ops (read, write, lock), the SPI NORs can also erase
> the
> OTP-like memory before the permanent lock. I find the erase useful, in
> case one writes something wrong from the start, in case of errors where
> what was written differs from what is read back, or simply at
> development
> stage, to check the implementation. So I think we should add support
> for
> that too. If not now, maybe later.
As mentioned on IRC, this should be a seperate ioctl() thus the
mtd-utils
need to be changed, too. I wouldn't like to change the semantics of the
current (more or less well-established) ioctl interface around MTD otp
operations.
Thus maybe there might be OTPERASE ioctl, similar to OTPLOCK. I'm open
to this, but in a seperate patch series.
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 0522304f52fa..af9d7f194f01 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>
> cut
>> @@ -3502,6 +3508,8 @@ int spi_nor_scan(struct spi_nor *nor, const char
>> *name,
>> mtd->_is_locked = spi_nor_is_locked;
>> }
>>
>> + spi_nor_otp_init(nor);
>
> since this returns void, we can do it the last thing in the
> spi_nor_scan(), so
> that we don't gratuitously init fields in case of errors.
Mh, it used to be at this point because it sets the mtd ops. In my
previous patch version this was still inline. So sure I can move it,
but I'd move it right before spi_nor_init() because that will actually
interface with the SPI flash.
>> +
>> if (info->flags & USE_FSR)
>> nor->flags |= SNOR_F_USE_FSR;
>> if (info->flags & SPI_NOR_HAS_TB) {
>> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
>> index 4a3f7f150b5d..5fb54ae08c5b 100644
>> --- a/drivers/mtd/spi-nor/core.h
>> +++ b/drivers/mtd/spi-nor/core.h
>> @@ -175,6 +175,21 @@ struct spi_nor_erase_map {
>> u8 uniform_erase_type;
>> };
>>
>> +/**
>> + * struct spi_nor_otp_info - Structure to describe the SPI NOR OTP
>> region
>> + * @otp_size: size of one OTP region in bytes.
>> + * @n_otps: number of individual OTP regions.
>> + * @otp_start_addr: start address of the OTP area.
>> + * @otp_addr_offset: offset between consecutive OTP regions if
>> there are
>> + * more than one.
>> + */
>> +struct spi_nor_otp_info {
>> + u32 otp_size;
>> + int n_otps;
>> + u32 otp_start_addr;
>> + u32 otp_addr_offset;
>> +};
>
> How about the following:
>
> struct spi_nor_otp_memory_organization {
I've used spi_nor_otp_organization, first because its a shorter name
and second it might or might not have something to do with memory.
> loff_t base;
> loff_t offset;
> size_t len;
> unsigned int n_regions;
> };
otherwise I've put the len argument as the first property, because
other flashes usually contain just one region, thus base and offset
are normally unused (or zero).
[..]
>> @@ -341,6 +374,15 @@ struct flash_info {
>>
>> /* Part specific fixup hooks. */
>> const struct spi_nor_fixups *fixups;
>> +
>> + /* OTP size in bytes */
>> + u16 otp_size;
>> + /* Number of OTP banks */
>> + u16 n_otps;
>> + /* Start address of OTP area */
>> + u32 otp_start_addr;
>> + /* Offset between consecutive OTP banks if there are more than
>> one */
>> + u32 otp_addr_offset;
>
> Let's use the structure that we have already defined:
> struct spi_nor_otp_memory_organization otp_memorg;
Ok, this was due to the convenience macro OTP_INFO(). Which now
looks like:
#define OTP_INFO(_len, _n_regions, _base, _offset) \
.otp_org = (struct spi_nor_otp_organization) { \
.len = (_len), \
.base = (_base), \
.offset = (_offset), \
.n_regions = (_n_regions), \
},
btw there is also a shorter OTP_INFO1(_len) which I used for the
macronix flashes (which for now was dropped in this series).
>> diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
>> new file mode 100644
>> index 000000000000..59bd1a3f450d
>> --- /dev/null
>> +++ b/drivers/mtd/spi-nor/otp.c
>> @@ -0,0 +1,157 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * OTP support for SPI-NOR flashes
>> + *
>> + * Copyright (C) 2021 Michael Walle <michael@walle.cc>
>> + */
>> +
>> +#include <linux/mtd/mtd.h>
>> +#include <linux/mtd/spi-nor.h>
>> +
>> +#include "core.h"
>> +
>> +static loff_t spi_nor_otp_region_start(struct spi_nor *nor, int
>> region)
>
> const struct spi_nor *nor, unsigned int region
>
>> +{
>> + struct spi_nor_otp_info *info = &nor->params->otp_info;
>> +
>> + return info->otp_start_addr + region * info->otp_addr_offset;
>> +}
>> +
>> +static loff_t spi_nor_otp_region_end(struct spi_nor *nor, int region)
>
> same
>
>> +{
>> + struct spi_nor_otp_info *info = &nor->params->otp_info;
>> +
>> + return spi_nor_otp_region_start(nor, region) + info->otp_size
>> - 1;
>> +}
>> +
>> +static int spi_nor_mtd_otp_info(struct mtd_info *mtd, size_t len,
>> + size_t *retlen, struct otp_info *buf)
>> +{
>> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
>
> const struct spi_nor *nor
Isn't possible, because is_locked() is called which in turn
calls spi_nor_read_xx() which takes "struct spi_nor".
>> + int n_otps = nor->params->otp_info.n_otps;
>> + int locked, i;
>
> unsigned int i;
>
>> +
>> + if (len < n_otps * sizeof(*buf))
>> + return -ENOSPC;
>> +
>> + for (i = 0; i < n_otps; i++) {
>> + buf[i].start = spi_nor_otp_region_start(nor, i);
>> + buf[i].length = nor->params->otp_info.otp_size;
>> +
>> + locked = nor->params->otp_ops->is_locked(nor, i);
>> + if (locked < 0)
>> + return locked;
>> +
>> + buf[i].locked = !!locked;
>> + }
>> +
>> + *retlen = n_otps * sizeof(*buf);
>> +
>> + return 0;
>> +}
>> +
>> +static int spi_nor_otp_addr_to_region(struct spi_nor *nor, loff_t
>> addr)
>> +{
>> + int i;
>
> unsigned int i;
>
>> +
>> + for (i = 0; i < nor->params->otp_info.n_otps; i++)
>> + if (addr >= spi_nor_otp_region_start(nor, i) &&
>> + addr <= spi_nor_otp_region_end(nor, i))
>> + return i;
>> +
>> + return -EINVAL;
>> +}
>> +
>> +static int spi_nor_mtd_otp_read_write(struct mtd_info *mtd, loff_t
>> ofs,
>> + size_t len, size_t *retlen,
>> u_char *buf,
>> + bool is_write)
>> +{
>> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
>
> const
likewise
>
>> + int region;
>> + int ret;
>> +
>> + *retlen = 0;
>> +
>> + region = spi_nor_otp_addr_to_region(nor, ofs);
>> + if (region < 0)
>> + return 0;
>> +
>> + if (ofs < spi_nor_otp_region_start(nor, region))
>> + return 0;
>> +
>> + if ((ofs + len - 1) > spi_nor_otp_region_end(nor, region))
>> + return 0;
>> +
>> + ret = spi_nor_lock_and_prep(nor);
>
> please check the ret value
good catch.
>
>> +
>> + if (is_write)
>> + ret = nor->params->otp_ops->write(nor, ofs, len, buf);
>> + else
>> + ret = nor->params->otp_ops->read(nor, ofs, len, buf);
>> +
>> + spi_nor_unlock_and_unprep(nor);
>> +
>> + if (ret < 0)
>> + return ret;
>> +
>> + *retlen = len;
>> + return 0;
>> +}
>> +
>> +static int spi_nor_mtd_otp_read(struct mtd_info *mtd, loff_t from,
>> size_t len,
>> + size_t *retlen, u_char *buf)
>> +{
>> + return spi_nor_mtd_otp_read_write(mtd, from, len, retlen, buf,
>> false);
>> +}
>> +
>> +static int spi_nor_mtd_otp_write(struct mtd_info *mtd, loff_t to,
>> size_t len,
>> + size_t *retlen, u_char *buf)
>> +{
>> + return spi_nor_mtd_otp_read_write(mtd, to, len, retlen, buf,
>> true);
>> +}
>> +
>> +static int spi_nor_mtd_otp_lock(struct mtd_info *mtd, loff_t from,
>> size_t len)
>> +{
>> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
>
> const
likewise
>
>> + int region;
>> + int ret;
>> +
>> + region = spi_nor_otp_addr_to_region(nor, from);
>> + if (region < 0)
>> + return -EINVAL;
>> +
>> + if (len != nor->params->otp_info.otp_size)
>> + return -EINVAL;
>
> Does the otp memory organization matter for the end user?
> Can't we lock/read/write past region size, for example 2 or 3 regions
> in a row,
> depending on length?
Mhh tough one. I guess the question really is: Do we want
to remap the 0x1000, 0x2000, 0x3000 offsets?
- 0x1000 -> 0
- 0x2000 -> 1 * region_size
- 0x3000 -> 2 * region_size
This is just an example, some devices may us other offsets.
I'd see this as a prerequsite for handling multiple regions
in one write, because otherwise you'll have to handle the
holes which makes it impossible I guess. For example what
would happen with (given an otp size of 0x100):
(1) lock(0, 0x100)
(2) lock(0x100, 0xf00)
(3) lock(0, 0x1000)
(1) will work, (2) should return -EINVAL; but what will (3)
return. -EINVAL too, I guess. But then, ops spanning multiple
regions doesn't make sense at all, because they will always
return -EINVAL.
Unfortunately, I don't know how userspace might access it.
This is how it looks like at the moment:
# flash_otp_info -u /dev/mtd1
Number of OTP user blocks on /dev/mtd1: 3
block 0: offset = 0x1000 size = 256 bytes [unlocked]
block 1: offset = 0x2000 size = 256 bytes [unlocked]
block 2: offset = 0x3000 size = 256 bytes [unlocked]
-michael
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] mtd: spi-nor: add OTP support
@ 2021-03-01 17:32 ` Michael Walle
0 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-03-01 17:32 UTC (permalink / raw)
To: Tudor.Ambarus; +Cc: vigneshr, richard, linux-mtd, linux-kernel, miquel.raynal
Hi Tudor,
thanks for the review.
Am 2021-02-28 13:00, schrieb Tudor.Ambarus@microchip.com:
> On 2/16/21 6:28 PM, Michael Walle wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know
>> the content is safe
>>
>> SPI flashes sometimes have a special OTP area, which can (and is) used
>> to
>> store immutable properties like board serial number or vendor assigned
>> network hardware addresses.
>>
>> The MTD subsystem already supports accessing such areas and some (non
>> SPI-NOR) flashes already implement support for it. It differentiates
>> between user and factory areas. User areas can be written by the user
>> and
>> factory ones are pre-programmed and locked down by the vendor, usually
>> containing an "electrical serial number". This patch will only add
>> support
>> for the user areas.
>>
>> Lay the foundation and implement the MTD callbacks for the SPI-NOR and
>> add
>> necessary parameters to the flash_info structure. If a flash supports
>> OTP
>> it can be added by the convenience macro OTP_INFO(). Sometimes there
>> are
>> individual regions, which might have individual offsets. Therefore, it
>> is
>> possible to specify the starting address of the first regions as well
>> as
>> the distance between two regions (e.g. Winbond devices uses this
>> method).
>>
>> Additionally, the regions might be locked down. Once locked, no
>> further
>> write access is possible.
>>
>> For SPI-NOR flashes the OTP area is accessed like the normal memory,
>> e.g.
>> by offset addressing; except that you either have to use special
>> read/write
>> commands (Winbond) or you have to enter (and exit) a specific OTP mode
>> (Macronix, Micron).
>>
>> Thus we introduce four operations to which the MTD callbacks will be
>> mapped: .read(), .write(), .lock() and .is_locked(). The read and the
>> write
>> ops will be given an address offset to operate on while the locking
>> ops use
>> regions because locking always affects a whole region. It is up to the
>> flash driver to implement these ops.
>>
>
> SPI NORs can support some OTP-like behaviour, meaning that in addition
> to
> the tipical OTP ops (read, write, lock), the SPI NORs can also erase
> the
> OTP-like memory before the permanent lock. I find the erase useful, in
> case one writes something wrong from the start, in case of errors where
> what was written differs from what is read back, or simply at
> development
> stage, to check the implementation. So I think we should add support
> for
> that too. If not now, maybe later.
As mentioned on IRC, this should be a seperate ioctl() thus the
mtd-utils
need to be changed, too. I wouldn't like to change the semantics of the
current (more or less well-established) ioctl interface around MTD otp
operations.
Thus maybe there might be OTPERASE ioctl, similar to OTPLOCK. I'm open
to this, but in a seperate patch series.
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 0522304f52fa..af9d7f194f01 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>
> cut
>> @@ -3502,6 +3508,8 @@ int spi_nor_scan(struct spi_nor *nor, const char
>> *name,
>> mtd->_is_locked = spi_nor_is_locked;
>> }
>>
>> + spi_nor_otp_init(nor);
>
> since this returns void, we can do it the last thing in the
> spi_nor_scan(), so
> that we don't gratuitously init fields in case of errors.
Mh, it used to be at this point because it sets the mtd ops. In my
previous patch version this was still inline. So sure I can move it,
but I'd move it right before spi_nor_init() because that will actually
interface with the SPI flash.
>> +
>> if (info->flags & USE_FSR)
>> nor->flags |= SNOR_F_USE_FSR;
>> if (info->flags & SPI_NOR_HAS_TB) {
>> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
>> index 4a3f7f150b5d..5fb54ae08c5b 100644
>> --- a/drivers/mtd/spi-nor/core.h
>> +++ b/drivers/mtd/spi-nor/core.h
>> @@ -175,6 +175,21 @@ struct spi_nor_erase_map {
>> u8 uniform_erase_type;
>> };
>>
>> +/**
>> + * struct spi_nor_otp_info - Structure to describe the SPI NOR OTP
>> region
>> + * @otp_size: size of one OTP region in bytes.
>> + * @n_otps: number of individual OTP regions.
>> + * @otp_start_addr: start address of the OTP area.
>> + * @otp_addr_offset: offset between consecutive OTP regions if
>> there are
>> + * more than one.
>> + */
>> +struct spi_nor_otp_info {
>> + u32 otp_size;
>> + int n_otps;
>> + u32 otp_start_addr;
>> + u32 otp_addr_offset;
>> +};
>
> How about the following:
>
> struct spi_nor_otp_memory_organization {
I've used spi_nor_otp_organization, first because its a shorter name
and second it might or might not have something to do with memory.
> loff_t base;
> loff_t offset;
> size_t len;
> unsigned int n_regions;
> };
otherwise I've put the len argument as the first property, because
other flashes usually contain just one region, thus base and offset
are normally unused (or zero).
[..]
>> @@ -341,6 +374,15 @@ struct flash_info {
>>
>> /* Part specific fixup hooks. */
>> const struct spi_nor_fixups *fixups;
>> +
>> + /* OTP size in bytes */
>> + u16 otp_size;
>> + /* Number of OTP banks */
>> + u16 n_otps;
>> + /* Start address of OTP area */
>> + u32 otp_start_addr;
>> + /* Offset between consecutive OTP banks if there are more than
>> one */
>> + u32 otp_addr_offset;
>
> Let's use the structure that we have already defined:
> struct spi_nor_otp_memory_organization otp_memorg;
Ok, this was due to the convenience macro OTP_INFO(). Which now
looks like:
#define OTP_INFO(_len, _n_regions, _base, _offset) \
.otp_org = (struct spi_nor_otp_organization) { \
.len = (_len), \
.base = (_base), \
.offset = (_offset), \
.n_regions = (_n_regions), \
},
btw there is also a shorter OTP_INFO1(_len) which I used for the
macronix flashes (which for now was dropped in this series).
>> diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c
>> new file mode 100644
>> index 000000000000..59bd1a3f450d
>> --- /dev/null
>> +++ b/drivers/mtd/spi-nor/otp.c
>> @@ -0,0 +1,157 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * OTP support for SPI-NOR flashes
>> + *
>> + * Copyright (C) 2021 Michael Walle <michael@walle.cc>
>> + */
>> +
>> +#include <linux/mtd/mtd.h>
>> +#include <linux/mtd/spi-nor.h>
>> +
>> +#include "core.h"
>> +
>> +static loff_t spi_nor_otp_region_start(struct spi_nor *nor, int
>> region)
>
> const struct spi_nor *nor, unsigned int region
>
>> +{
>> + struct spi_nor_otp_info *info = &nor->params->otp_info;
>> +
>> + return info->otp_start_addr + region * info->otp_addr_offset;
>> +}
>> +
>> +static loff_t spi_nor_otp_region_end(struct spi_nor *nor, int region)
>
> same
>
>> +{
>> + struct spi_nor_otp_info *info = &nor->params->otp_info;
>> +
>> + return spi_nor_otp_region_start(nor, region) + info->otp_size
>> - 1;
>> +}
>> +
>> +static int spi_nor_mtd_otp_info(struct mtd_info *mtd, size_t len,
>> + size_t *retlen, struct otp_info *buf)
>> +{
>> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
>
> const struct spi_nor *nor
Isn't possible, because is_locked() is called which in turn
calls spi_nor_read_xx() which takes "struct spi_nor".
>> + int n_otps = nor->params->otp_info.n_otps;
>> + int locked, i;
>
> unsigned int i;
>
>> +
>> + if (len < n_otps * sizeof(*buf))
>> + return -ENOSPC;
>> +
>> + for (i = 0; i < n_otps; i++) {
>> + buf[i].start = spi_nor_otp_region_start(nor, i);
>> + buf[i].length = nor->params->otp_info.otp_size;
>> +
>> + locked = nor->params->otp_ops->is_locked(nor, i);
>> + if (locked < 0)
>> + return locked;
>> +
>> + buf[i].locked = !!locked;
>> + }
>> +
>> + *retlen = n_otps * sizeof(*buf);
>> +
>> + return 0;
>> +}
>> +
>> +static int spi_nor_otp_addr_to_region(struct spi_nor *nor, loff_t
>> addr)
>> +{
>> + int i;
>
> unsigned int i;
>
>> +
>> + for (i = 0; i < nor->params->otp_info.n_otps; i++)
>> + if (addr >= spi_nor_otp_region_start(nor, i) &&
>> + addr <= spi_nor_otp_region_end(nor, i))
>> + return i;
>> +
>> + return -EINVAL;
>> +}
>> +
>> +static int spi_nor_mtd_otp_read_write(struct mtd_info *mtd, loff_t
>> ofs,
>> + size_t len, size_t *retlen,
>> u_char *buf,
>> + bool is_write)
>> +{
>> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
>
> const
likewise
>
>> + int region;
>> + int ret;
>> +
>> + *retlen = 0;
>> +
>> + region = spi_nor_otp_addr_to_region(nor, ofs);
>> + if (region < 0)
>> + return 0;
>> +
>> + if (ofs < spi_nor_otp_region_start(nor, region))
>> + return 0;
>> +
>> + if ((ofs + len - 1) > spi_nor_otp_region_end(nor, region))
>> + return 0;
>> +
>> + ret = spi_nor_lock_and_prep(nor);
>
> please check the ret value
good catch.
>
>> +
>> + if (is_write)
>> + ret = nor->params->otp_ops->write(nor, ofs, len, buf);
>> + else
>> + ret = nor->params->otp_ops->read(nor, ofs, len, buf);
>> +
>> + spi_nor_unlock_and_unprep(nor);
>> +
>> + if (ret < 0)
>> + return ret;
>> +
>> + *retlen = len;
>> + return 0;
>> +}
>> +
>> +static int spi_nor_mtd_otp_read(struct mtd_info *mtd, loff_t from,
>> size_t len,
>> + size_t *retlen, u_char *buf)
>> +{
>> + return spi_nor_mtd_otp_read_write(mtd, from, len, retlen, buf,
>> false);
>> +}
>> +
>> +static int spi_nor_mtd_otp_write(struct mtd_info *mtd, loff_t to,
>> size_t len,
>> + size_t *retlen, u_char *buf)
>> +{
>> + return spi_nor_mtd_otp_read_write(mtd, to, len, retlen, buf,
>> true);
>> +}
>> +
>> +static int spi_nor_mtd_otp_lock(struct mtd_info *mtd, loff_t from,
>> size_t len)
>> +{
>> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
>
> const
likewise
>
>> + int region;
>> + int ret;
>> +
>> + region = spi_nor_otp_addr_to_region(nor, from);
>> + if (region < 0)
>> + return -EINVAL;
>> +
>> + if (len != nor->params->otp_info.otp_size)
>> + return -EINVAL;
>
> Does the otp memory organization matter for the end user?
> Can't we lock/read/write past region size, for example 2 or 3 regions
> in a row,
> depending on length?
Mhh tough one. I guess the question really is: Do we want
to remap the 0x1000, 0x2000, 0x3000 offsets?
- 0x1000 -> 0
- 0x2000 -> 1 * region_size
- 0x3000 -> 2 * region_size
This is just an example, some devices may us other offsets.
I'd see this as a prerequsite for handling multiple regions
in one write, because otherwise you'll have to handle the
holes which makes it impossible I guess. For example what
would happen with (given an otp size of 0x100):
(1) lock(0, 0x100)
(2) lock(0x100, 0xf00)
(3) lock(0, 0x1000)
(1) will work, (2) should return -EINVAL; but what will (3)
return. -EINVAL too, I guess. But then, ops spanning multiple
regions doesn't make sense at all, because they will always
return -EINVAL.
Unfortunately, I don't know how userspace might access it.
This is how it looks like at the moment:
# flash_otp_info -u /dev/mtd1
Number of OTP user blocks on /dev/mtd1: 3
block 0: offset = 0x1000 size = 256 bytes [unlocked]
block 1: offset = 0x2000 size = 256 bytes [unlocked]
block 2: offset = 0x3000 size = 256 bytes [unlocked]
-michael
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] mtd: spi-nor: add OTP support
2021-03-01 17:32 ` Michael Walle
@ 2021-03-01 21:31 ` Michael Walle
-1 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-03-01 21:31 UTC (permalink / raw)
To: Tudor.Ambarus; +Cc: linux-kernel, linux-mtd, miquel.raynal, richard, vigneshr
Am 2021-03-01 18:32, schrieb Michael Walle:
> Am 2021-02-28 13:00, schrieb Tudor.Ambarus@microchip.com:
>> On 2/16/21 6:28 PM, Michael Walle wrote:
>> Does the otp memory organization matter for the end user?
>> Can't we lock/read/write past region size, for example 2 or 3 regions
>> in a row,
>> depending on length?
>
> Mhh tough one. I guess the question really is: Do we want
> to remap the 0x1000, 0x2000, 0x3000 offsets?
> - 0x1000 -> 0
> - 0x2000 -> 1 * region_size
> - 0x3000 -> 2 * region_size
>
> This is just an example, some devices may us other offsets.
>
> I'd see this as a prerequsite for handling multiple regions
> in one write, because otherwise you'll have to handle the
> holes which makes it impossible I guess. For example what
> would happen with (given an otp size of 0x100):
> (1) lock(0, 0x100)
> (2) lock(0x100, 0xf00)
> (3) lock(0, 0x1000)
>
> (1) will work, (2) should return -EINVAL; but what will (3)
> return. -EINVAL too, I guess. But then, ops spanning multiple
> regions doesn't make sense at all, because they will always
> return -EINVAL.
>
> Unfortunately, I don't know how userspace might access it.
>
> This is how it looks like at the moment:
>
> # flash_otp_info -u /dev/mtd1
> Number of OTP user blocks on /dev/mtd1: 3
> block 0: offset = 0x1000 size = 256 bytes [unlocked]
> block 1: offset = 0x2000 size = 256 bytes [unlocked]
> block 2: offset = 0x3000 size = 256 bytes [unlocked]
Hm, I just found the following in the mtd-utils [1]:
"offset and size must match on OTP region boundaries".
[1]
http://git.infradead.org/mtd-utils.git/blob/HEAD:/misc-utils/flash_otp_lock.c#l25
-michael
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/2] mtd: spi-nor: add OTP support
@ 2021-03-01 21:31 ` Michael Walle
0 siblings, 0 replies; 12+ messages in thread
From: Michael Walle @ 2021-03-01 21:31 UTC (permalink / raw)
To: Tudor.Ambarus; +Cc: vigneshr, richard, linux-mtd, linux-kernel, miquel.raynal
Am 2021-03-01 18:32, schrieb Michael Walle:
> Am 2021-02-28 13:00, schrieb Tudor.Ambarus@microchip.com:
>> On 2/16/21 6:28 PM, Michael Walle wrote:
>> Does the otp memory organization matter for the end user?
>> Can't we lock/read/write past region size, for example 2 or 3 regions
>> in a row,
>> depending on length?
>
> Mhh tough one. I guess the question really is: Do we want
> to remap the 0x1000, 0x2000, 0x3000 offsets?
> - 0x1000 -> 0
> - 0x2000 -> 1 * region_size
> - 0x3000 -> 2 * region_size
>
> This is just an example, some devices may us other offsets.
>
> I'd see this as a prerequsite for handling multiple regions
> in one write, because otherwise you'll have to handle the
> holes which makes it impossible I guess. For example what
> would happen with (given an otp size of 0x100):
> (1) lock(0, 0x100)
> (2) lock(0x100, 0xf00)
> (3) lock(0, 0x1000)
>
> (1) will work, (2) should return -EINVAL; but what will (3)
> return. -EINVAL too, I guess. But then, ops spanning multiple
> regions doesn't make sense at all, because they will always
> return -EINVAL.
>
> Unfortunately, I don't know how userspace might access it.
>
> This is how it looks like at the moment:
>
> # flash_otp_info -u /dev/mtd1
> Number of OTP user blocks on /dev/mtd1: 3
> block 0: offset = 0x1000 size = 256 bytes [unlocked]
> block 1: offset = 0x2000 size = 256 bytes [unlocked]
> block 2: offset = 0x3000 size = 256 bytes [unlocked]
Hm, I just found the following in the mtd-utils [1]:
"offset and size must match on OTP region boundaries".
[1]
http://git.infradead.org/mtd-utils.git/blob/HEAD:/misc-utils/flash_otp_lock.c#l25
-michael
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-03-02 7:09 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-02-16 16:28 [PATCH v3 0/2] mtd: spi-nor: OTP support Michael Walle
2021-02-16 16:28 ` Michael Walle
2021-02-16 16:28 ` [PATCH v3 1/2] mtd: spi-nor: add " Michael Walle
2021-02-16 16:28 ` Michael Walle
2021-02-28 12:00 ` Tudor.Ambarus
2021-02-28 12:00 ` Tudor.Ambarus
2021-03-01 17:32 ` Michael Walle
2021-03-01 17:32 ` Michael Walle
2021-03-01 21:31 ` Michael Walle
2021-03-01 21:31 ` Michael Walle
2021-02-16 16:28 ` [PATCH v3 2/2] mtd: spi-nor: implement OTP support for Winbond and similar flashes Michael Walle
2021-02-16 16:28 ` Michael Walle
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