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From: Adrien Grassein <adrien.grassein@gmail.com>
To: unlisted-recipients:; (no To-header on input)
Cc: krzk@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org,
	s.hauer@pengutronix.de, kernel@pengutronix.de,
	festevam@gmail.com, linux-imx@nxp.com, catalin.marinas@arm.com,
	will@kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Adrien Grassein <adrien.grassein@gmail.com>
Subject: [PATCH v2 4/8] arm64: dts: imx8mm-nitrogen-r2: add UARTs
Date: Wed, 17 Feb 2021 17:10:48 +0100	[thread overview]
Message-ID: <20210217161052.877877-5-adrien.grassein@gmail.com> (raw)
In-Reply-To: <20210217161052.877877-1-adrien.grassein@gmail.com>

Add description and pin muxing for UARTs.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 50 ++++++++++++++++++-
 1 file changed, 48 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index c4bb22bb4e6a..8f210e21a1bd 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -205,12 +205,33 @@ rtc@68 {
 	};
 };
 
+/* BT */
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
 /* console */
 &uart2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart2>;
-	assigned-clocks = <&clk IMX8MM_CLK_UART2>;
-	assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
+	status = "okay";
+};
+
+/* J15 */
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
+/* J9 */
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4>;
 	status = "okay";
 };
 
@@ -353,6 +374,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
 		>;
 	};
 
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
+			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
+			MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
+			MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
+		>;
+	};
+
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
@@ -360,6 +390,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
 		>;
 	};
 
+	pinctrl_uart3: uart3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
+			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
+			MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
+			MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
+		>;
+	};
+
+	pinctrl_uart4: uart4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
+			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
+		>;
+	};
+
 	pinctrl_usbotg1: usbotg1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR	0x16
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Adrien Grassein <adrien.grassein@gmail.com>
Cc: devicetree@vger.kernel.org, will@kernel.org, shawnguo@kernel.org,
	s.hauer@pengutronix.de, linux-kernel@vger.kernel.org,
	krzk@kernel.org, robh+dt@kernel.org, linux-imx@nxp.com,
	kernel@pengutronix.de, catalin.marinas@arm.com,
	festevam@gmail.com, linux-arm-kernel@lists.infradead.org,
	Adrien Grassein <adrien.grassein@gmail.com>
Subject: [PATCH v2 4/8] arm64: dts: imx8mm-nitrogen-r2: add UARTs
Date: Wed, 17 Feb 2021 17:10:48 +0100	[thread overview]
Message-ID: <20210217161052.877877-5-adrien.grassein@gmail.com> (raw)
In-Reply-To: <20210217161052.877877-1-adrien.grassein@gmail.com>

Add description and pin muxing for UARTs.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 50 ++++++++++++++++++-
 1 file changed, 48 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index c4bb22bb4e6a..8f210e21a1bd 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -205,12 +205,33 @@ rtc@68 {
 	};
 };
 
+/* BT */
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
 /* console */
 &uart2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart2>;
-	assigned-clocks = <&clk IMX8MM_CLK_UART2>;
-	assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
+	status = "okay";
+};
+
+/* J15 */
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
+/* J9 */
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4>;
 	status = "okay";
 };
 
@@ -353,6 +374,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
 		>;
 	};
 
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
+			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
+			MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
+			MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
+		>;
+	};
+
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
@@ -360,6 +390,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
 		>;
 	};
 
+	pinctrl_uart3: uart3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
+			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
+			MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
+			MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
+		>;
+	};
+
+	pinctrl_uart4: uart4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
+			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
+		>;
+	};
+
 	pinctrl_usbotg1: usbotg1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR	0x16
-- 
2.25.1


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  parent reply	other threads:[~2021-02-17 16:13 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-17 16:10 [PATCH v2 0/8] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
2021-02-17 16:10 ` Adrien Grassein
2021-02-17 16:10 ` [PATCH v2 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip Adrien Grassein
2021-02-17 16:10   ` Adrien Grassein
2021-02-19 13:18   ` Krzysztof Kozlowski
2021-02-19 13:18     ` Krzysztof Kozlowski
2021-02-19 14:03     ` Adrien Grassein
2021-02-19 14:03       ` Adrien Grassein
2021-02-20 19:19       ` Krzysztof Kozlowski
2021-02-20 19:19         ` Krzysztof Kozlowski
2021-02-21 23:46         ` Adrien Grassein
2021-02-21 23:46           ` Adrien Grassein
2021-02-22 18:40           ` Krzysztof Kozlowski
2021-02-22 18:40             ` Krzysztof Kozlowski
2021-02-23 10:44             ` Adrien Grassein
2021-02-23 10:44               ` Adrien Grassein
2021-02-23 19:03               ` Krzysztof Kozlowski
2021-02-23 19:03                 ` Krzysztof Kozlowski
2021-02-17 16:10 ` [PATCH v2 2/8] arm64: dts: imx8mm-nitrogen-r2: add USB support Adrien Grassein
2021-02-17 16:10   ` Adrien Grassein
2021-02-17 16:10 ` [PATCH v2 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support Adrien Grassein
2021-02-17 16:10   ` Adrien Grassein
2021-02-19 13:19   ` Krzysztof Kozlowski
2021-02-19 13:19     ` Krzysztof Kozlowski
2021-02-19 14:02     ` Adrien Grassein
2021-02-19 14:02       ` Adrien Grassein
2021-02-20 19:20       ` Krzysztof Kozlowski
2021-02-20 19:20         ` Krzysztof Kozlowski
2021-02-17 16:10 ` Adrien Grassein [this message]
2021-02-17 16:10   ` [PATCH v2 4/8] arm64: dts: imx8mm-nitrogen-r2: add UARTs Adrien Grassein
2021-02-19 13:20   ` Krzysztof Kozlowski
2021-02-19 13:20     ` Krzysztof Kozlowski
2021-02-17 16:10 ` [PATCH v2 5/8] arm64: dts: imx8mm-nitrogen-r2: add PWMs Adrien Grassein
2021-02-17 16:10   ` Adrien Grassein
2021-02-17 16:10 ` [PATCH v2 6/8] arm64: dts: imx8mm-nitrogen-r2: add FlexSPI Adrien Grassein
2021-02-17 16:10   ` Adrien Grassein
2021-02-17 16:10 ` [PATCH v2 7/8] arm64: dts: imx8mm-nitrogen-r2: add audio Adrien Grassein
2021-02-17 16:10   ` Adrien Grassein
2021-02-17 16:10 ` [PATCH v2 8/8] arm64: defconfig: Enable wm8960 audio driver Adrien Grassein
2021-02-17 16:10   ` Adrien Grassein

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