All of lore.kernel.org
 help / color / mirror / Atom feed
From: Erwan Le Ray <erwan.leray@foss.st.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jslaby@suse.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: <linux-serial@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Erwan Le Ray <erwan.leray@foss.st.com>,
	Fabrice Gasnier <fabrice.gasnier@foss.st.com>,
	Valentin Caron <valentin.caron@foss.st.com>
Subject: [PATCH 10/13] serial: stm32: fix FIFO flush in startup and set_termios
Date: Fri, 19 Feb 2021 18:47:33 +0100	[thread overview]
Message-ID: <20210219174736.1022-11-erwan.leray@foss.st.com> (raw)
In-Reply-To: <20210219174736.1022-1-erwan.leray@foss.st.com>

Fifo flush set USART_RQR register by calling stm32_usart_set_bits
routine (Read/Modify/Write). USART_RQR register is a write only
register. So, read before write isn't correct / relevant to flush
the FIFOs.
Replace stm32_usart_set_bits call by writel_relaxed.

Fixes: 84872dc448fe ("serial: stm32: add RX and TX FIFO flush")
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index bdd7ca490021..45203648172b 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -657,7 +657,7 @@ static int stm32_usart_startup(struct uart_port *port)
 
 	/* RX FIFO Flush */
 	if (ofs->rqr != UNDEF_REG)
-		stm32_usart_set_bits(port, ofs->rqr, USART_RQR_RXFRQ);
+		writel_relaxed(USART_RQR_RXFRQ, port->membase + ofs->rqr);
 
 	/* RX enabling */
 	val = stm32_port->cr1_irq | USART_CR1_RE | BIT(cfg->uart_enable_bit);
@@ -762,8 +762,8 @@ static void stm32_usart_set_termios(struct uart_port *port,
 
 	/* flush RX & TX FIFO */
 	if (ofs->rqr != UNDEF_REG)
-		stm32_usart_set_bits(port, ofs->rqr,
-				     USART_RQR_TXFRQ | USART_RQR_RXFRQ);
+		writel_relaxed(USART_RQR_TXFRQ | USART_RQR_RXFRQ,
+			       port->membase + ofs->rqr);
 
 	cr1 = USART_CR1_TE | USART_CR1_RE;
 	if (stm32_port->fifoen)
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Erwan Le Ray <erwan.leray@foss.st.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jslaby@suse.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Valentin Caron <valentin.caron@foss.st.com>,
	Erwan Le Ray <erwan.leray@foss.st.com>,
	linux-kernel@vger.kernel.org,
	Fabrice Gasnier <fabrice.gasnier@foss.st.com>,
	linux-serial@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 10/13] serial: stm32: fix FIFO flush in startup and set_termios
Date: Fri, 19 Feb 2021 18:47:33 +0100	[thread overview]
Message-ID: <20210219174736.1022-11-erwan.leray@foss.st.com> (raw)
In-Reply-To: <20210219174736.1022-1-erwan.leray@foss.st.com>

Fifo flush set USART_RQR register by calling stm32_usart_set_bits
routine (Read/Modify/Write). USART_RQR register is a write only
register. So, read before write isn't correct / relevant to flush
the FIFOs.
Replace stm32_usart_set_bits call by writel_relaxed.

Fixes: 84872dc448fe ("serial: stm32: add RX and TX FIFO flush")
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index bdd7ca490021..45203648172b 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -657,7 +657,7 @@ static int stm32_usart_startup(struct uart_port *port)
 
 	/* RX FIFO Flush */
 	if (ofs->rqr != UNDEF_REG)
-		stm32_usart_set_bits(port, ofs->rqr, USART_RQR_RXFRQ);
+		writel_relaxed(USART_RQR_RXFRQ, port->membase + ofs->rqr);
 
 	/* RX enabling */
 	val = stm32_port->cr1_irq | USART_CR1_RE | BIT(cfg->uart_enable_bit);
@@ -762,8 +762,8 @@ static void stm32_usart_set_termios(struct uart_port *port,
 
 	/* flush RX & TX FIFO */
 	if (ofs->rqr != UNDEF_REG)
-		stm32_usart_set_bits(port, ofs->rqr,
-				     USART_RQR_TXFRQ | USART_RQR_RXFRQ);
+		writel_relaxed(USART_RQR_TXFRQ | USART_RQR_RXFRQ,
+			       port->membase + ofs->rqr);
 
 	cr1 = USART_CR1_TE | USART_CR1_RE;
 	if (stm32_port->fifoen)
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-02-19 17:51 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-19 17:47 [PATCH 00/13] stm32 usart various fixes Erwan Le Ray
2021-02-19 17:47 ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 01/13] serial: stm32: fix probe and remove order for dma Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 02/13] serial: stm32: fix startup by enabling usart for reception Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 03/13] serial: stm32: fix incorrect characters on console Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 04/13] serial: stm32: fix TX and RX FIFO thresholds Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 05/13] serial: stm32: fix a deadlock condition with wakeup event Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 06/13] serial: stm32: fix wake-up flag handling Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 07/13] serial: stm32: fix a deadlock in set_termios Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 08/13] serial: stm32: fix tx dma completion, release channel Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 09/13] serial: stm32: call stm32_transmit_chars locked Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` Erwan Le Ray [this message]
2021-02-19 17:47   ` [PATCH 10/13] serial: stm32: fix FIFO flush in startup and set_termios Erwan Le Ray
2021-02-19 17:47 ` [PATCH 11/13] serial: stm32: add FIFO flush when port is closed Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 12/13] serial: stm32: fix tx_empty condition Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-02-19 17:47 ` [PATCH 13/13] serial: stm32: add support for "flush_buffer" ops Erwan Le Ray
2021-02-19 17:47   ` Erwan Le Ray
2021-03-03 19:31 ` [PATCH 00/13] stm32 usart various fixes Greg Kroah-Hartman
2021-03-03 19:31   ` Greg Kroah-Hartman

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210219174736.1022-11-erwan.leray@foss.st.com \
    --to=erwan.leray@foss.st.com \
    --cc=alexandre.torgue@foss.st.com \
    --cc=fabrice.gasnier@foss.st.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=jslaby@suse.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-serial@vger.kernel.org \
    --cc=linux-stm32@st-md-mailman.stormreply.com \
    --cc=mcoquelin.stm32@gmail.com \
    --cc=valentin.caron@foss.st.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.