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From: "Pali Rohár" <pali@kernel.org>
To: nnet <nnet@fastmail.fm>
Cc: "Marek Behún" <kabel@kernel.org>,
	a.heider@gmail.com, andrew@lunn.ch, gerald@gk2.net,
	gregory.clement@bootlin.com, kostap@marvell.com,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, luka.perkov@sartura.hr,
	miquel.raynal@bootlin.com, mturquette@baylibre.com,
	rmk+kernel@armlinux.org.uk, sboyd@kernel.org, tmn505@gmail.com,
	vladimir.vid@sartura.hr
Subject: Re: [PATCH mvebu v2 00/10] Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz
Date: Mon, 22 Feb 2021 10:51:11 +0100	[thread overview]
Message-ID: <20210222095111.zcokx4g3sqghjgyl@pali> (raw)
In-Reply-To: <c0ade595-9bfa-4cfc-8c87-0e955173d5db@www.fastmail.com>

On Sunday 21 February 2021 19:17:40 nnet wrote:
> > Could you test if 1.155V voltage for L1 is stable on 1.2 GHz variant?
> 
> ++#define MIN_VOLT_MV_FOR_L1_1200MHZ 1155
> ...
> ++              if (avs_min_l1 > dvfs->avs[0])
> ++                      avs_min_l1 = dvfs->avs[0];
> ++
> ++              if (dvfs->avs[1] < avs_min_l1)
> ++                      dvfs->avs[1] = avs_min_l1;
> 
> This works fine. Tested with switching 600MHz to 1.2GHz under load.

Perfect! Therefore here is final version of patch 04/10 for both 1 GHz
and 1.2 GHz variants of A3720 SoC. I will resend whole patch series.
Could I add your Tested-by line to patch series?

diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c
index b8dc6c849..c7683d447 100644
--- a/drivers/cpufreq/armada-37xx-cpufreq.c
+++ b/drivers/cpufreq/armada-37xx-cpufreq.c
@@ -73,6 +73,8 @@
 #define LOAD_LEVEL_NR	4
 
 #define MIN_VOLT_MV 1000
+#define MIN_VOLT_MV_FOR_L1_1000MHZ 1108
+#define MIN_VOLT_MV_FOR_L1_1200MHZ 1155
 
 /*  AVS value for the corresponding voltage (in mV) */
 static int avs_map[] = {
@@ -208,6 +210,8 @@ static u32 armada_37xx_avs_val_match(int target_vm)
  * - L2 & L3 voltage should be about 150mv smaller than L0 voltage.
  * This function calculates L1 & L2 & L3 AVS values dynamically based
  * on L0 voltage and fill all AVS values to the AVS value table.
+ * When base CPU frequency is 1000 or 1200 MHz then there is additional
+ * minimal avs value for load L1.
  */
 static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
 						struct armada_37xx_dvfs *dvfs)
@@ -239,6 +243,19 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
 		for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++)
 			dvfs->avs[load_level] = avs_min;
 
+		/*
+		 * Set the avs values for load L0 and L1 when base CPU frequency
+		 * is 1000/1200 MHz to its typical initial values according to
+		 * the Armada 3700 Hardware Specifications.
+		 */
+		if (dvfs->cpu_freq_max >= 1000*1000*1000) {
+			if (dvfs->cpu_freq_max >= 1200*1000*1000)
+				avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1200MHZ);
+			else
+				avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1000MHZ);
+			dvfs->avs[0] = dvfs->avs[1] = avs_min;
+		}
+
 		return;
 	}
 
@@ -258,6 +275,26 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
 	target_vm = avs_map[l0_vdd_min] - 150;
 	target_vm = target_vm > MIN_VOLT_MV ? target_vm : MIN_VOLT_MV;
 	dvfs->avs[2] = dvfs->avs[3] = armada_37xx_avs_val_match(target_vm);
+
+	/*
+	 * Fix the avs value for load L1 when base CPU frequency is 1000/1200 MHz,
+	 * otherwise the CPU gets stuck when switching from load L1 to load L0.
+	 * Also ensure that avs value for load L1 is not higher than for L0.
+	 */
+	if (dvfs->cpu_freq_max >= 1000*1000*1000) {
+		u32 avs_min_l1;
+
+		if (dvfs->cpu_freq_max >= 1200*1000*1000)
+			avs_min_l1 = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1200MHZ);
+		else
+			avs_min_l1 = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1000MHZ);
+
+		if (avs_min_l1 > dvfs->avs[0])
+			avs_min_l1 = dvfs->avs[0];
+
+		if (dvfs->avs[1] < avs_min_l1)
+			dvfs->avs[1] = avs_min_l1;
+	}
 }
 
 static void __init armada37xx_cpufreq_avs_setup(struct regmap *base,

WARNING: multiple messages have this Message-ID (diff)
From: "Pali Rohár" <pali@kernel.org>
To: nnet <nnet@fastmail.fm>
Cc: "Marek Behún" <kabel@kernel.org>,
	andrew@lunn.ch, luka.perkov@sartura.hr, sboyd@kernel.org,
	gregory.clement@bootlin.com, a.heider@gmail.com,
	linux-kernel@vger.kernel.org, vladimir.vid@sartura.hr,
	mturquette@baylibre.com, rmk+kernel@armlinux.org.uk,
	tmn505@gmail.com, gerald@gk2.net, miquel.raynal@bootlin.com,
	kostap@marvell.com, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH mvebu v2 00/10] Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz
Date: Mon, 22 Feb 2021 10:51:11 +0100	[thread overview]
Message-ID: <20210222095111.zcokx4g3sqghjgyl@pali> (raw)
In-Reply-To: <c0ade595-9bfa-4cfc-8c87-0e955173d5db@www.fastmail.com>

On Sunday 21 February 2021 19:17:40 nnet wrote:
> > Could you test if 1.155V voltage for L1 is stable on 1.2 GHz variant?
> 
> ++#define MIN_VOLT_MV_FOR_L1_1200MHZ 1155
> ...
> ++              if (avs_min_l1 > dvfs->avs[0])
> ++                      avs_min_l1 = dvfs->avs[0];
> ++
> ++              if (dvfs->avs[1] < avs_min_l1)
> ++                      dvfs->avs[1] = avs_min_l1;
> 
> This works fine. Tested with switching 600MHz to 1.2GHz under load.

Perfect! Therefore here is final version of patch 04/10 for both 1 GHz
and 1.2 GHz variants of A3720 SoC. I will resend whole patch series.
Could I add your Tested-by line to patch series?

diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c
index b8dc6c849..c7683d447 100644
--- a/drivers/cpufreq/armada-37xx-cpufreq.c
+++ b/drivers/cpufreq/armada-37xx-cpufreq.c
@@ -73,6 +73,8 @@
 #define LOAD_LEVEL_NR	4
 
 #define MIN_VOLT_MV 1000
+#define MIN_VOLT_MV_FOR_L1_1000MHZ 1108
+#define MIN_VOLT_MV_FOR_L1_1200MHZ 1155
 
 /*  AVS value for the corresponding voltage (in mV) */
 static int avs_map[] = {
@@ -208,6 +210,8 @@ static u32 armada_37xx_avs_val_match(int target_vm)
  * - L2 & L3 voltage should be about 150mv smaller than L0 voltage.
  * This function calculates L1 & L2 & L3 AVS values dynamically based
  * on L0 voltage and fill all AVS values to the AVS value table.
+ * When base CPU frequency is 1000 or 1200 MHz then there is additional
+ * minimal avs value for load L1.
  */
 static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
 						struct armada_37xx_dvfs *dvfs)
@@ -239,6 +243,19 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
 		for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++)
 			dvfs->avs[load_level] = avs_min;
 
+		/*
+		 * Set the avs values for load L0 and L1 when base CPU frequency
+		 * is 1000/1200 MHz to its typical initial values according to
+		 * the Armada 3700 Hardware Specifications.
+		 */
+		if (dvfs->cpu_freq_max >= 1000*1000*1000) {
+			if (dvfs->cpu_freq_max >= 1200*1000*1000)
+				avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1200MHZ);
+			else
+				avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1000MHZ);
+			dvfs->avs[0] = dvfs->avs[1] = avs_min;
+		}
+
 		return;
 	}
 
@@ -258,6 +275,26 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
 	target_vm = avs_map[l0_vdd_min] - 150;
 	target_vm = target_vm > MIN_VOLT_MV ? target_vm : MIN_VOLT_MV;
 	dvfs->avs[2] = dvfs->avs[3] = armada_37xx_avs_val_match(target_vm);
+
+	/*
+	 * Fix the avs value for load L1 when base CPU frequency is 1000/1200 MHz,
+	 * otherwise the CPU gets stuck when switching from load L1 to load L0.
+	 * Also ensure that avs value for load L1 is not higher than for L0.
+	 */
+	if (dvfs->cpu_freq_max >= 1000*1000*1000) {
+		u32 avs_min_l1;
+
+		if (dvfs->cpu_freq_max >= 1200*1000*1000)
+			avs_min_l1 = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1200MHZ);
+		else
+			avs_min_l1 = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1000MHZ);
+
+		if (avs_min_l1 > dvfs->avs[0])
+			avs_min_l1 = dvfs->avs[0];
+
+		if (dvfs->avs[1] < avs_min_l1)
+			dvfs->avs[1] = avs_min_l1;
+	}
 }
 
 static void __init armada37xx_cpufreq_avs_setup(struct regmap *base,

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  reply	other threads:[~2021-02-22  9:52 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-09 21:00 [PATCH mvebu v2 00/10] Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz nnet
2021-02-09 21:33 ` Pali Rohár
2021-02-09 21:33   ` Pali Rohár
2021-02-09 21:45   ` nnet
2021-02-09 21:45     ` nnet
2021-02-09 22:42     ` Pali Rohár
2021-02-09 22:42       ` Pali Rohár
2021-02-09 22:52       ` nnet
2021-02-09 22:52         ` nnet
2021-02-09 22:56         ` Pali Rohár
2021-02-09 22:56           ` Pali Rohár
2021-02-09 23:16           ` nnet
2021-02-09 23:16             ` nnet
2021-02-09 23:26             ` Marek Behún
2021-02-09 23:26               ` Marek Behún
2021-02-10  1:31               ` nnet
2021-02-10  1:31                 ` nnet
2021-02-10  1:51                 ` nnet
2021-02-10  1:51                   ` nnet
2021-02-10  2:07                   ` nnet
2021-02-10  2:07                     ` nnet
2021-02-10  9:23                     ` Pali Rohár
2021-02-10  9:23                       ` Pali Rohár
2021-02-10 17:34                       ` nnet
2021-02-10 17:34                         ` nnet
2021-02-10 18:03                         ` Pali Rohár
2021-02-10 18:03                           ` Pali Rohár
2021-02-10 19:08                           ` nnet
2021-02-10 19:08                             ` nnet
2021-02-10 19:18                             ` Marek Behún
2021-02-10 19:18                               ` Marek Behún
2021-02-11 19:55                             ` Pali Rohár
2021-02-11 19:55                               ` Pali Rohár
2021-02-11 20:22                               ` nnet
2021-02-11 20:22                                 ` nnet
2021-02-11 23:44                                 ` Pali Rohár
2021-02-11 23:44                                   ` Pali Rohár
2021-02-12  0:41                                   ` nnet
2021-02-12  0:41                                     ` nnet
2021-02-13 10:01                                     ` Pali Rohár
2021-02-13 10:01                                       ` Pali Rohár
2021-02-13 18:30                                       ` nnet
2021-02-13 18:30                                         ` nnet
2021-02-14 12:33                                         ` Pali Rohár
2021-02-14 12:33                                           ` Pali Rohár
2021-02-16  5:48                                           ` nnet
2021-02-16  5:48                                             ` nnet
2021-02-16 10:41                                             ` Pali Rohár
2021-02-16 10:41                                               ` Pali Rohár
2021-02-16 16:27                                               ` nnet
2021-02-16 16:27                                                 ` nnet
2021-02-19 19:33                                                 ` Pali Rohár
2021-02-19 19:33                                                   ` Pali Rohár
2021-02-22  3:17                                                   ` nnet
2021-02-22  3:17                                                     ` nnet
2021-02-22  9:51                                                     ` Pali Rohár [this message]
2021-02-22  9:51                                                       ` Pali Rohár
2021-02-22 16:36                                                       ` nnet
2021-02-22 16:36                                                         ` nnet
2021-02-22 16:40                                                         ` Philip Soares
2021-02-22 16:40                                                           ` Philip Soares
2021-02-10  2:12                   ` Marek Behún
2021-02-10  2:12                     ` Marek Behún
  -- strict thread matches above, loose matches on Subject: below --
2021-01-14 12:40 Pali Rohár
2021-01-14 12:40 ` Pali Rohár
2021-02-01 14:35 ` Tomasz Maciej Nowak
2021-02-01 14:35   ` Tomasz Maciej Nowak
2021-02-03 19:29 ` Anders Trier Olesen
2021-02-03 19:29   ` Anders Trier Olesen

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