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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Sarah Harris" <S.E.Harris@kent.ac.uk>,
	"Chris Wulff" <crwulff@gmail.com>,
	"Sagar Karandikar" <sagark@eecs.berkeley.edu>,
	"David Hildenbrand" <david@redhat.com>,
	"Anthony Green" <green@moxielogic.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Thomas Huth" <thuth@redhat.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Max Filippov" <jcmvbkbc@gmail.com>,
	"Alistair Francis" <Alistair.Francis@wdc.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Guan Xuetao" <gxt@mprc.pku.edu.cn>,
	"Marek Vasut" <marex@denx.de>,
	"Yoshinori Sato" <ysato@users.sourceforge.jp>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Claudio Fontana" <cfontana@suse.de>,
	qemu-ppc@nongnu.org, "Artyom Tarasenko" <atar4qemu@gmail.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Greg Kurz" <groug@kaod.org>,
	qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
	"Michael Rolnik" <mrolnik@gmail.com>,
	"Stafford Horne" <shorne@gmail.com>,
	"David Gibson" <david@gibson.dropbear.id.au>,
	qemu-riscv@nongnu.org,
	"Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>,
	"Cornelia Huck" <cohuck@redhat.com>,
	"Laurent Vivier" <laurent@vivier.eu>,
	"Michael Walle" <michael@walle.cc>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [RFC PATCH v2 17/17] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c
Date: Mon,  1 Mar 2021 22:51:10 +0100	[thread overview]
Message-ID: <20210301215110.772346-18-f4bug@amsat.org> (raw)
In-Reply-To: <20210301215110.772346-1-f4bug@amsat.org>

Somehow similar to commit 78271684719 ("cpu: tcg_ops: move to
tcg-cpu-ops.h, keep a pointer in CPUClass"):

We cannot in principle make the SysEmu Operations field definitions
conditional on CONFIG_SOFTMMU in code that is included by both
common_ss and specific_ss modules.

Therefore, what we can do safely to restrict the SysEmu fields to
system emulation builds, is to move all sysemu operations into a
separate header file, which is only included by system-specific code.

This leaves just a NULL pointer in the cpu.h for the user-mode builds.

Inspired-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
RFC: improve commit description?

 include/hw/core/cpu.h           | 3 ++-
 cpu.c                           | 1 +
 hw/core/cpu.c                   | 1 +
 target/alpha/cpu.c              | 1 +
 target/arm/cpu.c                | 1 +
 target/avr/cpu.c                | 1 +
 target/cris/cpu.c               | 1 +
 target/hppa/cpu.c               | 1 +
 target/i386/cpu.c               | 1 +
 target/m68k/cpu.c               | 1 +
 target/microblaze/cpu.c         | 1 +
 target/mips/cpu.c               | 1 +
 target/moxie/cpu.c              | 1 +
 target/nios2/cpu.c              | 1 +
 target/openrisc/cpu.c           | 1 +
 target/riscv/cpu.c              | 1 +
 target/rx/cpu.c                 | 1 +
 target/s390x/cpu.c              | 1 +
 target/sh4/cpu.c                | 1 +
 target/sparc/cpu.c              | 1 +
 target/tricore/cpu.c            | 1 +
 target/xtensa/cpu.c             | 1 +
 target/ppc/translate_init.c.inc | 1 +
 23 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index d99d3c830dc..398696f0f2d 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -80,7 +80,8 @@ struct TCGCPUOps;
 /* see accel-cpu.h */
 struct AccelCPUClass;
 
-#include "hw/core/sysemu-cpu-ops.h"
+/* see sysemu-cpu-ops.h */
+struct SysemuCPUOps;
 
 /**
  * CPUClass:
diff --git a/cpu.c b/cpu.c
index 64e17537e21..29dafee581f 100644
--- a/cpu.c
+++ b/cpu.c
@@ -29,6 +29,7 @@
 #ifdef CONFIG_USER_ONLY
 #include "qemu.h"
 #else
+#include "hw/core/sysemu-cpu-ops.h"
 #include "exec/address-spaces.h"
 #endif
 #include "sysemu/tcg.h"
diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index 7a8487d468f..da7543be514 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -35,6 +35,7 @@
 #include "trace/trace-root.h"
 #include "qemu/plugin.h"
 #include "sysemu/hw_accel.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 CPUState *cpu_by_arch_id(int64_t id)
 {
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index d9a51d9f647..f6b4bb14cc5 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -24,6 +24,7 @@
 #include "qemu/qemu-print.h"
 #include "cpu.h"
 #include "exec/exec-all.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 
 static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 6cd546213de..7fa22a6beba 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -35,6 +35,7 @@
 #if !defined(CONFIG_USER_ONLY)
 #include "hw/loader.h"
 #include "hw/boards.h"
+#include "hw/core/sysemu-cpu-ops.h"
 #endif
 #include "sysemu/sysemu.h"
 #include "sysemu/tcg.h"
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 040d3526995..89de301fc2b 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -24,6 +24,7 @@
 #include "exec/exec-all.h"
 #include "cpu.h"
 #include "disas/dis-asm.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void avr_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 77f821f4d9a..ed944094cf3 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -26,6 +26,7 @@
 #include "qemu/qemu-print.h"
 #include "cpu.h"
 #include "mmu.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 
 static void cris_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 7de37aadd4d..304a975eddf 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -25,6 +25,7 @@
 #include "qemu/module.h"
 #include "exec/exec-all.h"
 #include "fpu/softfloat.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 
 static void hppa_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 3519cef8fba..1e8ee015bfc 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -60,6 +60,7 @@
 #include "exec/address-spaces.h"
 #include "hw/i386/apic_internal.h"
 #include "hw/boards.h"
+#include "hw/core/sysemu-cpu-ops.h"
 #endif
 
 #include "disas/capstone.h"
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index eaf5f34d22c..96fe37e84f1 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -23,6 +23,7 @@
 #include "cpu.h"
 #include "migration/vmstate.h"
 #include "fpu/softfloat.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index a21f15192ae..ad3996cd90e 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -28,6 +28,7 @@
 #include "hw/qdev-properties.h"
 #include "exec/exec-all.h"
 #include "fpu/softfloat-helpers.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static const struct {
     const char *name;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 285564b4d5b..ab3b6a76b1a 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -34,6 +34,7 @@
 #include "hw/semihosting/semihost.h"
 #include "qapi/qapi-commands-machine-target.h"
 #include "fpu_helper.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 #if !defined(CONFIG_USER_ONLY)
 
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 47b8735bb75..9c450fc9a61 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -22,6 +22,7 @@
 #include "cpu.h"
 #include "migration/vmstate.h"
 #include "machine.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void moxie_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index e5cbf43d6ee..6e89d3a7abd 100644
--- a/target/nios2/cpu.c
+++ b/target/nios2/cpu.c
@@ -26,6 +26,7 @@
 #include "exec/gdbstub.h"
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void nios2_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index c666e86e919..fceacf97203 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -21,6 +21,7 @@
 #include "qapi/error.h"
 #include "qemu/qemu-print.h"
 #include "cpu.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index eaf7c13e5a6..f24b033426d 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -29,6 +29,7 @@
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
 #include "fpu/softfloat-helpers.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 /* RISC-V CPU definitions */
 
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index d1a7a5f6877..458553b8fba 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -25,6 +25,7 @@
 #include "exec/exec-all.h"
 #include "hw/loader.h"
 #include "fpu/softfloat.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void rx_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 30117fc8cd7..511e9b2aa6f 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -42,6 +42,7 @@
 #include "sysemu/arch_init.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/tcg.h"
+#include "hw/core/sysemu-cpu-ops.h"
 #endif
 #include "fpu/softfloat-helpers.h"
 #include "disas/capstone.h"
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 843f39de41c..273bf3fbe8e 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -26,6 +26,7 @@
 #include "migration/vmstate.h"
 #include "exec/exec-all.h"
 #include "fpu/softfloat-helpers.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void superh_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index c8a115c886a..ce9cc6469a9 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -25,6 +25,7 @@
 #include "exec/exec-all.h"
 #include "hw/qdev-properties.h"
 #include "qapi/visitor.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 //#define DEBUG_FEATURES
 
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 0c4b5021e79..4709854a0aa 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -23,6 +23,7 @@
 #include "exec/exec-all.h"
 #include "qemu/error-report.h"
 #include "migration/vmstate.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static inline void set_feature(CPUTriCoreState *env, int feature)
 {
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 44a4524bc0a..7e24cb3269f 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -34,6 +34,7 @@
 #include "fpu/softfloat.h"
 #include "qemu/module.h"
 #include "migration/vmstate.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 
 static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index d38d194fe87..591fae52410 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -42,6 +42,7 @@
 #include "disas/capstone.h"
 #include "fpu/softfloat.h"
 #include "qapi/qapi-commands-machine-target.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 /* #define PPC_DUMP_CPU */
 /* #define PPC_DEBUG_SPR */
-- 
2.26.2



WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Michael Rolnik" <mrolnik@gmail.com>,
	"Anthony Green" <green@moxielogic.com>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, "Marek Vasut" <marex@denx.de>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Stafford Horne" <shorne@gmail.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	qemu-s390x@nongnu.org, "Chris Wulff" <crwulff@gmail.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Yoshinori Sato" <ysato@users.sourceforge.jp>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"David Gibson" <david@gibson.dropbear.id.au>,
	"Sarah Harris" <S.E.Harris@kent.ac.uk>,
	"David Hildenbrand" <david@redhat.com>,
	"Cornelia Huck" <cohuck@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Sagar Karandikar" <sagark@eecs.berkeley.edu>,
	qemu-riscv@nongnu.org,
	"Alistair Francis" <Alistair.Francis@wdc.com>,
	qemu-ppc@nongnu.org, "Laurent Vivier" <laurent@vivier.eu>,
	"Claudio Fontana" <cfontana@suse.de>,
	"Michael Walle" <michael@walle.cc>,
	"Guan Xuetao" <gxt@mprc.pku.edu.cn>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Artyom Tarasenko" <atar4qemu@gmail.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Greg Kurz" <groug@kaod.org>,
	"Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Max Filippov" <jcmvbkbc@gmail.com>
Subject: [RFC PATCH v2 17/17] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c
Date: Mon,  1 Mar 2021 22:51:10 +0100	[thread overview]
Message-ID: <20210301215110.772346-18-f4bug@amsat.org> (raw)
In-Reply-To: <20210301215110.772346-1-f4bug@amsat.org>

Somehow similar to commit 78271684719 ("cpu: tcg_ops: move to
tcg-cpu-ops.h, keep a pointer in CPUClass"):

We cannot in principle make the SysEmu Operations field definitions
conditional on CONFIG_SOFTMMU in code that is included by both
common_ss and specific_ss modules.

Therefore, what we can do safely to restrict the SysEmu fields to
system emulation builds, is to move all sysemu operations into a
separate header file, which is only included by system-specific code.

This leaves just a NULL pointer in the cpu.h for the user-mode builds.

Inspired-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
RFC: improve commit description?

 include/hw/core/cpu.h           | 3 ++-
 cpu.c                           | 1 +
 hw/core/cpu.c                   | 1 +
 target/alpha/cpu.c              | 1 +
 target/arm/cpu.c                | 1 +
 target/avr/cpu.c                | 1 +
 target/cris/cpu.c               | 1 +
 target/hppa/cpu.c               | 1 +
 target/i386/cpu.c               | 1 +
 target/m68k/cpu.c               | 1 +
 target/microblaze/cpu.c         | 1 +
 target/mips/cpu.c               | 1 +
 target/moxie/cpu.c              | 1 +
 target/nios2/cpu.c              | 1 +
 target/openrisc/cpu.c           | 1 +
 target/riscv/cpu.c              | 1 +
 target/rx/cpu.c                 | 1 +
 target/s390x/cpu.c              | 1 +
 target/sh4/cpu.c                | 1 +
 target/sparc/cpu.c              | 1 +
 target/tricore/cpu.c            | 1 +
 target/xtensa/cpu.c             | 1 +
 target/ppc/translate_init.c.inc | 1 +
 23 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index d99d3c830dc..398696f0f2d 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -80,7 +80,8 @@ struct TCGCPUOps;
 /* see accel-cpu.h */
 struct AccelCPUClass;
 
-#include "hw/core/sysemu-cpu-ops.h"
+/* see sysemu-cpu-ops.h */
+struct SysemuCPUOps;
 
 /**
  * CPUClass:
diff --git a/cpu.c b/cpu.c
index 64e17537e21..29dafee581f 100644
--- a/cpu.c
+++ b/cpu.c
@@ -29,6 +29,7 @@
 #ifdef CONFIG_USER_ONLY
 #include "qemu.h"
 #else
+#include "hw/core/sysemu-cpu-ops.h"
 #include "exec/address-spaces.h"
 #endif
 #include "sysemu/tcg.h"
diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index 7a8487d468f..da7543be514 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -35,6 +35,7 @@
 #include "trace/trace-root.h"
 #include "qemu/plugin.h"
 #include "sysemu/hw_accel.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 CPUState *cpu_by_arch_id(int64_t id)
 {
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index d9a51d9f647..f6b4bb14cc5 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -24,6 +24,7 @@
 #include "qemu/qemu-print.h"
 #include "cpu.h"
 #include "exec/exec-all.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 
 static void alpha_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 6cd546213de..7fa22a6beba 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -35,6 +35,7 @@
 #if !defined(CONFIG_USER_ONLY)
 #include "hw/loader.h"
 #include "hw/boards.h"
+#include "hw/core/sysemu-cpu-ops.h"
 #endif
 #include "sysemu/sysemu.h"
 #include "sysemu/tcg.h"
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 040d3526995..89de301fc2b 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -24,6 +24,7 @@
 #include "exec/exec-all.h"
 #include "cpu.h"
 #include "disas/dis-asm.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void avr_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 77f821f4d9a..ed944094cf3 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -26,6 +26,7 @@
 #include "qemu/qemu-print.h"
 #include "cpu.h"
 #include "mmu.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 
 static void cris_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 7de37aadd4d..304a975eddf 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -25,6 +25,7 @@
 #include "qemu/module.h"
 #include "exec/exec-all.h"
 #include "fpu/softfloat.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 
 static void hppa_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 3519cef8fba..1e8ee015bfc 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -60,6 +60,7 @@
 #include "exec/address-spaces.h"
 #include "hw/i386/apic_internal.h"
 #include "hw/boards.h"
+#include "hw/core/sysemu-cpu-ops.h"
 #endif
 
 #include "disas/capstone.h"
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index eaf5f34d22c..96fe37e84f1 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -23,6 +23,7 @@
 #include "cpu.h"
 #include "migration/vmstate.h"
 #include "fpu/softfloat.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index a21f15192ae..ad3996cd90e 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -28,6 +28,7 @@
 #include "hw/qdev-properties.h"
 #include "exec/exec-all.h"
 #include "fpu/softfloat-helpers.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static const struct {
     const char *name;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 285564b4d5b..ab3b6a76b1a 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -34,6 +34,7 @@
 #include "hw/semihosting/semihost.h"
 #include "qapi/qapi-commands-machine-target.h"
 #include "fpu_helper.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 #if !defined(CONFIG_USER_ONLY)
 
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 47b8735bb75..9c450fc9a61 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -22,6 +22,7 @@
 #include "cpu.h"
 #include "migration/vmstate.h"
 #include "machine.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void moxie_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index e5cbf43d6ee..6e89d3a7abd 100644
--- a/target/nios2/cpu.c
+++ b/target/nios2/cpu.c
@@ -26,6 +26,7 @@
 #include "exec/gdbstub.h"
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void nios2_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index c666e86e919..fceacf97203 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -21,6 +21,7 @@
 #include "qapi/error.h"
 #include "qemu/qemu-print.h"
 #include "cpu.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index eaf7c13e5a6..f24b033426d 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -29,6 +29,7 @@
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
 #include "fpu/softfloat-helpers.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 /* RISC-V CPU definitions */
 
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index d1a7a5f6877..458553b8fba 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -25,6 +25,7 @@
 #include "exec/exec-all.h"
 #include "hw/loader.h"
 #include "fpu/softfloat.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void rx_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 30117fc8cd7..511e9b2aa6f 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -42,6 +42,7 @@
 #include "sysemu/arch_init.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/tcg.h"
+#include "hw/core/sysemu-cpu-ops.h"
 #endif
 #include "fpu/softfloat-helpers.h"
 #include "disas/capstone.h"
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 843f39de41c..273bf3fbe8e 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -26,6 +26,7 @@
 #include "migration/vmstate.h"
 #include "exec/exec-all.h"
 #include "fpu/softfloat-helpers.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static void superh_cpu_set_pc(CPUState *cs, vaddr value)
 {
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index c8a115c886a..ce9cc6469a9 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -25,6 +25,7 @@
 #include "exec/exec-all.h"
 #include "hw/qdev-properties.h"
 #include "qapi/visitor.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 //#define DEBUG_FEATURES
 
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 0c4b5021e79..4709854a0aa 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -23,6 +23,7 @@
 #include "exec/exec-all.h"
 #include "qemu/error-report.h"
 #include "migration/vmstate.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 static inline void set_feature(CPUTriCoreState *env, int feature)
 {
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 44a4524bc0a..7e24cb3269f 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -34,6 +34,7 @@
 #include "fpu/softfloat.h"
 #include "qemu/module.h"
 #include "migration/vmstate.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 
 static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index d38d194fe87..591fae52410 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -42,6 +42,7 @@
 #include "disas/capstone.h"
 #include "fpu/softfloat.h"
 #include "qapi/qapi-commands-machine-target.h"
+#include "hw/core/sysemu-cpu-ops.h"
 
 /* #define PPC_DUMP_CPU */
 /* #define PPC_DEBUG_SPR */
-- 
2.26.2



  parent reply	other threads:[~2021-03-01 22:06 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-01 21:50 [PATCH v2 00/17] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-03-01 21:50 ` Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 01/17] target: Set CPUClass::vmsd instead of DeviceClass::vmsd Philippe Mathieu-Daudé
2021-03-01 21:50   ` Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 02/17] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Philippe Mathieu-Daudé
2021-03-01 21:50   ` Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 03/17] cpu: Introduce cpu_virtio_is_big_endian() Philippe Mathieu-Daudé
2021-03-01 21:50   ` Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 04/17] cpu: Directly use cpu_write_elf*() fallback handlers in place Philippe Mathieu-Daudé
2021-03-01 21:50   ` Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 05/17] cpu: Directly use get_paging_enabled() " Philippe Mathieu-Daudé
2021-03-01 21:50   ` Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 06/17] cpu: Directly use get_memory_mapping() " Philippe Mathieu-Daudé
2021-03-01 21:50   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 07/17] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 08/17] cpu: Move CPUClass::vmsd to SysemuCPUOps Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 09/17] cpu: Move CPUClass::virtio_is_big_endian " Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 10/17] cpu: Move CPUClass::get_crash_info " Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 11/17] cpu: Move CPUClass::write_elf* " Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 12/17] cpu: Move CPUClass::asidx_from_attrs " Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 13/17] cpu: Move CPUClass::get_phys_page_debug " Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 14/17] cpu: Move CPUClass::get_memory_mapping " Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 15/17] cpu: Move CPUClass::get_paging_enabled " Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 16/17] cpu: Restrict cpu_paging_enabled / cpu_get_memory_mapping to sysemu Philippe Mathieu-Daudé
2021-03-01 21:51   ` Philippe Mathieu-Daudé
2021-03-02 12:34   ` Claudio Fontana
2021-03-02 12:34     ` Claudio Fontana
2021-03-02 12:39     ` Philippe Mathieu-Daudé
2021-03-02 12:39       ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` Philippe Mathieu-Daudé [this message]
2021-03-01 21:51   ` [RFC PATCH v2 17/17] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c Philippe Mathieu-Daudé
2021-03-02  7:34   ` Philippe Mathieu-Daudé
2021-03-02  7:34     ` Philippe Mathieu-Daudé
2021-03-02 12:35 ` [PATCH v2 00/17] cpu: Introduce SysemuCPUOps structure Claudio Fontana
2021-03-02 12:35   ` Claudio Fontana

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