* [PATCH 0/3] v3u: add support for TMU
@ 2021-03-05 14:32 Wolfram Sang
2021-03-05 14:32 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks Wolfram Sang
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Wolfram Sang @ 2021-03-05 14:32 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Geert Uytterhoeven, Niklas Söderlund, Wolfram Sang
Here is the series with patches for Geert to enable TMU on V3U. I took
the DTS patches from the BSP, the rest was developed on mainline tree.
Patch 3 is only for testing.
The TMU passed the tests described by Niklas here:
https://elinux.org/R-Car/Tests:timers
Phong Hoang (2):
arm64: dts: renesas: r8a779a0: Add TMU support
TEST: arm64: dts: renesas: falcon: Enable TMU
Wolfram Sang (1):
clk: renesas: r8a779a0: Add TMU clocks
.../boot/dts/renesas/r8a779a0-falcon.dts | 20 ++++++
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 65 +++++++++++++++++++
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 6 ++
3 files changed, 91 insertions(+)
--
2.29.2
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks
2021-03-05 14:32 [PATCH 0/3] v3u: add support for TMU Wolfram Sang
@ 2021-03-05 14:32 ` Wolfram Sang
2021-03-08 8:39 ` Geert Uytterhoeven
2021-03-08 12:13 ` Niklas Söderlund
2021-03-05 14:32 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TMU support Wolfram Sang
2021-03-05 14:32 ` [PATCH 3/3] TEST: arm64: dts: renesas: falcon: Enable TMU Wolfram Sang
2 siblings, 2 replies; 8+ messages in thread
From: Wolfram Sang @ 2021-03-05 14:32 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Geert Uytterhoeven, Niklas Söderlund, Wolfram Sang
Also add CL16MCK source clock for TMU0.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 228068823caf..53bc2db0f3fc 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -144,6 +144,7 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = {
DEF_FIXED("vcbus", R8A779A0_CLK_VCBUS, CLK_PLL5_DIV4, 1, 1),
DEF_FIXED("cbfusa", R8A779A0_CLK_CBFUSA, CLK_EXTAL, 2, 1),
DEF_FIXED("cp", R8A779A0_CLK_CP, CLK_EXTAL, 2, 1),
+ DEF_FIXED("cl16mck", R8A779A0_CLK_CL16MCK, CLK_PLL1_DIV2, 64, 1),
DEF_SD("sd0", R8A779A0_CLK_SD0, CLK_SDSRC, 0x870),
@@ -192,6 +193,11 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
DEF_MOD("sdhi0", 706, R8A779A0_CLK_SD0),
DEF_MOD("sydm1", 709, R8A779A0_CLK_S1D2),
DEF_MOD("sydm2", 710, R8A779A0_CLK_S1D2),
+ DEF_MOD("tmu0", 713, R8A779A0_CLK_CL16MCK),
+ DEF_MOD("tmu1", 714, R8A779A0_CLK_S1D4),
+ DEF_MOD("tmu2", 715, R8A779A0_CLK_S1D4),
+ DEF_MOD("tmu3", 716, R8A779A0_CLK_S1D4),
+ DEF_MOD("tmu4", 717, R8A779A0_CLK_S1D4),
DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
--
2.29.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TMU support
2021-03-05 14:32 [PATCH 0/3] v3u: add support for TMU Wolfram Sang
2021-03-05 14:32 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks Wolfram Sang
@ 2021-03-05 14:32 ` Wolfram Sang
2021-03-08 12:14 ` Niklas Söderlund
2021-03-10 9:54 ` Geert Uytterhoeven
2021-03-05 14:32 ` [PATCH 3/3] TEST: arm64: dts: renesas: falcon: Enable TMU Wolfram Sang
2 siblings, 2 replies; 8+ messages in thread
From: Wolfram Sang @ 2021-03-05 14:32 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Geert Uytterhoeven, Niklas Söderlund, Phong Hoang, Wolfram Sang
From: Phong Hoang <phong.hoang.wz@renesas.com>
This patch adds TMU{0|1|2|3|4} device nodes for R-Car V3U (r8a779a0) SoC.
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
[wsa: rebased, double checked values]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 65 +++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 2762c8b75c4e..5e4332d85380 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -330,6 +330,71 @@ sysc: system-controller@e6180000 {
#power-domain-cells = <1>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc0000 {
+ compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+ reg = <0 0xe6fc0000 0 0x30>;
+ interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd0000 {
+ compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+ reg = <0 0xe6fd0000 0 0x30>;
+ interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe0000 {
+ compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+ reg = <0 0xe6fe0000 0 0x30>;
+ interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc00000 {
+ compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
+ reg = <0 0xffc00000 0 0x30>;
+ interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 717>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 717>;
+ status = "disabled";
+ };
+
i2c0: i2c@e6500000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
--
2.29.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] TEST: arm64: dts: renesas: falcon: Enable TMU
2021-03-05 14:32 [PATCH 0/3] v3u: add support for TMU Wolfram Sang
2021-03-05 14:32 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks Wolfram Sang
2021-03-05 14:32 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TMU support Wolfram Sang
@ 2021-03-05 14:32 ` Wolfram Sang
2 siblings, 0 replies; 8+ messages in thread
From: Wolfram Sang @ 2021-03-05 14:32 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Geert Uytterhoeven, Niklas Söderlund, Phong Hoang, Wolfram Sang
From: Phong Hoang <phong.hoang.wz@renesas.com>
This patch enables TMU{0|1|2|3|4} on the falcon board.
Only for testing, not for upstream!
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
.../boot/dts/renesas/r8a779a0-falcon.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index a8f1f51c492b..4c92bb00f168 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -42,3 +42,23 @@ &rwdt {
timeout-sec = <60>;
status = "okay";
};
+
+&tmu0 {
+ status = "okay";
+};
+
+&tmu1 {
+ status = "okay";
+};
+
+&tmu2 {
+ status = "okay";
+};
+
+&tmu3 {
+ status = "okay";
+};
+
+&tmu4 {
+ status = "okay";
+};
--
2.29.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks
2021-03-05 14:32 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks Wolfram Sang
@ 2021-03-08 8:39 ` Geert Uytterhoeven
2021-03-08 12:13 ` Niklas Söderlund
1 sibling, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2021-03-08 8:39 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Linux-Renesas, Niklas Söderlund
On Fri, Mar 5, 2021 at 3:33 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Also add CL16MCK source clock for TMU0.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v5.13.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks
2021-03-05 14:32 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks Wolfram Sang
2021-03-08 8:39 ` Geert Uytterhoeven
@ 2021-03-08 12:13 ` Niklas Söderlund
1 sibling, 0 replies; 8+ messages in thread
From: Niklas Söderlund @ 2021-03-08 12:13 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linux-renesas-soc, Geert Uytterhoeven
Hi Wolfram,
Thanks for your work.
On 2021-03-05 15:32:57 +0100, Wolfram Sang wrote:
> Also add CL16MCK source clock for TMU0.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> drivers/clk/renesas/r8a779a0-cpg-mssr.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> index 228068823caf..53bc2db0f3fc 100644
> --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> @@ -144,6 +144,7 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = {
> DEF_FIXED("vcbus", R8A779A0_CLK_VCBUS, CLK_PLL5_DIV4, 1, 1),
> DEF_FIXED("cbfusa", R8A779A0_CLK_CBFUSA, CLK_EXTAL, 2, 1),
> DEF_FIXED("cp", R8A779A0_CLK_CP, CLK_EXTAL, 2, 1),
> + DEF_FIXED("cl16mck", R8A779A0_CLK_CL16MCK, CLK_PLL1_DIV2, 64, 1),
>
> DEF_SD("sd0", R8A779A0_CLK_SD0, CLK_SDSRC, 0x870),
>
> @@ -192,6 +193,11 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> DEF_MOD("sdhi0", 706, R8A779A0_CLK_SD0),
> DEF_MOD("sydm1", 709, R8A779A0_CLK_S1D2),
> DEF_MOD("sydm2", 710, R8A779A0_CLK_S1D2),
> + DEF_MOD("tmu0", 713, R8A779A0_CLK_CL16MCK),
> + DEF_MOD("tmu1", 714, R8A779A0_CLK_S1D4),
> + DEF_MOD("tmu2", 715, R8A779A0_CLK_S1D4),
> + DEF_MOD("tmu3", 716, R8A779A0_CLK_S1D4),
> + DEF_MOD("tmu4", 717, R8A779A0_CLK_S1D4),
> DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
> DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
> DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
> --
> 2.29.2
>
--
Regards,
Niklas Söderlund
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TMU support
2021-03-05 14:32 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TMU support Wolfram Sang
@ 2021-03-08 12:14 ` Niklas Söderlund
2021-03-10 9:54 ` Geert Uytterhoeven
1 sibling, 0 replies; 8+ messages in thread
From: Niklas Söderlund @ 2021-03-08 12:14 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linux-renesas-soc, Geert Uytterhoeven, Phong Hoang
Hi Phong and Wolfram,
Thanks for this patch.
On 2021-03-05 15:32:58 +0100, Wolfram Sang wrote:
> From: Phong Hoang <phong.hoang.wz@renesas.com>
>
> This patch adds TMU{0|1|2|3|4} device nodes for R-Car V3U (r8a779a0) SoC.
>
> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
> [wsa: rebased, double checked values]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 65 +++++++++++++++++++++++
> 1 file changed, 65 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> index 2762c8b75c4e..5e4332d85380 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -330,6 +330,71 @@ sysc: system-controller@e6180000 {
> #power-domain-cells = <1>;
> };
>
> + tmu0: timer@e61e0000 {
> + compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> + reg = <0 0xe61e0000 0 0x30>;
> + interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 713>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 713>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@e6fc0000 {
> + compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> + reg = <0 0xe6fc0000 0 0x30>;
> + interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 714>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 714>;
> + status = "disabled";
> + };
> +
> + tmu2: timer@e6fd0000 {
> + compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> + reg = <0 0xe6fd0000 0 0x30>;
> + interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 715>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 715>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@e6fe0000 {
> + compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> + reg = <0 0xe6fe0000 0 0x30>;
> + interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 716>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 716>;
> + status = "disabled";
> + };
> +
> + tmu4: timer@ffc00000 {
> + compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
> + reg = <0 0xffc00000 0 0x30>;
> + interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 717>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 717>;
> + status = "disabled";
> + };
> +
> i2c0: i2c@e6500000 {
> compatible = "renesas,i2c-r8a779a0",
> "renesas,rcar-gen3-i2c";
> --
> 2.29.2
>
--
Regards,
Niklas Söderlund
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TMU support
2021-03-05 14:32 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TMU support Wolfram Sang
2021-03-08 12:14 ` Niklas Söderlund
@ 2021-03-10 9:54 ` Geert Uytterhoeven
1 sibling, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2021-03-10 9:54 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Linux-Renesas, Niklas Söderlund, Phong Hoang
On Fri, Mar 5, 2021 at 3:33 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Phong Hoang <phong.hoang.wz@renesas.com>
>
> This patch adds TMU{0|1|2|3|4} device nodes for R-Car V3U (r8a779a0) SoC.
>
> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
> [wsa: rebased, double checked values]
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.13.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-03-10 9:55 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-05 14:32 [PATCH 0/3] v3u: add support for TMU Wolfram Sang
2021-03-05 14:32 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TMU clocks Wolfram Sang
2021-03-08 8:39 ` Geert Uytterhoeven
2021-03-08 12:13 ` Niklas Söderlund
2021-03-05 14:32 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TMU support Wolfram Sang
2021-03-08 12:14 ` Niklas Söderlund
2021-03-10 9:54 ` Geert Uytterhoeven
2021-03-05 14:32 ` [PATCH 3/3] TEST: arm64: dts: renesas: falcon: Enable TMU Wolfram Sang
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