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* [PULL 00/14] Renesas patches for 2021-03-06
@ 2021-03-06 15:36 Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 01/14] target/sh4: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
                   ` (14 more replies)
  0 siblings, 15 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel; +Cc: Magnus Damm, Philippe Mathieu-Daudé, Yoshinori Sato

Hi Peter,

As SH-4 is not very active, I'm here covering up with this trivial patch queue.

The following changes since commit 91e92cad67caca3bc4b8e920ddb5c8ca64aac9e1:

  Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210305' into staging (2021-03-05 19:04:47 +0000)

are available in the Git repository at:

  https://gitlab.com/philmd/qemu.git tags/renesas-20210306

for you to fetch changes up to ef95ca038295bdf6749cbce426b281c21a08971e:

  hw/sh4/sh7750_regs: Replace link to license by its full content (2021-03-06 16:19:03 +0100)

----------------------------------------------------------------
Renesas patches queue

- MMU prototype cleanups
- Clarify licenses
- Fine-grained Kconfig entries for SH-4 devices
----------------------------------------------------------------

Philippe Mathieu-Daudé (14):
  target/sh4: Fix code style for checkpatch.pl
  target/sh4: Replace magic value by MMUAccessType definitions
  target/sh4: Remove unused 'int access_type' argument
  target/sh4: Let get_physical_address() use MMUAccessType access_type
  target/sh4: Remove unused definitions
  hw/sh4: Add missing license
  hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board
  hw/intc: Introduce SH_INTC Kconfig entry
  hw/char: Introduce SH_SCI Kconfig entry
  hw/timer: Introduce SH_TIMER Kconfig entry
  hw/block: Introduce TC58128 eeprom Kconfig entry
  hw/pci-host: Introduce SH_PCI Kconfig entry
  hw/sh4: Remove now unused CONFIG_SH4 from Kconfig
  hw/sh4/sh7750_regs: Replace link to license by its full content

 hw/sh4/sh7750_regs.h          |  24 +++++++-
 include/hw/sh4/sh.h           |  31 ++++++++++-
 target/sh4/cpu.h              |  11 ----
 hw/block/tc58128.c            |  26 +++++++++
 hw/{sh4 => pci-host}/sh_pci.c |   0
 target/sh4/helper.c           | 101 +++++++++++++++++-----------------
 MAINTAINERS                   |   6 ++
 hw/block/Kconfig              |   3 +
 hw/block/meson.build          |   2 +-
 hw/char/Kconfig               |   3 +
 hw/char/meson.build           |   2 +-
 hw/intc/Kconfig               |   3 +
 hw/intc/meson.build           |   2 +-
 hw/pci-host/Kconfig           |   4 ++
 hw/pci-host/meson.build       |   1 +
 hw/sh4/Kconfig                |  12 ++--
 hw/sh4/meson.build            |   1 -
 hw/timer/Kconfig              |   4 ++
 hw/timer/meson.build          |   2 +-
 19 files changed, 160 insertions(+), 78 deletions(-)
 rename hw/{sh4 => pci-host}/sh_pci.c (100%)

-- 
2.26.2



^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PULL 01/14] target/sh4: Fix code style for checkpatch.pl
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 02/14] target/sh4: Replace magic value by MMUAccessType definitions Philippe Mathieu-Daudé
                   ` (13 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Richard Henderson, Magnus Damm, Philippe Mathieu-Daudé,
	Yoshinori Sato

We are going to move this code, fix its style first.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210127232151.3523581-2-f4bug@amsat.org>
---
 target/sh4/helper.c | 82 ++++++++++++++++++++++-----------------------
 1 file changed, 41 insertions(+), 41 deletions(-)

diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 408478ce5dc..fc816137766 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -330,8 +330,8 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid
    MMU_IADDR_ERROR, MMU_DADDR_ERROR_READ, MMU_DADDR_ERROR_WRITE.
 */
 static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
-			   int *prot, target_ulong address,
-			   int rw, int access_type)
+                           int *prot, target_ulong address,
+                           int rw, int access_type)
 {
     int use_asid, n;
     tlb_t *matching = NULL;
@@ -340,12 +340,12 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
 
     if (rw == 2) {
         n = find_itlb_entry(env, address, use_asid);
-	if (n >= 0) {
-	    matching = &env->itlb[n];
+        if (n >= 0) {
+            matching = &env->itlb[n];
             if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
-		n = MMU_ITLB_VIOLATION;
+                n = MMU_ITLB_VIOLATION;
             } else {
-		*prot = PAGE_EXEC;
+                *prot = PAGE_EXEC;
             }
         } else {
             n = find_utlb_entry(env, address, use_asid);
@@ -365,14 +365,14 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
             } else if (n == MMU_DTLB_MISS) {
                 n = MMU_ITLB_MISS;
             }
-	}
+        }
     } else {
-	n = find_utlb_entry(env, address, use_asid);
-	if (n >= 0) {
-	    matching = &env->utlb[n];
+        n = find_utlb_entry(env, address, use_asid);
+        if (n >= 0) {
+            matching = &env->utlb[n];
             if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
-                n = (rw == 1) ? MMU_DTLB_VIOLATION_WRITE :
-                    MMU_DTLB_VIOLATION_READ;
+                n = (rw == 1)
+                    ? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ;
             } else if ((rw == 1) && !(matching->pr & 1)) {
                 n = MMU_DTLB_VIOLATION_WRITE;
             } else if ((rw == 1) && !matching->d) {
@@ -383,15 +383,15 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
                     *prot |= PAGE_WRITE;
                 }
             }
-	} else if (n == MMU_DTLB_MISS) {
-	    n = (rw == 1) ? MMU_DTLB_MISS_WRITE :
-		MMU_DTLB_MISS_READ;
-	}
+        } else if (n == MMU_DTLB_MISS) {
+            n = (rw == 1)
+                ? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ;
+        }
     }
     if (n >= 0) {
-	n = MMU_OK;
-	*physical = ((matching->ppn << 10) & ~(matching->size - 1)) |
-	    (address & (matching->size - 1));
+        n = MMU_OK;
+        *physical = ((matching->ppn << 10) & ~(matching->size - 1))
+                    | (address & (matching->size - 1));
     }
     return n;
 }
@@ -401,34 +401,34 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
                                 int rw, int access_type)
 {
     /* P1, P2 and P4 areas do not use translation */
-    if ((address >= 0x80000000 && address < 0xc0000000) ||
-	address >= 0xe0000000) {
+    if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) {
         if (!(env->sr & (1u << SR_MD))
-	    && (address < 0xe0000000 || address >= 0xe4000000)) {
-	    /* Unauthorized access in user mode (only store queues are available) */
+                && (address < 0xe0000000 || address >= 0xe4000000)) {
+            /* Unauthorized access in user mode (only store queues are available) */
             qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n");
-	    if (rw == 0)
-		return MMU_DADDR_ERROR_READ;
-	    else if (rw == 1)
-		return MMU_DADDR_ERROR_WRITE;
-	    else
-		return MMU_IADDR_ERROR;
-	}
-	if (address >= 0x80000000 && address < 0xc0000000) {
-	    /* Mask upper 3 bits for P1 and P2 areas */
-	    *physical = address & 0x1fffffff;
-	} else {
-	    *physical = address;
-	}
-	*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
-	return MMU_OK;
+            if (rw == 0) {
+                return MMU_DADDR_ERROR_READ;
+            } else if (rw == 1) {
+                return MMU_DADDR_ERROR_WRITE;
+            } else {
+                return MMU_IADDR_ERROR;
+            }
+        }
+        if (address >= 0x80000000 && address < 0xc0000000) {
+            /* Mask upper 3 bits for P1 and P2 areas */
+            *physical = address & 0x1fffffff;
+        } else {
+            *physical = address;
+        }
+        *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+        return MMU_OK;
     }
 
     /* If MMU is disabled, return the corresponding physical page */
     if (!(env->mmucr & MMUCR_AT)) {
-	*physical = address & 0x1FFFFFFF;
-	*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
-	return MMU_OK;
+        *physical = address & 0x1FFFFFFF;
+        *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+        return MMU_OK;
     }
 
     /* We need to resort to the MMU */
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 02/14] target/sh4: Replace magic value by MMUAccessType definitions
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 01/14] target/sh4: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 03/14] target/sh4: Remove unused 'int access_type' argument Philippe Mathieu-Daudé
                   ` (12 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Richard Henderson, Magnus Damm, Philippe Mathieu-Daudé,
	Yoshinori Sato

Replace the 0/1/2 magic values by the corresponding MMUAccessType.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210127232151.3523581-3-f4bug@amsat.org>
---
 target/sh4/helper.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index fc816137766..4303ebf018b 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -338,7 +338,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
 
     use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD));
 
-    if (rw == 2) {
+    if (rw == MMU_INST_FETCH) {
         n = find_itlb_entry(env, address, use_asid);
         if (n >= 0) {
             matching = &env->itlb[n];
@@ -371,11 +371,11 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
         if (n >= 0) {
             matching = &env->utlb[n];
             if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
-                n = (rw == 1)
+                n = (rw == MMU_DATA_STORE)
                     ? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ;
-            } else if ((rw == 1) && !(matching->pr & 1)) {
+            } else if ((rw == MMU_DATA_STORE) && !(matching->pr & 1)) {
                 n = MMU_DTLB_VIOLATION_WRITE;
-            } else if ((rw == 1) && !matching->d) {
+            } else if ((rw == MMU_DATA_STORE) && !matching->d) {
                 n = MMU_DTLB_INITIAL_WRITE;
             } else {
                 *prot = PAGE_READ;
@@ -384,7 +384,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
                 }
             }
         } else if (n == MMU_DTLB_MISS) {
-            n = (rw == 1)
+            n = (rw == MMU_DATA_STORE)
                 ? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ;
         }
     }
@@ -406,9 +406,9 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
                 && (address < 0xe0000000 || address >= 0xe4000000)) {
             /* Unauthorized access in user mode (only store queues are available) */
             qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n");
-            if (rw == 0) {
+            if (rw == MMU_DATA_LOAD) {
                 return MMU_DADDR_ERROR_READ;
-            } else if (rw == 1) {
+            } else if (rw == MMU_DATA_STORE) {
                 return MMU_DADDR_ERROR_WRITE;
             } else {
                 return MMU_IADDR_ERROR;
@@ -441,7 +441,7 @@ hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
     target_ulong physical;
     int prot;
 
-    get_physical_address(&cpu->env, &physical, &prot, addr, 0, 0);
+    get_physical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD, 0);
     return physical;
 }
 
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 03/14] target/sh4: Remove unused 'int access_type' argument
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 01/14] target/sh4: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 02/14] target/sh4: Replace magic value by MMUAccessType definitions Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 04/14] target/sh4: Let get_physical_address() use MMUAccessType access_type Philippe Mathieu-Daudé
                   ` (11 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Richard Henderson, Magnus Damm, Philippe Mathieu-Daudé,
	Yoshinori Sato

get_mmu_address() and get_physical_address() don't use their
'int access_type' argument: remove it along with ACCESS_INT
in superh_cpu_tlb_fill().

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/sh4/helper.c | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 4303ebf018b..b49efe84916 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -331,7 +331,7 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid
 */
 static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
                            int *prot, target_ulong address,
-                           int rw, int access_type)
+                           int rw)
 {
     int use_asid, n;
     tlb_t *matching = NULL;
@@ -398,7 +398,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
 
 static int get_physical_address(CPUSH4State * env, target_ulong * physical,
                                 int *prot, target_ulong address,
-                                int rw, int access_type)
+                                int rw)
 {
     /* P1, P2 and P4 areas do not use translation */
     if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) {
@@ -432,7 +432,7 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
     }
 
     /* We need to resort to the MMU */
-    return get_mmu_address(env, physical, prot, address, rw, access_type);
+    return get_mmu_address(env, physical, prot, address, rw);
 }
 
 hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
@@ -441,7 +441,8 @@ hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
     target_ulong physical;
     int prot;
 
-    get_physical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD, 0);
+    get_physical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD);
+
     return physical;
 }
 
@@ -813,11 +814,9 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
            MMU_DTLB_VIOLATION_READ);
 #else
     target_ulong physical;
-    int prot, sh_access_type;
+    int prot;
 
-    sh_access_type = ACCESS_INT;
-    ret = get_physical_address(env, &physical, &prot, address,
-                               access_type, sh_access_type);
+    ret = get_physical_address(env, &physical, &prot, address, access_type);
 
     if (ret == MMU_OK) {
         address &= TARGET_PAGE_MASK;
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 04/14] target/sh4: Let get_physical_address() use MMUAccessType access_type
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (2 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 03/14] target/sh4: Remove unused 'int access_type' argument Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 05/14] target/sh4: Remove unused definitions Philippe Mathieu-Daudé
                   ` (10 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Richard Henderson, Magnus Damm, Philippe Mathieu-Daudé,
	Yoshinori Sato

superh_cpu_tlb_fill() already provides a access_type variable of
type MMUAccessType, and it is passed along, but casted as integer
and renamed 'rw'.
Simply replace 'int rw' by 'MMUAccessType access_type'.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210127232151.3523581-5-f4bug@amsat.org>
---
 target/sh4/helper.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index b49efe84916..bd8e034f174 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -331,14 +331,14 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid
 */
 static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
                            int *prot, target_ulong address,
-                           int rw)
+                           MMUAccessType access_type)
 {
     int use_asid, n;
     tlb_t *matching = NULL;
 
     use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD));
 
-    if (rw == MMU_INST_FETCH) {
+    if (access_type == MMU_INST_FETCH) {
         n = find_itlb_entry(env, address, use_asid);
         if (n >= 0) {
             matching = &env->itlb[n];
@@ -371,11 +371,11 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
         if (n >= 0) {
             matching = &env->utlb[n];
             if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
-                n = (rw == MMU_DATA_STORE)
+                n = (access_type == MMU_DATA_STORE)
                     ? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ;
-            } else if ((rw == MMU_DATA_STORE) && !(matching->pr & 1)) {
+            } else if ((access_type == MMU_DATA_STORE) && !(matching->pr & 1)) {
                 n = MMU_DTLB_VIOLATION_WRITE;
-            } else if ((rw == MMU_DATA_STORE) && !matching->d) {
+            } else if ((access_type == MMU_DATA_STORE) && !matching->d) {
                 n = MMU_DTLB_INITIAL_WRITE;
             } else {
                 *prot = PAGE_READ;
@@ -384,7 +384,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
                 }
             }
         } else if (n == MMU_DTLB_MISS) {
-            n = (rw == MMU_DATA_STORE)
+            n = (access_type == MMU_DATA_STORE)
                 ? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ;
         }
     }
@@ -398,7 +398,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
 
 static int get_physical_address(CPUSH4State * env, target_ulong * physical,
                                 int *prot, target_ulong address,
-                                int rw)
+                                MMUAccessType access_type)
 {
     /* P1, P2 and P4 areas do not use translation */
     if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) {
@@ -406,9 +406,9 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
                 && (address < 0xe0000000 || address >= 0xe4000000)) {
             /* Unauthorized access in user mode (only store queues are available) */
             qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n");
-            if (rw == MMU_DATA_LOAD) {
+            if (access_type == MMU_DATA_LOAD) {
                 return MMU_DADDR_ERROR_READ;
-            } else if (rw == MMU_DATA_STORE) {
+            } else if (access_type == MMU_DATA_STORE) {
                 return MMU_DADDR_ERROR_WRITE;
             } else {
                 return MMU_IADDR_ERROR;
@@ -432,7 +432,7 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
     }
 
     /* We need to resort to the MMU */
-    return get_mmu_address(env, physical, prot, address, rw);
+    return get_mmu_address(env, physical, prot, address, access_type);
 }
 
 hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 05/14] target/sh4: Remove unused definitions
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (3 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 04/14] target/sh4: Let get_physical_address() use MMUAccessType access_type Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 06/14] hw/sh4: Add missing license Philippe Mathieu-Daudé
                   ` (9 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Richard Henderson, Magnus Damm, Philippe Mathieu-Daudé,
	Yoshinori Sato

Remove these confusing and unused definitions.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210127232151.3523581-6-f4bug@amsat.org>
---
 target/sh4/cpu.h | 11 -----------
 1 file changed, 11 deletions(-)

diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 714e3b56413..01c43440822 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -271,17 +271,6 @@ typedef SuperHCPU ArchCPU;
 
 #include "exec/cpu-all.h"
 
-/* Memory access type */
-enum {
-    /* Privilege */
-    ACCESS_PRIV = 0x01,
-    /* Direction */
-    ACCESS_WRITE = 0x02,
-    /* Type of instruction */
-    ACCESS_CODE = 0x10,
-    ACCESS_INT = 0x20
-};
-
 /* MMU control register */
 #define MMUCR    0x1F000010
 #define MMUCR_AT (1<<0)
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 06/14] hw/sh4: Add missing license
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (4 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 05/14] target/sh4: Remove unused definitions Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 07/14] hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board Philippe Mathieu-Daudé
                   ` (8 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Kevin Wolf, open list:Block layer core, Yoshinori Sato,
	Magnus Damm, Richard Henderson, Philippe Mathieu-Daudé,
	Max Reitz, Samuel Tardieu, Paolo Bonzini

This code was introduced in commit 27c7ca7e775,
("SHIX board emulation (Samuel Tardieu)"). Use
the same license.

Cc: Samuel Tardieu <sam@rfc1149.net>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210222141514.2646278-2-f4bug@amsat.org>
---
 include/hw/sh4/sh.h | 31 ++++++++++++++++++++++++++++---
 hw/block/tc58128.c  | 26 ++++++++++++++++++++++++++
 2 files changed, 54 insertions(+), 3 deletions(-)

diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h
index 93f464bf4cd..becb5969790 100644
--- a/include/hw/sh4/sh.h
+++ b/include/hw/sh4/sh.h
@@ -1,6 +1,31 @@
-#ifndef QEMU_SH_H
-#define QEMU_SH_H
-/* Definitions for SH board emulation.  */
+/*
+ * Definitions for SH board emulation
+ *
+ * Copyright (c) 2005 Samuel Tardieu
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+#ifndef QEMU_HW_SH_H
+#define QEMU_HW_SH_H
 
 #include "hw/sh4/sh_intc.h"
 #include "target/sh4/cpu-qom.h"
diff --git a/hw/block/tc58128.c b/hw/block/tc58128.c
index 9888f01ac60..bfc27ad8993 100644
--- a/hw/block/tc58128.c
+++ b/hw/block/tc58128.c
@@ -1,3 +1,29 @@
+/*
+ * TC58128 NAND EEPROM emulation
+ *
+ * Copyright (c) 2005 Samuel Tardieu
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * SPDX-License-Identifier: MIT
+ */
 #include "qemu/osdep.h"
 #include "qemu/units.h"
 #include "hw/sh4/sh.h"
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 07/14] hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (5 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 06/14] hw/sh4: Add missing license Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 08/14] hw/intc: Introduce SH_INTC Kconfig entry Philippe Mathieu-Daudé
                   ` (7 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Yoshinori Sato, Magnus Damm, Richard Henderson,
	Philippe Mathieu-Daudé,
	Paolo Bonzini

r2d_init() calls sh7750_init() so depends on SH7750.Harmless
at the moment because nothing actually uses CONFIG_SH7750
(hw/sh4/meson.build always compiles sh7750.c and sh7750_regnames.c
unconditionally).

Fixes: 7ab58d4c841 ("sh4-softmmu.mak: express dependencies with Kconfig")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210222141514.2646278-3-f4bug@amsat.org>
---
 hw/sh4/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig
index 4cbce3a0ed5..0452b4624ae 100644
--- a/hw/sh4/Kconfig
+++ b/hw/sh4/Kconfig
@@ -10,6 +10,7 @@ config R2D
     select PCI
     select SM501
     select SH4
+    select SH7750
 
 config SHIX
     bool
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 08/14] hw/intc: Introduce SH_INTC Kconfig entry
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (6 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 07/14] hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 09/14] hw/char: Introduce SH_SCI " Philippe Mathieu-Daudé
                   ` (6 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Yoshinori Sato, Magnus Damm, Richard Henderson,
	Philippe Mathieu-Daudé,
	Paolo Bonzini

We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_INTC selector for the SH4 interrupt controller.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210222141514.2646278-4-f4bug@amsat.org>
---
 hw/intc/Kconfig     | 3 +++
 hw/intc/meson.build | 2 +-
 hw/sh4/Kconfig      | 1 +
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index c18d11142a8..66bf0b90b47 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -53,6 +53,9 @@ config OMPIC
 config PPC_UIC
     bool
 
+config SH_INTC
+    bool
+
 config RX_ICU
     bool
 
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index 53cba115690..b3d9345a0d2 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -47,7 +47,7 @@
 specific_ss.add(when: 'CONFIG_RX_ICU', if_true: files('rx_icu.c'))
 specific_ss.add(when: 'CONFIG_S390_FLIC', if_true: files('s390_flic.c'))
 specific_ss.add(when: 'CONFIG_S390_FLIC_KVM', if_true: files('s390_flic_kvm.c'))
-specific_ss.add(when: 'CONFIG_SH4', if_true: files('sh_intc.c'))
+specific_ss.add(when: 'CONFIG_SH_INTC', if_true: files('sh_intc.c'))
 specific_ss.add(when: 'CONFIG_SIFIVE_CLINT', if_true: files('sifive_clint.c'))
 specific_ss.add(when: 'CONFIG_SIFIVE_PLIC', if_true: files('sifive_plic.c'))
 specific_ss.add(when: 'CONFIG_XICS', if_true: files('xics.c'))
diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig
index 0452b4624ae..c2008c6a0d2 100644
--- a/hw/sh4/Kconfig
+++ b/hw/sh4/Kconfig
@@ -19,6 +19,7 @@ config SHIX
 
 config SH7750
     bool
+    select SH_INTC
 
 config SH4
     bool
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 09/14] hw/char: Introduce SH_SCI Kconfig entry
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (7 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 08/14] hw/intc: Introduce SH_INTC Kconfig entry Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 10/14] hw/timer: Introduce SH_TIMER " Philippe Mathieu-Daudé
                   ` (5 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Yoshinori Sato, Magnus Damm, Richard Henderson,
	Philippe Mathieu-Daudé,
	Marc-André Lureau, Paolo Bonzini

We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_SCI selector for the SH4 serial controller.

Add the missing MAINTAINERS entries.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210222141514.2646278-5-f4bug@amsat.org>
---
 MAINTAINERS         | 2 ++
 hw/char/Kconfig     | 3 +++
 hw/char/meson.build | 2 +-
 hw/sh4/Kconfig      | 1 +
 4 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 26c9454823a..8405741e910 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1397,6 +1397,7 @@ R2D
 M: Yoshinori Sato <ysato@users.sourceforge.jp>
 R: Magnus Damm <magnus.damm@gmail.com>
 S: Odd Fixes
+F: hw/char/sh_serial.c
 F: hw/sh4/r2d.c
 F: hw/intc/sh_intc.c
 F: include/hw/sh4/sh_intc.h
@@ -1405,6 +1406,7 @@ Shix
 M: Yoshinori Sato <ysato@users.sourceforge.jp>
 R: Magnus Damm <magnus.damm@gmail.com>
 S: Odd Fixes
+F: hw/char/sh_serial.c
 F: hw/sh4/shix.c
 F: hw/intc/sh_intc.c
 F: include/hw/sh4/sh_intc.h
diff --git a/hw/char/Kconfig b/hw/char/Kconfig
index 939bc447588..f6f4fffd1b7 100644
--- a/hw/char/Kconfig
+++ b/hw/char/Kconfig
@@ -50,6 +50,9 @@ config SCLPCONSOLE
 config TERMINAL3270
     bool
 
+config SH_SCI
+    bool
+
 config RENESAS_SCI
     bool
 
diff --git a/hw/char/meson.build b/hw/char/meson.build
index 196ac91fa29..afe9a0af88c 100644
--- a/hw/char/meson.build
+++ b/hw/char/meson.build
@@ -31,7 +31,7 @@
 softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_aux.c'))
 softmmu_ss.add(when: 'CONFIG_RENESAS_SCI', if_true: files('renesas_sci.c'))
 softmmu_ss.add(when: 'CONFIG_SIFIVE_UART', if_true: files('sifive_uart.c'))
-softmmu_ss.add(when: 'CONFIG_SH4', if_true: files('sh_serial.c'))
+softmmu_ss.add(when: 'CONFIG_SH_SCI', if_true: files('sh_serial.c'))
 softmmu_ss.add(when: 'CONFIG_STM32F2XX_USART', if_true: files('stm32f2xx_usart.c'))
 softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_MMUART', if_true: files('mchp_pfsoc_mmuart.c'))
 
diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig
index c2008c6a0d2..47240aa97b7 100644
--- a/hw/sh4/Kconfig
+++ b/hw/sh4/Kconfig
@@ -20,6 +20,7 @@ config SHIX
 config SH7750
     bool
     select SH_INTC
+    select SH_SCI
 
 config SH4
     bool
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 10/14] hw/timer: Introduce SH_TIMER Kconfig entry
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (8 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 09/14] hw/char: Introduce SH_SCI " Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 11/14] hw/block: Introduce TC58128 eeprom " Philippe Mathieu-Daudé
                   ` (4 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Yoshinori Sato, Magnus Damm, Richard Henderson,
	Philippe Mathieu-Daudé,
	Paolo Bonzini

We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_TIMER selector for the SH4 timer control unit.

Add the missing MAINTAINERS entries.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210222141514.2646278-6-f4bug@amsat.org>
---
 MAINTAINERS          | 2 ++
 hw/sh4/Kconfig       | 2 +-
 hw/timer/Kconfig     | 4 ++++
 hw/timer/meson.build | 2 +-
 4 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 8405741e910..4a722c44b1b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1400,6 +1400,7 @@ S: Odd Fixes
 F: hw/char/sh_serial.c
 F: hw/sh4/r2d.c
 F: hw/intc/sh_intc.c
+F: hw/timer/sh_timer.c
 F: include/hw/sh4/sh_intc.h
 
 Shix
@@ -1409,6 +1410,7 @@ S: Odd Fixes
 F: hw/char/sh_serial.c
 F: hw/sh4/shix.c
 F: hw/intc/sh_intc.c
+F: hw/timer/sh_timer.c
 F: include/hw/sh4/sh_intc.h
 
 SPARC Machines
diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig
index 47240aa97b7..e569470a614 100644
--- a/hw/sh4/Kconfig
+++ b/hw/sh4/Kconfig
@@ -21,7 +21,7 @@ config SH7750
     bool
     select SH_INTC
     select SH_SCI
+    select SH_TIMER
 
 config SH4
     bool
-    select PTIMER
diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig
index 8749edfb6a5..18936ef55bf 100644
--- a/hw/timer/Kconfig
+++ b/hw/timer/Kconfig
@@ -36,6 +36,10 @@ config CMSDK_APB_DUALTIMER
     bool
     select PTIMER
 
+config SH_TIMER
+    bool
+    select PTIMER
+
 config RENESAS_TMR
     bool
 
diff --git a/hw/timer/meson.build b/hw/timer/meson.build
index be343f68fed..26c2701fd78 100644
--- a/hw/timer/meson.build
+++ b/hw/timer/meson.build
@@ -30,7 +30,7 @@
 softmmu_ss.add(when: 'CONFIG_PUV3', if_true: files('puv3_ost.c'))
 softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_timer.c'))
 softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_systmr.c'))
-softmmu_ss.add(when: 'CONFIG_SH4', if_true: files('sh_timer.c'))
+softmmu_ss.add(when: 'CONFIG_SH_TIMER', if_true: files('sh_timer.c'))
 softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_timer.c'))
 softmmu_ss.add(when: 'CONFIG_STM32F2XX_TIMER', if_true: files('stm32f2xx_timer.c'))
 softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_timer.c'))
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 11/14] hw/block: Introduce TC58128 eeprom Kconfig entry
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (9 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 10/14] hw/timer: Introduce SH_TIMER " Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 12/14] hw/pci-host: Introduce SH_PCI " Philippe Mathieu-Daudé
                   ` (3 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Kevin Wolf, Peter Maydell, open list:Block layer core,
	Yoshinori Sato, Magnus Damm, Richard Henderson,
	Philippe Mathieu-Daudé,
	Max Reitz, Paolo Bonzini

Add more fine-grained selection by adding a CONFIG_TC58128
selector for the TC58128 eeprom.

As this device is only used by the Shix machine, add an entry
to the proper section in MAINTAINERS.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210222141514.2646278-7-f4bug@amsat.org>
---
 MAINTAINERS          | 1 +
 hw/block/Kconfig     | 3 +++
 hw/block/meson.build | 2 +-
 hw/sh4/Kconfig       | 1 +
 4 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4a722c44b1b..109890af5e0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1407,6 +1407,7 @@ Shix
 M: Yoshinori Sato <ysato@users.sourceforge.jp>
 R: Magnus Damm <magnus.damm@gmail.com>
 S: Odd Fixes
+F: hw/block/tc58128.c
 F: hw/char/sh_serial.c
 F: hw/sh4/shix.c
 F: hw/intc/sh_intc.c
diff --git a/hw/block/Kconfig b/hw/block/Kconfig
index 2d17f481adc..4fcd1521668 100644
--- a/hw/block/Kconfig
+++ b/hw/block/Kconfig
@@ -22,6 +22,9 @@ config ECC
 config ONENAND
     bool
 
+config TC58128
+    bool
+
 config NVME_PCI
     bool
     default y if PCI_DEVICES
diff --git a/hw/block/meson.build b/hw/block/meson.build
index 602ca6c8541..4bf994c64ff 100644
--- a/hw/block/meson.build
+++ b/hw/block/meson.build
@@ -12,7 +12,7 @@
 softmmu_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80.c'))
 softmmu_ss.add(when: 'CONFIG_SWIM', if_true: files('swim.c'))
 softmmu_ss.add(when: 'CONFIG_XEN', if_true: files('xen-block.c'))
-softmmu_ss.add(when: 'CONFIG_SH4', if_true: files('tc58128.c'))
+softmmu_ss.add(when: 'CONFIG_TC58128', if_true: files('tc58128.c'))
 softmmu_ss.add(when: 'CONFIG_NVME_PCI', if_true: files('nvme.c', 'nvme-ns.c'))
 
 specific_ss.add(when: 'CONFIG_VIRTIO_BLK', if_true: files('virtio-blk.c'))
diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig
index e569470a614..34c01dadde9 100644
--- a/hw/sh4/Kconfig
+++ b/hw/sh4/Kconfig
@@ -16,6 +16,7 @@ config SHIX
     bool
     select SH7750
     select SH4
+    select TC58128
 
 config SH7750
     bool
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 12/14] hw/pci-host: Introduce SH_PCI Kconfig entry
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (10 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 11/14] hw/block: Introduce TC58128 eeprom " Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 13/14] hw/sh4: Remove now unused CONFIG_SH4 from Kconfig Philippe Mathieu-Daudé
                   ` (2 subsequent siblings)
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Yoshinori Sato, Magnus Damm, Richard Henderson,
	Philippe Mathieu-Daudé,
	Paolo Bonzini

We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_PCI selector for the SH4 PCI controller.
Move the file with the other PCI host devices in hw/pci-host
and add its missing MAINTAINERS entries.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210222141514.2646278-8-f4bug@amsat.org>
---
 hw/{sh4 => pci-host}/sh_pci.c | 0
 MAINTAINERS                   | 1 +
 hw/pci-host/Kconfig           | 4 ++++
 hw/pci-host/meson.build       | 1 +
 hw/sh4/Kconfig                | 1 +
 hw/sh4/meson.build            | 1 -
 6 files changed, 7 insertions(+), 1 deletion(-)
 rename hw/{sh4 => pci-host}/sh_pci.c (100%)

diff --git a/hw/sh4/sh_pci.c b/hw/pci-host/sh_pci.c
similarity index 100%
rename from hw/sh4/sh_pci.c
rename to hw/pci-host/sh_pci.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 109890af5e0..f22d83c1782 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1400,6 +1400,7 @@ S: Odd Fixes
 F: hw/char/sh_serial.c
 F: hw/sh4/r2d.c
 F: hw/intc/sh_intc.c
+F: hw/pci-host/sh_pci.c
 F: hw/timer/sh_timer.c
 F: include/hw/sh4/sh_intc.h
 
diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
index 8b8c763c28c..2ccc96f02ce 100644
--- a/hw/pci-host/Kconfig
+++ b/hw/pci-host/Kconfig
@@ -68,3 +68,7 @@ config PCI_POWERNV
 
 config REMOTE_PCIHOST
     bool
+
+config SH_PCI
+    bool
+    select PCI
diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build
index 1847c69905c..87a896973e7 100644
--- a/hw/pci-host/meson.build
+++ b/hw/pci-host/meson.build
@@ -10,6 +10,7 @@
 pci_ss.add(when: 'CONFIG_PCI_SABRE', if_true: files('sabre.c'))
 pci_ss.add(when: 'CONFIG_XEN_IGD_PASSTHROUGH', if_true: files('xen_igd_pt.c'))
 pci_ss.add(when: 'CONFIG_REMOTE_PCIHOST', if_true: files('remote.c'))
+pci_ss.add(when: 'CONFIG_SH_PCI', if_true: files('sh_pci.c'))
 
 # PPC devices
 pci_ss.add(when: 'CONFIG_PREP_PCI', if_true: files('prep.c'))
diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig
index 34c01dadde9..b9f0538d57f 100644
--- a/hw/sh4/Kconfig
+++ b/hw/sh4/Kconfig
@@ -11,6 +11,7 @@ config R2D
     select SM501
     select SH4
     select SH7750
+    select SH_PCI
 
 config SHIX
     bool
diff --git a/hw/sh4/meson.build b/hw/sh4/meson.build
index 303c0f42879..424d5674dea 100644
--- a/hw/sh4/meson.build
+++ b/hw/sh4/meson.build
@@ -2,7 +2,6 @@
 sh4_ss.add(files(
   'sh7750.c',
   'sh7750_regnames.c',
-  'sh_pci.c'
 ))
 sh4_ss.add(when: 'CONFIG_R2D', if_true: files('r2d.c'))
 sh4_ss.add(when: 'CONFIG_SHIX', if_true: files('shix.c'))
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 13/14] hw/sh4: Remove now unused CONFIG_SH4 from Kconfig
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (11 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 12/14] hw/pci-host: Introduce SH_PCI " Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-06 15:36 ` [PULL 14/14] hw/sh4/sh7750_regs: Replace link to license by its full content Philippe Mathieu-Daudé
  2021-03-08 20:07 ` [PULL 00/14] Renesas patches for 2021-03-06 Peter Maydell
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Yoshinori Sato, Magnus Damm, Richard Henderson,
	Philippe Mathieu-Daudé,
	Paolo Bonzini

As replaced the generic CONFIG_SH4 by more fine-grained
selectors, we can remove this now unused config variable.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210222141514.2646278-9-f4bug@amsat.org>
---
 hw/sh4/Kconfig | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig
index b9f0538d57f..ab733a3f760 100644
--- a/hw/sh4/Kconfig
+++ b/hw/sh4/Kconfig
@@ -9,14 +9,12 @@ config R2D
     select USB_OHCI_PCI
     select PCI
     select SM501
-    select SH4
     select SH7750
     select SH_PCI
 
 config SHIX
     bool
     select SH7750
-    select SH4
     select TC58128
 
 config SH7750
@@ -24,6 +22,3 @@ config SH7750
     select SH_INTC
     select SH_SCI
     select SH_TIMER
-
-config SH4
-    bool
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PULL 14/14] hw/sh4/sh7750_regs: Replace link to license by its full content
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (12 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 13/14] hw/sh4: Remove now unused CONFIG_SH4 from Kconfig Philippe Mathieu-Daudé
@ 2021-03-06 15:36 ` Philippe Mathieu-Daudé
  2021-03-08 20:07 ` [PULL 00/14] Renesas patches for 2021-03-06 Peter Maydell
  14 siblings, 0 replies; 16+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-06 15:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Magnus Damm, Philippe Mathieu-Daudé, Yoshinori Sato

This file is borrowed from the RTEMS source code, which comes
with a GPL-2.0-or-later license with a header exception.

Expand the GPL-2.0-or-later license in place to not be dependent
on a 3rd party website. This also fix the misleading comment "The
license and distribution terms for this file may be found in the
file LICENSE in this distribution" referring to the RTEMS distribution
and not to the QEMU one.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210222185605.2714192-1-f4bug@amsat.org>
---
 hw/sh4/sh7750_regs.h | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/hw/sh4/sh7750_regs.h b/hw/sh4/sh7750_regs.h
index 3e4554af315..ab073dadc74 100644
--- a/hw/sh4/sh7750_regs.h
+++ b/hw/sh4/sh7750_regs.h
@@ -10,8 +10,28 @@
  *         Victor V. Vengerov <vvv@oktet.ru>
  *
  * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
+ * found in this file hereafter or at http://www.rtems.com/license/LICENSE.
+ *
+ *                       LICENSE INFORMATION
+ *
+ * RTEMS is free software; you can redistribute it and/or modify it under
+ * terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.  RTEMS is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details. You should have received
+ * a copy of the GNU General Public License along with RTEMS; see
+ * file COPYING. If not, write to the Free Software Foundation, 675
+ * Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * As a special exception, including RTEMS header files in a file,
+ * instantiating RTEMS generics or templates, or linking other files
+ * with RTEMS objects to produce an executable application, does not
+ * by itself cause the resulting executable application to be covered
+ * by the GNU General Public License. This exception does not
+ * however invalidate any other reasons why the executable file might be
+ * covered by the GNU Public License.
  *
  * @(#) sh7750_regs.h,v 1.2.4.1 2003/09/04 18:46:00 joel Exp
  */
-- 
2.26.2



^ permalink raw reply related	[flat|nested] 16+ messages in thread

* Re: [PULL 00/14] Renesas patches for 2021-03-06
  2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
                   ` (13 preceding siblings ...)
  2021-03-06 15:36 ` [PULL 14/14] hw/sh4/sh7750_regs: Replace link to license by its full content Philippe Mathieu-Daudé
@ 2021-03-08 20:07 ` Peter Maydell
  14 siblings, 0 replies; 16+ messages in thread
From: Peter Maydell @ 2021-03-08 20:07 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé; +Cc: Magnus Damm, QEMU Developers, Yoshinori Sato

On Sat, 6 Mar 2021 at 15:38, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Hi Peter,
>
> As SH-4 is not very active, I'm here covering up with this trivial patch queue.
>
> The following changes since commit 91e92cad67caca3bc4b8e920ddb5c8ca64aac9e1:
>
>   Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210305' into staging (2021-03-05 19:04:47 +0000)
>
> are available in the Git repository at:
>
>   https://gitlab.com/philmd/qemu.git tags/renesas-20210306
>
> for you to fetch changes up to ef95ca038295bdf6749cbce426b281c21a08971e:
>
>   hw/sh4/sh7750_regs: Replace link to license by its full content (2021-03-06 16:19:03 +0100)
>
> ----------------------------------------------------------------
> Renesas patches queue
>
> - MMU prototype cleanups
> - Clarify licenses
> - Fine-grained Kconfig entries for SH-4 devices


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.0
for any user-visible changes.

-- PMM


^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2021-03-08 20:09 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-06 15:36 [PULL 00/14] Renesas patches for 2021-03-06 Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 01/14] target/sh4: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 02/14] target/sh4: Replace magic value by MMUAccessType definitions Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 03/14] target/sh4: Remove unused 'int access_type' argument Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 04/14] target/sh4: Let get_physical_address() use MMUAccessType access_type Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 05/14] target/sh4: Remove unused definitions Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 06/14] hw/sh4: Add missing license Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 07/14] hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 08/14] hw/intc: Introduce SH_INTC Kconfig entry Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 09/14] hw/char: Introduce SH_SCI " Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 10/14] hw/timer: Introduce SH_TIMER " Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 11/14] hw/block: Introduce TC58128 eeprom " Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 12/14] hw/pci-host: Introduce SH_PCI " Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 13/14] hw/sh4: Remove now unused CONFIG_SH4 from Kconfig Philippe Mathieu-Daudé
2021-03-06 15:36 ` [PULL 14/14] hw/sh4/sh7750_regs: Replace link to license by its full content Philippe Mathieu-Daudé
2021-03-08 20:07 ` [PULL 00/14] Renesas patches for 2021-03-06 Peter Maydell

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