* [PATCH 0/2] enable flexspi support on imx8mp
@ 2021-03-08 6:40 ` Heiko Schocher
0 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-08 6:40 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Heiko Schocher, Alice Guo, Anson Huang, Dong Aisheng,
Fabio Estevam, Horia Geantă,
Jacky Bai, Joakim Zhang, Krzysztof Kozlowski, Li Jun,
NXP Linux Team, Peng Fan, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, Shawn Guo, Teresa Remmet, devicetree, linux-kernel
This series enables support for the SPI NOR on the
imx8mp based phyboard-pollux-rdk board.
Heiko Schocher (2):
arm64: dts: imx8mp: add flexspi node
arm64: imx8mp: imx8mp-phycore-som enable spi nor
.../dts/freescale/imx8mp-phycore-som.dtsi | 27 +++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 +++++++++++
2 files changed, 43 insertions(+)
--
2.29.2
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 0/2] enable flexspi support on imx8mp
@ 2021-03-08 6:40 ` Heiko Schocher
0 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-08 6:40 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Heiko Schocher, Alice Guo, Anson Huang, Dong Aisheng,
Fabio Estevam, Horia Geantă,
Jacky Bai, Joakim Zhang, Krzysztof Kozlowski, Li Jun,
NXP Linux Team, Peng Fan, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, Shawn Guo, Teresa Remmet, devicetree, linux-kernel
This series enables support for the SPI NOR on the
imx8mp based phyboard-pollux-rdk board.
Heiko Schocher (2):
arm64: dts: imx8mp: add flexspi node
arm64: imx8mp: imx8mp-phycore-som enable spi nor
.../dts/freescale/imx8mp-phycore-som.dtsi | 27 +++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 +++++++++++
2 files changed, 43 insertions(+)
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] arm64: dts: imx8mp: add flexspi node
2021-03-08 6:40 ` Heiko Schocher
@ 2021-03-08 6:40 ` Heiko Schocher
-1 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-08 6:40 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Heiko Schocher, Alice Guo, Anson Huang, Dong Aisheng,
Fabio Estevam, Horia Geantă,
Jacky Bai, Joakim Zhang, Krzysztof Kozlowski, Li Jun,
NXP Linux Team, Peng Fan, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, Shawn Guo, Teresa Remmet, devicetree, linux-kernel
add node for the flexspi modul on imx8mp.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index c7523fd4eae9b..086cfbbef43d7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -36,6 +36,7 @@ aliases {
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
+ spi0 = &flexspi;
};
cpus {
@@ -744,6 +745,21 @@ usdhc3: mmc@30b60000 {
status = "disabled";
};
+ flexspi: spi@30bb0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imx8mm-fspi";
+ reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>;
+ reg-names = "fspi_base", "fspi_mmap";
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_QSPI_ROOT>,
+ <&clk IMX8MP_CLK_QSPI_ROOT>;
+ clock-names = "fspi", "fspi_en";
+ assigned-clock-rates = <80000000>;
+ assigned-clocks = <&clk IMX8MP_CLK_QSPI>;
+ status = "disabled";
+ };
+
sdma1: dma-controller@30bd0000 {
compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma";
reg = <0x30bd0000 0x10000>;
--
2.29.2
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH 1/2] arm64: dts: imx8mp: add flexspi node
@ 2021-03-08 6:40 ` Heiko Schocher
0 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-08 6:40 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Heiko Schocher, Alice Guo, Anson Huang, Dong Aisheng,
Fabio Estevam, Horia Geantă,
Jacky Bai, Joakim Zhang, Krzysztof Kozlowski, Li Jun,
NXP Linux Team, Peng Fan, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, Shawn Guo, Teresa Remmet, devicetree, linux-kernel
add node for the flexspi modul on imx8mp.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index c7523fd4eae9b..086cfbbef43d7 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -36,6 +36,7 @@ aliases {
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
+ spi0 = &flexspi;
};
cpus {
@@ -744,6 +745,21 @@ usdhc3: mmc@30b60000 {
status = "disabled";
};
+ flexspi: spi@30bb0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imx8mm-fspi";
+ reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>;
+ reg-names = "fspi_base", "fspi_mmap";
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_QSPI_ROOT>,
+ <&clk IMX8MP_CLK_QSPI_ROOT>;
+ clock-names = "fspi", "fspi_en";
+ assigned-clock-rates = <80000000>;
+ assigned-clocks = <&clk IMX8MP_CLK_QSPI>;
+ status = "disabled";
+ };
+
sdma1: dma-controller@30bd0000 {
compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma";
reg = <0x30bd0000 0x10000>;
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH 1/2] arm64: dts: imx8mp: add flexspi node
2021-03-08 6:40 ` Heiko Schocher
@ 2021-03-08 8:33 ` Marco Felsch
-1 siblings, 0 replies; 22+ messages in thread
From: Marco Felsch @ 2021-03-08 8:33 UTC (permalink / raw)
To: Heiko Schocher
Cc: linux-arm-kernel, Dong Aisheng, devicetree, Peng Fan,
Anson Huang, Horia Geantă,
Alice Guo, Shawn Guo, Sascha Hauer, Joakim Zhang,
Krzysztof Kozlowski, Li Jun, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Teresa Remmet, Fabio Estevam,
linux-kernel, Jacky Bai
Hi Heiko,
On 21-03-08 07:40, Heiko Schocher wrote:
> add node for the flexspi modul on imx8mp.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
>
> ---
>
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index c7523fd4eae9b..086cfbbef43d7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -36,6 +36,7 @@ aliases {
> serial1 = &uart2;
> serial2 = &uart3;
> serial3 = &uart4;
> + spi0 = &flexspi;
> };
>
> cpus {
> @@ -744,6 +745,21 @@ usdhc3: mmc@30b60000 {
> status = "disabled";
> };
>
> + flexspi: spi@30bb0000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
This properties can moved to end just in front of the status property
which should be the last one.
> + compatible = "nxp,imx8mm-fspi";
Please add a own compatible "nxp,imx8mp-fspi" to the driver which should
be the first patch in your series.
Also the compatible is always the first property.
Regards,
Marco
> + reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>;
> + reg-names = "fspi_base", "fspi_mmap";
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MP_CLK_QSPI_ROOT>,
> + <&clk IMX8MP_CLK_QSPI_ROOT>;
> + clock-names = "fspi", "fspi_en";
> + assigned-clock-rates = <80000000>;
> + assigned-clocks = <&clk IMX8MP_CLK_QSPI>;
> + status = "disabled";
> + };
> +
> sdma1: dma-controller@30bd0000 {
> compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma";
> reg = <0x30bd0000 0x10000>;
> --
> 2.29.2
>
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 1/2] arm64: dts: imx8mp: add flexspi node
@ 2021-03-08 8:33 ` Marco Felsch
0 siblings, 0 replies; 22+ messages in thread
From: Marco Felsch @ 2021-03-08 8:33 UTC (permalink / raw)
To: Heiko Schocher
Cc: linux-arm-kernel, Dong Aisheng, devicetree, Peng Fan,
Anson Huang, Horia Geantă,
Alice Guo, Shawn Guo, Sascha Hauer, Joakim Zhang,
Krzysztof Kozlowski, Li Jun, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Teresa Remmet, Fabio Estevam,
linux-kernel, Jacky Bai
Hi Heiko,
On 21-03-08 07:40, Heiko Schocher wrote:
> add node for the flexspi modul on imx8mp.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
>
> ---
>
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index c7523fd4eae9b..086cfbbef43d7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -36,6 +36,7 @@ aliases {
> serial1 = &uart2;
> serial2 = &uart3;
> serial3 = &uart4;
> + spi0 = &flexspi;
> };
>
> cpus {
> @@ -744,6 +745,21 @@ usdhc3: mmc@30b60000 {
> status = "disabled";
> };
>
> + flexspi: spi@30bb0000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
This properties can moved to end just in front of the status property
which should be the last one.
> + compatible = "nxp,imx8mm-fspi";
Please add a own compatible "nxp,imx8mp-fspi" to the driver which should
be the first patch in your series.
Also the compatible is always the first property.
Regards,
Marco
> + reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>;
> + reg-names = "fspi_base", "fspi_mmap";
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MP_CLK_QSPI_ROOT>,
> + <&clk IMX8MP_CLK_QSPI_ROOT>;
> + clock-names = "fspi", "fspi_en";
> + assigned-clock-rates = <80000000>;
> + assigned-clocks = <&clk IMX8MP_CLK_QSPI>;
> + status = "disabled";
> + };
> +
> sdma1: dma-controller@30bd0000 {
> compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma";
> reg = <0x30bd0000 0x10000>;
> --
> 2.29.2
>
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
2021-03-08 6:40 ` Heiko Schocher
@ 2021-03-08 6:40 ` Heiko Schocher
-1 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-08 6:40 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Heiko Schocher, Fabio Estevam, Krzysztof Kozlowski,
NXP Linux Team, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, Shawn Guo, Teresa Remmet, devicetree, linux-kernel
enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
.../dts/freescale/imx8mp-phycore-som.dtsi | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
index 44a8c2337cee4..0284e7a5c6bba 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
@@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
};
};
+&flexspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi0>;
+ status = "okay";
+
+ flash0: mt25qu256aba@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <80000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
&i2c1 {
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11
>;
};
+ pinctrl_flexspi0: flexspi0grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
+ MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
+ MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
+ MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
+ MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
+ MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
+ >;
+ };
+
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
--
2.29.2
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
@ 2021-03-08 6:40 ` Heiko Schocher
0 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-08 6:40 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Heiko Schocher, Fabio Estevam, Krzysztof Kozlowski,
NXP Linux Team, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, Shawn Guo, Teresa Remmet, devicetree, linux-kernel
enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
.../dts/freescale/imx8mp-phycore-som.dtsi | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
index 44a8c2337cee4..0284e7a5c6bba 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
@@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
};
};
+&flexspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi0>;
+ status = "okay";
+
+ flash0: mt25qu256aba@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <80000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
&i2c1 {
clock-frequency = <400000>;
pinctrl-names = "default";
@@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11
>;
};
+ pinctrl_flexspi0: flexspi0grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
+ MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
+ MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
+ MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
+ MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
+ MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
+ >;
+ };
+
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
2021-03-08 6:40 ` Heiko Schocher
@ 2021-03-08 7:46 ` Teresa Remmet
-1 siblings, 0 replies; 22+ messages in thread
From: Teresa Remmet @ 2021-03-08 7:46 UTC (permalink / raw)
To: hs, linux-arm-kernel
Cc: krzk, linux-imx, kernel, festevam, devicetree, shawnguo,
linux-kernel, s.hauer, robh+dt
Hello Heiko,
first thanks for the patch :).
Am Montag, den 08.03.2021, 07:40 +0100 schrieb Heiko Schocher:
> enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> ---
>
> .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> +++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> index 44a8c2337cee4..0284e7a5c6bba 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> };
> };
>
> +&flexspi {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexspi0>;
> + status = "okay";
> +
> + flash0: mt25qu256aba@0 {
you can remove the label. As it is not used here right now.
Also rename the node name to device type like "flash" maybe.
I will try to test this soon.
Thanks,
Teresa
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + spi-max-frequency = <80000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> &i2c1 {
> clock-frequency = <400000>;
> pinctrl-names = "default";
> @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> 0x11
> >;
> };
>
> + pinctrl_flexspi0: flexspi0grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
> 0x1c2
> + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
> + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00
> 0x82
> + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01
> 0x82
> + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02
> 0x82
> + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03
> 0x82
> + >;
> + };
> +
> pinctrl_i2c1: i2c1grp {
> fsl,pins = <
> MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400
> 001c3
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
@ 2021-03-08 7:46 ` Teresa Remmet
0 siblings, 0 replies; 22+ messages in thread
From: Teresa Remmet @ 2021-03-08 7:46 UTC (permalink / raw)
To: hs, linux-arm-kernel
Cc: krzk, linux-imx, kernel, festevam, devicetree, shawnguo,
linux-kernel, s.hauer, robh+dt
Hello Heiko,
first thanks for the patch :).
Am Montag, den 08.03.2021, 07:40 +0100 schrieb Heiko Schocher:
> enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> ---
>
> .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> +++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> index 44a8c2337cee4..0284e7a5c6bba 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> };
> };
>
> +&flexspi {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexspi0>;
> + status = "okay";
> +
> + flash0: mt25qu256aba@0 {
you can remove the label. As it is not used here right now.
Also rename the node name to device type like "flash" maybe.
I will try to test this soon.
Thanks,
Teresa
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + spi-max-frequency = <80000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> &i2c1 {
> clock-frequency = <400000>;
> pinctrl-names = "default";
> @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> 0x11
> >;
> };
>
> + pinctrl_flexspi0: flexspi0grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
> 0x1c2
> + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
> + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00
> 0x82
> + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01
> 0x82
> + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02
> 0x82
> + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03
> 0x82
> + >;
> + };
> +
> pinctrl_i2c1: i2c1grp {
> fsl,pins = <
> MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400
> 001c3
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
2021-03-08 7:46 ` Teresa Remmet
@ 2021-03-08 8:03 ` Marco Felsch
-1 siblings, 0 replies; 22+ messages in thread
From: Marco Felsch @ 2021-03-08 8:03 UTC (permalink / raw)
To: Teresa Remmet
Cc: hs, linux-arm-kernel, devicetree, festevam, s.hauer,
linux-kernel, krzk, robh+dt, linux-imx, kernel, shawnguo
Hi Teresa, Heiko,
On 21-03-08 07:46, Teresa Remmet wrote:
> Hello Heiko,
>
> first thanks for the patch :).
>
> Am Montag, den 08.03.2021, 07:40 +0100 schrieb Heiko Schocher:
> > enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
> >
> > Signed-off-by: Heiko Schocher <hs@denx.de>
> > ---
> >
> > .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> > +++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > index 44a8c2337cee4..0284e7a5c6bba 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> > };
> > };
> >
> > +&flexspi {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_flexspi0>;
> > + status = "okay";
> > +
> > + flash0: mt25qu256aba@0 {
>
> you can remove the label. As it is not used here right now.
I would keep the label since most the time the bootloaders will fixup
the device tree because they adding a of-partition to it. It's mostly
just a matter of time.
> Also rename the node name to device type like "flash" maybe.
+1
I would name it 'som_flash: flash@0 { }'
Regards,
Marco
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
@ 2021-03-08 8:03 ` Marco Felsch
0 siblings, 0 replies; 22+ messages in thread
From: Marco Felsch @ 2021-03-08 8:03 UTC (permalink / raw)
To: Teresa Remmet
Cc: hs, linux-arm-kernel, devicetree, festevam, s.hauer,
linux-kernel, krzk, robh+dt, linux-imx, kernel, shawnguo
Hi Teresa, Heiko,
On 21-03-08 07:46, Teresa Remmet wrote:
> Hello Heiko,
>
> first thanks for the patch :).
>
> Am Montag, den 08.03.2021, 07:40 +0100 schrieb Heiko Schocher:
> > enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
> >
> > Signed-off-by: Heiko Schocher <hs@denx.de>
> > ---
> >
> > .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> > +++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > index 44a8c2337cee4..0284e7a5c6bba 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> > };
> > };
> >
> > +&flexspi {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_flexspi0>;
> > + status = "okay";
> > +
> > + flash0: mt25qu256aba@0 {
>
> you can remove the label. As it is not used here right now.
I would keep the label since most the time the bootloaders will fixup
the device tree because they adding a of-partition to it. It's mostly
just a matter of time.
> Also rename the node name to device type like "flash" maybe.
+1
I would name it 'som_flash: flash@0 { }'
Regards,
Marco
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
2021-03-08 6:40 ` Heiko Schocher
@ 2021-03-08 8:40 ` Marco Felsch
-1 siblings, 0 replies; 22+ messages in thread
From: Marco Felsch @ 2021-03-08 8:40 UTC (permalink / raw)
To: Heiko Schocher
Cc: linux-arm-kernel, devicetree, Shawn Guo, Sascha Hauer,
linux-kernel, Krzysztof Kozlowski, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Teresa Remmet, Fabio Estevam
On 21-03-08 07:40, Heiko Schocher wrote:
> enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> ---
>
> .../dts/freescale/imx8mp-phycore-som.dtsi | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> index 44a8c2337cee4..0284e7a5c6bba 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> };
> };
>
> +&flexspi {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexspi0>;
> + status = "okay";
> +
> + flash0: mt25qu256aba@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
Please make the compatible the first property followed by the reg
property. Also you don't need to add the #size-cells and #address-cells
now since you don't add a child node.
Regards,
Marco
> + spi-max-frequency = <80000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> &i2c1 {
> clock-frequency = <400000>;
> pinctrl-names = "default";
> @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11
> >;
> };
>
> + pinctrl_flexspi0: flexspi0grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
> + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
> + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
> + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
> + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
> + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
> + >;
> + };
> +
> pinctrl_i2c1: i2c1grp {
> fsl,pins = <
> MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
> --
> 2.29.2
>
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
@ 2021-03-08 8:40 ` Marco Felsch
0 siblings, 0 replies; 22+ messages in thread
From: Marco Felsch @ 2021-03-08 8:40 UTC (permalink / raw)
To: Heiko Schocher
Cc: linux-arm-kernel, devicetree, Shawn Guo, Sascha Hauer,
linux-kernel, Krzysztof Kozlowski, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Teresa Remmet, Fabio Estevam
On 21-03-08 07:40, Heiko Schocher wrote:
> enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
> ---
>
> .../dts/freescale/imx8mp-phycore-som.dtsi | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> index 44a8c2337cee4..0284e7a5c6bba 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> };
> };
>
> +&flexspi {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexspi0>;
> + status = "okay";
> +
> + flash0: mt25qu256aba@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
Please make the compatible the first property followed by the reg
property. Also you don't need to add the #size-cells and #address-cells
now since you don't add a child node.
Regards,
Marco
> + spi-max-frequency = <80000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> &i2c1 {
> clock-frequency = <400000>;
> pinctrl-names = "default";
> @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11
> >;
> };
>
> + pinctrl_flexspi0: flexspi0grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
> + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
> + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
> + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
> + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
> + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
> + >;
> + };
> +
> pinctrl_i2c1: i2c1grp {
> fsl,pins = <
> MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
> --
> 2.29.2
>
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
2021-03-08 8:40 ` Marco Felsch
@ 2021-03-08 8:52 ` Teresa Remmet
-1 siblings, 0 replies; 22+ messages in thread
From: Teresa Remmet @ 2021-03-08 8:52 UTC (permalink / raw)
To: hs, m.felsch
Cc: krzk, linux-imx, kernel, s.hauer, devicetree, linux-kernel,
shawnguo, linux-arm-kernel, festevam, robh+dt
Hello Marco,
Am Montag, den 08.03.2021, 09:40 +0100 schrieb Marco Felsch:
> On 21-03-08 07:40, Heiko Schocher wrote:
> > enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
> >
> > Signed-off-by: Heiko Schocher <hs@denx.de>
> > ---
> >
> > .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> > +++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > index 44a8c2337cee4..0284e7a5c6bba 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> > };
> > };
> >
> > +&flexspi {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_flexspi0>;
> > + status = "okay";
> > +
> > + flash0: mt25qu256aba@0 {
> > + reg = <0>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "jedec,spi-nor";
>
> Please make the compatible the first property followed by the reg
> property. Also you don't need to add the #size-cells and #address-
> cells
> now since you don't add a child node.
but is this not similar to the label here? If you add partitions in the
bootloader you need the cells properties?
Teresa
>
> Regards,
> Marco
>
> > + spi-max-frequency = <80000000>;
> > + spi-tx-bus-width = <4>;
> > + spi-rx-bus-width = <4>;
> > + };
> > +};
> > +
> > &i2c1 {
> > clock-frequency = <400000>;
> > pinctrl-names = "default";
> > @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> > 0x11
> > >;
> > };
> >
> > + pinctrl_flexspi0: flexspi0grp {
> > + fsl,pins = <
> > + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
> > 0x1c2
> > + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x8
> > 2
> > + >;
> > + };
> > +
> > pinctrl_i2c1: i2c1grp {
> > fsl,pins = <
> > MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x4
> > 00001c3
> > --
> > 2.29.2
> >
> >
> >
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
@ 2021-03-08 8:52 ` Teresa Remmet
0 siblings, 0 replies; 22+ messages in thread
From: Teresa Remmet @ 2021-03-08 8:52 UTC (permalink / raw)
To: hs, m.felsch
Cc: krzk, linux-imx, kernel, s.hauer, devicetree, linux-kernel,
shawnguo, linux-arm-kernel, festevam, robh+dt
Hello Marco,
Am Montag, den 08.03.2021, 09:40 +0100 schrieb Marco Felsch:
> On 21-03-08 07:40, Heiko Schocher wrote:
> > enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
> >
> > Signed-off-by: Heiko Schocher <hs@denx.de>
> > ---
> >
> > .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> > +++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > index 44a8c2337cee4..0284e7a5c6bba 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> > };
> > };
> >
> > +&flexspi {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_flexspi0>;
> > + status = "okay";
> > +
> > + flash0: mt25qu256aba@0 {
> > + reg = <0>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "jedec,spi-nor";
>
> Please make the compatible the first property followed by the reg
> property. Also you don't need to add the #size-cells and #address-
> cells
> now since you don't add a child node.
but is this not similar to the label here? If you add partitions in the
bootloader you need the cells properties?
Teresa
>
> Regards,
> Marco
>
> > + spi-max-frequency = <80000000>;
> > + spi-tx-bus-width = <4>;
> > + spi-rx-bus-width = <4>;
> > + };
> > +};
> > +
> > &i2c1 {
> > clock-frequency = <400000>;
> > pinctrl-names = "default";
> > @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> > 0x11
> > >;
> > };
> >
> > + pinctrl_flexspi0: flexspi0grp {
> > + fsl,pins = <
> > + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
> > 0x1c2
> > + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x8
> > 2
> > + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x8
> > 2
> > + >;
> > + };
> > +
> > pinctrl_i2c1: i2c1grp {
> > fsl,pins = <
> > MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x4
> > 00001c3
> > --
> > 2.29.2
> >
> >
> >
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
2021-03-08 8:52 ` Teresa Remmet
@ 2021-03-08 9:28 ` Marco Felsch
-1 siblings, 0 replies; 22+ messages in thread
From: Marco Felsch @ 2021-03-08 9:28 UTC (permalink / raw)
To: Teresa Remmet
Cc: hs, krzk, linux-imx, kernel, s.hauer, devicetree, linux-kernel,
shawnguo, linux-arm-kernel, festevam, robh+dt
On 21-03-08 08:52, Teresa Remmet wrote:
> Hello Marco,
>
> Am Montag, den 08.03.2021, 09:40 +0100 schrieb Marco Felsch:
> > On 21-03-08 07:40, Heiko Schocher wrote:
> > > enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
> > >
> > > Signed-off-by: Heiko Schocher <hs@denx.de>
> > > ---
> > >
> > > .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> > > +++++++++++++++++++
> > > 1 file changed, 27 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > > index 44a8c2337cee4..0284e7a5c6bba 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > > @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> > > };
> > > };
> > >
> > > +&flexspi {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_flexspi0>;
> > > + status = "okay";
> > > +
> > > + flash0: mt25qu256aba@0 {
> > > + reg = <0>;
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + compatible = "jedec,spi-nor";
> >
> > Please make the compatible the first property followed by the reg
> > property. Also you don't need to add the #size-cells and #address-
> > cells
> > now since you don't add a child node.
>
> but is this not similar to the label here? If you add partitions in the
> bootloader you need the cells properties?
If the bootloader will add partitions the bootloader can add the
size/address-cells too using the phandle. But this is more a nit.
Regards,
Marco
> Teresa
>
> >
> > Regards,
> > Marco
> >
> > > + spi-max-frequency = <80000000>;
> > > + spi-tx-bus-width = <4>;
> > > + spi-rx-bus-width = <4>;
> > > + };
> > > +};
> > > +
> > > &i2c1 {
> > > clock-frequency = <400000>;
> > > pinctrl-names = "default";
> > > @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> > > 0x11
> > > >;
> > > };
> > >
> > > + pinctrl_flexspi0: flexspi0grp {
> > > + fsl,pins = <
> > > + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
> > > 0x1c2
> > > + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x8
> > > 2
> > > + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x8
> > > 2
> > > + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x8
> > > 2
> > > + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x8
> > > 2
> > > + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x8
> > > 2
> > > + >;
> > > + };
> > > +
> > > pinctrl_i2c1: i2c1grp {
> > > fsl,pins = <
> > > MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x4
> > > 00001c3
> > > --
> > > 2.29.2
> > >
> > >
> > >
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
@ 2021-03-08 9:28 ` Marco Felsch
0 siblings, 0 replies; 22+ messages in thread
From: Marco Felsch @ 2021-03-08 9:28 UTC (permalink / raw)
To: Teresa Remmet
Cc: hs, krzk, linux-imx, kernel, s.hauer, devicetree, linux-kernel,
shawnguo, linux-arm-kernel, festevam, robh+dt
On 21-03-08 08:52, Teresa Remmet wrote:
> Hello Marco,
>
> Am Montag, den 08.03.2021, 09:40 +0100 schrieb Marco Felsch:
> > On 21-03-08 07:40, Heiko Schocher wrote:
> > > enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
> > >
> > > Signed-off-by: Heiko Schocher <hs@denx.de>
> > > ---
> > >
> > > .../dts/freescale/imx8mp-phycore-som.dtsi | 27
> > > +++++++++++++++++++
> > > 1 file changed, 27 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > > index 44a8c2337cee4..0284e7a5c6bba 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> > > @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
> > > };
> > > };
> > >
> > > +&flexspi {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&pinctrl_flexspi0>;
> > > + status = "okay";
> > > +
> > > + flash0: mt25qu256aba@0 {
> > > + reg = <0>;
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + compatible = "jedec,spi-nor";
> >
> > Please make the compatible the first property followed by the reg
> > property. Also you don't need to add the #size-cells and #address-
> > cells
> > now since you don't add a child node.
>
> but is this not similar to the label here? If you add partitions in the
> bootloader you need the cells properties?
If the bootloader will add partitions the bootloader can add the
size/address-cells too using the phandle. But this is more a nit.
Regards,
Marco
> Teresa
>
> >
> > Regards,
> > Marco
> >
> > > + spi-max-frequency = <80000000>;
> > > + spi-tx-bus-width = <4>;
> > > + spi-rx-bus-width = <4>;
> > > + };
> > > +};
> > > +
> > > &i2c1 {
> > > clock-frequency = <400000>;
> > > pinctrl-names = "default";
> > > @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> > > 0x11
> > > >;
> > > };
> > >
> > > + pinctrl_flexspi0: flexspi0grp {
> > > + fsl,pins = <
> > > + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
> > > 0x1c2
> > > + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x8
> > > 2
> > > + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x8
> > > 2
> > > + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x8
> > > 2
> > > + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x8
> > > 2
> > > + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x8
> > > 2
> > > + >;
> > > + };
> > > +
> > > pinctrl_i2c1: i2c1grp {
> > > fsl,pins = <
> > > MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x4
> > > 00001c3
> > > --
> > > 2.29.2
> > >
> > >
> > >
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
2021-03-08 9:28 ` Marco Felsch
@ 2021-03-08 9:55 ` Heiko Schocher
-1 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-08 9:55 UTC (permalink / raw)
To: Marco Felsch, Teresa Remmet
Cc: krzk, linux-imx, kernel, s.hauer, devicetree, linux-kernel,
shawnguo, linux-arm-kernel, festevam, robh+dt
Hello Marco,
On 08.03.21 10:28, Marco Felsch wrote:
> On 21-03-08 08:52, Teresa Remmet wrote:
>> Hello Marco,
>>
>> Am Montag, den 08.03.2021, 09:40 +0100 schrieb Marco Felsch:
>>> On 21-03-08 07:40, Heiko Schocher wrote:
>>>> enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
>>>>
>>>> Signed-off-by: Heiko Schocher <hs@denx.de>
>>>> ---
>>>>
>>>> .../dts/freescale/imx8mp-phycore-som.dtsi | 27
>>>> +++++++++++++++++++
>>>> 1 file changed, 27 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>>>> b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>>>> index 44a8c2337cee4..0284e7a5c6bba 100644
>>>> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>>>> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>>>> @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
>>>> };
>>>> };
>>>>
>>>> +&flexspi {
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_flexspi0>;
>>>> + status = "okay";
>>>> +
>>>> + flash0: mt25qu256aba@0 {
>>>> + reg = <0>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + compatible = "jedec,spi-nor";
>>>
>>> Please make the compatible the first property followed by the reg
>>> property. Also you don't need to add the #size-cells and #address-
>>> cells
>>> now since you don't add a child node.
>>
>> but is this not similar to the label here? If you add partitions in the
>> bootloader you need the cells properties?
>
> If the bootloader will add partitions the bootloader can add the
> size/address-cells too using the phandle. But this is more a nit.
Yes. I personally prefer to pass mtd partitions through kernel commandline.
I will work in your and Teresas comment, thanks!
bye,
Heiko
>
> Regards,
> Marco
>
>> Teresa
>>
>>>
>>> Regards,
>>> Marco
>>>
>>>> + spi-max-frequency = <80000000>;
>>>> + spi-tx-bus-width = <4>;
>>>> + spi-rx-bus-width = <4>;
>>>> + };
>>>> +};
>>>> +
>>>> &i2c1 {
>>>> clock-frequency = <400000>;
>>>> pinctrl-names = "default";
>>>> @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
>>>> 0x11
>>>> >;
>>>> };
>>>>
>>>> + pinctrl_flexspi0: flexspi0grp {
>>>> + fsl,pins = <
>>>> + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
>>>> 0x1c2
>>>> + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x8
>>>> 2
>>>> + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x8
>>>> 2
>>>> + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x8
>>>> 2
>>>> + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x8
>>>> 2
>>>> + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x8
>>>> 2
>>>> + >;
>>>> + };
>>>> +
>>>> pinctrl_i2c1: i2c1grp {
>>>> fsl,pins = <
>>>> MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x4
>>>> 00001c3
>>>> --
>>>> 2.29.2
>>>>
>>>>
>>>>
>
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: hs@denx.de
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor
@ 2021-03-08 9:55 ` Heiko Schocher
0 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-08 9:55 UTC (permalink / raw)
To: Marco Felsch, Teresa Remmet
Cc: krzk, linux-imx, kernel, s.hauer, devicetree, linux-kernel,
shawnguo, linux-arm-kernel, festevam, robh+dt
Hello Marco,
On 08.03.21 10:28, Marco Felsch wrote:
> On 21-03-08 08:52, Teresa Remmet wrote:
>> Hello Marco,
>>
>> Am Montag, den 08.03.2021, 09:40 +0100 schrieb Marco Felsch:
>>> On 21-03-08 07:40, Heiko Schocher wrote:
>>>> enable the mt25qu256aba spi nor on the imx8mp-phycore-som.
>>>>
>>>> Signed-off-by: Heiko Schocher <hs@denx.de>
>>>> ---
>>>>
>>>> .../dts/freescale/imx8mp-phycore-som.dtsi | 27
>>>> +++++++++++++++++++
>>>> 1 file changed, 27 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>>>> b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>>>> index 44a8c2337cee4..0284e7a5c6bba 100644
>>>> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>>>> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>>>> @@ -65,6 +65,22 @@ ethphy1: ethernet-phy@0 {
>>>> };
>>>> };
>>>>
>>>> +&flexspi {
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_flexspi0>;
>>>> + status = "okay";
>>>> +
>>>> + flash0: mt25qu256aba@0 {
>>>> + reg = <0>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + compatible = "jedec,spi-nor";
>>>
>>> Please make the compatible the first property followed by the reg
>>> property. Also you don't need to add the #size-cells and #address-
>>> cells
>>> now since you don't add a child node.
>>
>> but is this not similar to the label here? If you add partitions in the
>> bootloader you need the cells properties?
>
> If the bootloader will add partitions the bootloader can add the
> size/address-cells too using the phandle. But this is more a nit.
Yes. I personally prefer to pass mtd partitions through kernel commandline.
I will work in your and Teresas comment, thanks!
bye,
Heiko
>
> Regards,
> Marco
>
>> Teresa
>>
>>>
>>> Regards,
>>> Marco
>>>
>>>> + spi-max-frequency = <80000000>;
>>>> + spi-tx-bus-width = <4>;
>>>> + spi-rx-bus-width = <4>;
>>>> + };
>>>> +};
>>>> +
>>>> &i2c1 {
>>>> clock-frequency = <400000>;
>>>> pinctrl-names = "default";
>>>> @@ -217,6 +233,17 @@ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
>>>> 0x11
>>>> >;
>>>> };
>>>>
>>>> + pinctrl_flexspi0: flexspi0grp {
>>>> + fsl,pins = <
>>>> + MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK
>>>> 0x1c2
>>>> + MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x8
>>>> 2
>>>> + MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x8
>>>> 2
>>>> + MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x8
>>>> 2
>>>> + MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x8
>>>> 2
>>>> + MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x8
>>>> 2
>>>> + >;
>>>> + };
>>>> +
>>>> pinctrl_i2c1: i2c1grp {
>>>> fsl,pins = <
>>>> MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x4
>>>> 00001c3
>>>> --
>>>> 2.29.2
>>>>
>>>>
>>>>
>
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: hs@denx.de
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 0/2] enable flexspi support on imx8mp
@ 2021-03-16 5:04 ` Heiko Schocher
0 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-16 5:04 UTC (permalink / raw)
To: linux-spi
Cc: Heiko Schocher, linux-arm-kernel, Ashish Kumar, Kuldeep Singh,
Mark Brown, Rob Herring, Shawn Guo, Yogesh Gaur, devicetree,
linux-kernel
add compatible entry in nxp_fspi driver for imx8mp
new in v3:
seperate spi changes from series:
http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643289.html
into own series as Kuldeep suggested and rebased against
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
144c79ef33536 ("Merge tag 'perf-tools-fixes-for-v5.12-2020-03-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux")
@Shawn: If this series is accepted, can you apply the DTS patches from
series v2?
http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643292.html
http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643293.html
Changes in v3:
- seperate spi changes from series:
http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643289.html
- no changes, rebased against
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
144c79ef33536 Merge tag 'perf-tools-fixes-for-v5.12-2020-03-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
Changes in v2:
- work in comments from Marco
add own compatible entry for imx8mp
Heiko Schocher (2):
spi: fspi: enable fspi driver for on imx8mp
dt-bindings: spi: add compatible entry for imx8mp in FlexSPI
controller
Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt | 1 +
drivers/spi/spi-nxp-fspi.c | 1 +
2 files changed, 2 insertions(+)
--
2.29.2
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH 0/2] enable flexspi support on imx8mp
@ 2021-03-16 5:04 ` Heiko Schocher
0 siblings, 0 replies; 22+ messages in thread
From: Heiko Schocher @ 2021-03-16 5:04 UTC (permalink / raw)
To: linux-spi
Cc: Heiko Schocher, linux-arm-kernel, Ashish Kumar, Kuldeep Singh,
Mark Brown, Rob Herring, Shawn Guo, Yogesh Gaur, devicetree,
linux-kernel
add compatible entry in nxp_fspi driver for imx8mp
new in v3:
seperate spi changes from series:
http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643289.html
into own series as Kuldeep suggested and rebased against
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
144c79ef33536 ("Merge tag 'perf-tools-fixes-for-v5.12-2020-03-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux")
@Shawn: If this series is accepted, can you apply the DTS patches from
series v2?
http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643292.html
http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643293.html
Changes in v3:
- seperate spi changes from series:
http://lists.infradead.org/pipermail/linux-arm-kernel/2021-March/643289.html
- no changes, rebased against
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
144c79ef33536 Merge tag 'perf-tools-fixes-for-v5.12-2020-03-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
Changes in v2:
- work in comments from Marco
add own compatible entry for imx8mp
Heiko Schocher (2):
spi: fspi: enable fspi driver for on imx8mp
dt-bindings: spi: add compatible entry for imx8mp in FlexSPI
controller
Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt | 1 +
drivers/spi/spi-nxp-fspi.c | 1 +
2 files changed, 2 insertions(+)
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2021-03-16 5:06 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-08 6:40 [PATCH 0/2] enable flexspi support on imx8mp Heiko Schocher
2021-03-08 6:40 ` Heiko Schocher
2021-03-08 6:40 ` [PATCH 1/2] arm64: dts: imx8mp: add flexspi node Heiko Schocher
2021-03-08 6:40 ` Heiko Schocher
2021-03-08 8:33 ` Marco Felsch
2021-03-08 8:33 ` Marco Felsch
2021-03-08 6:40 ` [PATCH 2/2] arm64: imx8mp: imx8mp-phycore-som enable spi nor Heiko Schocher
2021-03-08 6:40 ` Heiko Schocher
2021-03-08 7:46 ` Teresa Remmet
2021-03-08 7:46 ` Teresa Remmet
2021-03-08 8:03 ` Marco Felsch
2021-03-08 8:03 ` Marco Felsch
2021-03-08 8:40 ` Marco Felsch
2021-03-08 8:40 ` Marco Felsch
2021-03-08 8:52 ` Teresa Remmet
2021-03-08 8:52 ` Teresa Remmet
2021-03-08 9:28 ` Marco Felsch
2021-03-08 9:28 ` Marco Felsch
2021-03-08 9:55 ` Heiko Schocher
2021-03-08 9:55 ` Heiko Schocher
2021-03-16 5:04 [PATCH 0/2] enable flexspi support on imx8mp Heiko Schocher
2021-03-16 5:04 ` Heiko Schocher
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