* [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers
@ 2021-03-01 5:59 Xu Yilun
2021-03-01 5:59 ` [PATCH v3 1/4] mfd: intel-m10-bmc: Fix the register access range Xu Yilun
` (4 more replies)
0 siblings, 5 replies; 14+ messages in thread
From: Xu Yilun @ 2021-03-01 5:59 UTC (permalink / raw)
To: lee.jones, linux-kernel
Cc: trix, yilun.xu, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
This patchset is some improvements for intel-m10-bmc and its subdevs.
Main changes from v1:
- Add a patch (#2) to simplify the definition of the legacy version reg.
- Add a patch (#4), add entry in MAINTAINERS for intel-m10-bmc mfd driver
and the subdev drivers.
Main changes from v2:
- Add Tom Rix as the reviewer for intel-m10-bmc mfd driver and the subdev
drivers.
- Rebased to 5.12-rc1
Matthew Gerlach (1):
mfd: intel-m10-bmc: Add access table configuration to the regmap
Xu Yilun (3):
mfd: intel-m10-bmc: Fix the register access range
mfd: intel-m10-bmc: Simplify the legacy version reg definition
MAINTAINERS: Add entry for Intel MAX 10 mfd driver
MAINTAINERS | 10 ++++++++++
drivers/mfd/intel-m10-bmc.c | 25 ++++++++++++++++++-------
include/linux/mfd/intel-m10-bmc.h | 7 +++++--
3 files changed, 33 insertions(+), 9 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 1/4] mfd: intel-m10-bmc: Fix the register access range
2021-03-01 5:59 [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
@ 2021-03-01 5:59 ` Xu Yilun
2021-03-10 9:16 ` Lee Jones
2021-03-01 5:59 ` [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition Xu Yilun
` (3 subsequent siblings)
4 siblings, 1 reply; 14+ messages in thread
From: Xu Yilun @ 2021-03-01 5:59 UTC (permalink / raw)
To: lee.jones, linux-kernel
Cc: trix, yilun.xu, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
This patch fixes the max register address of MAX 10 BMC. The range
0x20000000 ~ 0x200000fc are for control registers of the QSPI flash
controller, which are not accessible to host.
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
---
v2: no change.
v3: no change, rebased to 5.12-rc1
---
include/linux/mfd/intel-m10-bmc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index 74d4e19..9b54ca1 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -11,7 +11,7 @@
#define M10BMC_LEGACY_SYS_BASE 0x300400
#define M10BMC_SYS_BASE 0x300800
-#define M10BMC_MEM_END 0x200000fc
+#define M10BMC_MEM_END 0x1fffffff
/* Register offset of system registers */
#define NIOS2_FW_VERSION 0x0
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition
2021-03-01 5:59 [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
2021-03-01 5:59 ` [PATCH v3 1/4] mfd: intel-m10-bmc: Fix the register access range Xu Yilun
@ 2021-03-01 5:59 ` Xu Yilun
2021-03-10 9:16 ` Lee Jones
2021-03-01 5:59 ` [PATCH v3 3/4] mfd: intel-m10-bmc: Add access table configuration to the regmap Xu Yilun
` (2 subsequent siblings)
4 siblings, 1 reply; 14+ messages in thread
From: Xu Yilun @ 2021-03-01 5:59 UTC (permalink / raw)
To: lee.jones, linux-kernel
Cc: trix, yilun.xu, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
The version register is the only one in the legacy I/O space to be
accessed, so it is not necessary to define the legacy base & version
register offset. A direct definition of the legacy version register
address would be fine.
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
---
v3: no change, rebased to 5.12-rc1
---
drivers/mfd/intel-m10-bmc.c | 12 +++++-------
include/linux/mfd/intel-m10-bmc.h | 2 +-
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
index 06c9775..0d2c03f 100644
--- a/drivers/mfd/intel-m10-bmc.c
+++ b/drivers/mfd/intel-m10-bmc.c
@@ -117,16 +117,14 @@ static int check_m10bmc_version(struct intel_m10bmc *ddata)
/*
* This check is to filter out the very old legacy BMC versions,
- * M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
- * registers. In the old BMC chips, the BMC version info is stored
- * in this old version register (M10BMC_LEGACY_SYS_BASE +
- * M10BMC_BUILD_VER), so its read out value would have not been
- * LEGACY_INVALID (0xffffffff). But in new BMC chips that the
+ * 0x300400 is the offset to this old block of mmio registers. In the
+ * old BMC chips, the BMC version info is stored in this old version
+ * register (0x300400 + 0x68), so its read out value would have not
+ * been LEGACY_INVALID (0xffffffff). But in new BMC chips that the
* driver supports, the value of this register should be
* LEGACY_INVALID.
*/
- ret = m10bmc_raw_read(ddata,
- M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
+ ret = m10bmc_raw_read(ddata, M10BMC_LEGACY_BUILD_VER, &v);
if (ret)
return -ENODEV;
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index 9b54ca1..4f1071f 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -9,7 +9,7 @@
#include <linux/regmap.h>
-#define M10BMC_LEGACY_SYS_BASE 0x300400
+#define M10BMC_LEGACY_BUILD_VER 0x300468
#define M10BMC_SYS_BASE 0x300800
#define M10BMC_MEM_END 0x1fffffff
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 3/4] mfd: intel-m10-bmc: Add access table configuration to the regmap
2021-03-01 5:59 [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
2021-03-01 5:59 ` [PATCH v3 1/4] mfd: intel-m10-bmc: Fix the register access range Xu Yilun
2021-03-01 5:59 ` [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition Xu Yilun
@ 2021-03-01 5:59 ` Xu Yilun
2021-03-10 9:18 ` Lee Jones
2021-03-01 5:59 ` [PATCH v3 4/4] MAINTAINERS: Add entry for Intel MAX 10 mfd driver Xu Yilun
2021-03-08 2:04 ` [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
4 siblings, 1 reply; 14+ messages in thread
From: Xu Yilun @ 2021-03-01 5:59 UTC (permalink / raw)
To: lee.jones, linux-kernel
Cc: trix, yilun.xu, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
This patch adds access tables to the MAX 10 BMC regmap. This prevents
the host from accessing the unwanted I/O space. It also filters out the
invalid outputs when reading the regmap debugfs interface.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
---
v2: Use the new macro M10BMC_LEGACY_BUILD_VER
v3: No change, rebased to 5.12-rc1
---
drivers/mfd/intel-m10-bmc.c | 13 +++++++++++++
include/linux/mfd/intel-m10-bmc.h | 5 ++++-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
index 0d2c03f..1932101 100644
--- a/drivers/mfd/intel-m10-bmc.c
+++ b/drivers/mfd/intel-m10-bmc.c
@@ -23,10 +23,23 @@ static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
{ .name = "n3000bmc-secure" },
};
+static const struct regmap_range m10bmc_regmap_range[] = {
+ regmap_reg_range(M10BMC_LEGACY_BUILD_VER, M10BMC_LEGACY_BUILD_VER),
+ regmap_reg_range(M10BMC_SYS_BASE, M10BMC_SYS_END),
+ regmap_reg_range(M10BMC_FLASH_BASE, M10BMC_FLASH_END),
+};
+
+static const struct regmap_access_table m10bmc_access_table = {
+ .yes_ranges = m10bmc_regmap_range,
+ .n_yes_ranges = ARRAY_SIZE(m10bmc_regmap_range),
+};
+
static struct regmap_config intel_m10bmc_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
+ .wr_table = &m10bmc_access_table,
+ .rd_table = &m10bmc_access_table,
.max_register = M10BMC_MEM_END,
};
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index 4f1071f..c4eb38c 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -11,7 +11,10 @@
#define M10BMC_LEGACY_BUILD_VER 0x300468
#define M10BMC_SYS_BASE 0x300800
-#define M10BMC_MEM_END 0x1fffffff
+#define M10BMC_SYS_END 0x300fff
+#define M10BMC_FLASH_BASE 0x10000000
+#define M10BMC_FLASH_END 0x1fffffff
+#define M10BMC_MEM_END M10BMC_FLASH_END
/* Register offset of system registers */
#define NIOS2_FW_VERSION 0x0
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 4/4] MAINTAINERS: Add entry for Intel MAX 10 mfd driver
2021-03-01 5:59 [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
` (2 preceding siblings ...)
2021-03-01 5:59 ` [PATCH v3 3/4] mfd: intel-m10-bmc: Add access table configuration to the regmap Xu Yilun
@ 2021-03-01 5:59 ` Xu Yilun
2021-03-10 9:19 ` Lee Jones
2021-03-08 2:04 ` [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
4 siblings, 1 reply; 14+ messages in thread
From: Xu Yilun @ 2021-03-01 5:59 UTC (permalink / raw)
To: lee.jones, linux-kernel
Cc: trix, yilun.xu, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
This patch adds maintainer info for Intel MAX 10 mfd driver.
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
---
v3: Add Tom Rix as the reviewer.
---
MAINTAINERS | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b58a469..ab31c01 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9116,6 +9116,16 @@ F: include/linux/mei_cl_bus.h
F: include/uapi/linux/mei.h
F: samples/mei/*
+INTEL MAX 10 BMC MFD DRIVER
+M: Xu Yilun <yilun.xu@intel.com>
+R: Tom Rix <trix@redhat.com>
+S: Maintained
+F: Documentation/ABI/testing/sysfs-driver-intel-m10-bmc
+F: Documentation/hwmon/intel-m10-bmc-hwmon.rst
+F: drivers/hwmon/intel-m10-bmc-hwmon.c
+F: drivers/mfd/intel-m10-bmc.c
+F: include/linux/mfd/intel-m10-bmc.h
+
INTEL MENLOW THERMAL DRIVER
M: Sujith Thomas <sujith.thomas@intel.com>
L: platform-driver-x86@vger.kernel.org
--
2.7.4
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers
2021-03-01 5:59 [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
` (3 preceding siblings ...)
2021-03-01 5:59 ` [PATCH v3 4/4] MAINTAINERS: Add entry for Intel MAX 10 mfd driver Xu Yilun
@ 2021-03-08 2:04 ` Xu Yilun
2021-03-08 9:01 ` Lee Jones
4 siblings, 1 reply; 14+ messages in thread
From: Xu Yilun @ 2021-03-08 2:04 UTC (permalink / raw)
To: lee.jones, linux-kernel
Cc: trix, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
Hi Lee:
Could you please help on review this patchset? They are some
improvements for intel-m10-bmc MFD driver.
Thanks,
Yilun
On Mon, Mar 01, 2021 at 01:59:41PM +0800, Xu Yilun wrote:
> This patchset is some improvements for intel-m10-bmc and its subdevs.
>
> Main changes from v1:
> - Add a patch (#2) to simplify the definition of the legacy version reg.
> - Add a patch (#4), add entry in MAINTAINERS for intel-m10-bmc mfd driver
> and the subdev drivers.
>
> Main changes from v2:
> - Add Tom Rix as the reviewer for intel-m10-bmc mfd driver and the subdev
> drivers.
> - Rebased to 5.12-rc1
>
>
> Matthew Gerlach (1):
> mfd: intel-m10-bmc: Add access table configuration to the regmap
>
> Xu Yilun (3):
> mfd: intel-m10-bmc: Fix the register access range
> mfd: intel-m10-bmc: Simplify the legacy version reg definition
> MAINTAINERS: Add entry for Intel MAX 10 mfd driver
>
> MAINTAINERS | 10 ++++++++++
> drivers/mfd/intel-m10-bmc.c | 25 ++++++++++++++++++-------
> include/linux/mfd/intel-m10-bmc.h | 7 +++++--
> 3 files changed, 33 insertions(+), 9 deletions(-)
>
> --
> 2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers
2021-03-08 2:04 ` [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
@ 2021-03-08 9:01 ` Lee Jones
2021-03-08 14:42 ` Xu Yilun
0 siblings, 1 reply; 14+ messages in thread
From: Lee Jones @ 2021-03-08 9:01 UTC (permalink / raw)
To: Xu Yilun
Cc: linux-kernel, trix, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
On Mon, 08 Mar 2021, Xu Yilun wrote:
> Hi Lee:
>
> Could you please help on review this patchset? They are some
> improvements for intel-m10-bmc MFD driver.
Please don't send contentless pings 1 week after submitting a set.
Also please refrain from top-posting.
This patch is on my TO-REVIEW list.
Unfortunately, since I work in reverse chronological order, you just
pushed the set to the back of the list.
If after a suitable period, usually around 2 weeks, you think your
submission has been missed, please submit a [RESEND] instead.
> On Mon, Mar 01, 2021 at 01:59:41PM +0800, Xu Yilun wrote:
> > This patchset is some improvements for intel-m10-bmc and its subdevs.
> >
> > Main changes from v1:
> > - Add a patch (#2) to simplify the definition of the legacy version reg.
> > - Add a patch (#4), add entry in MAINTAINERS for intel-m10-bmc mfd driver
> > and the subdev drivers.
> >
> > Main changes from v2:
> > - Add Tom Rix as the reviewer for intel-m10-bmc mfd driver and the subdev
> > drivers.
> > - Rebased to 5.12-rc1
> >
> >
> > Matthew Gerlach (1):
> > mfd: intel-m10-bmc: Add access table configuration to the regmap
> >
> > Xu Yilun (3):
> > mfd: intel-m10-bmc: Fix the register access range
> > mfd: intel-m10-bmc: Simplify the legacy version reg definition
> > MAINTAINERS: Add entry for Intel MAX 10 mfd driver
> >
> > MAINTAINERS | 10 ++++++++++
> > drivers/mfd/intel-m10-bmc.c | 25 ++++++++++++++++++-------
> > include/linux/mfd/intel-m10-bmc.h | 7 +++++--
> > 3 files changed, 33 insertions(+), 9 deletions(-)
> >
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers
2021-03-08 9:01 ` Lee Jones
@ 2021-03-08 14:42 ` Xu Yilun
2021-03-08 15:31 ` Lee Jones
0 siblings, 1 reply; 14+ messages in thread
From: Xu Yilun @ 2021-03-08 14:42 UTC (permalink / raw)
To: Lee Jones
Cc: linux-kernel, trix, matthew.gerlach, russell.h.weight, lgoncalv,
hao.wu, yilun.xu
On Mon, Mar 08, 2021 at 09:01:24AM +0000, Lee Jones wrote:
> On Mon, 08 Mar 2021, Xu Yilun wrote:
>
> > Hi Lee:
> >
> > Could you please help on review this patchset? They are some
> > improvements for intel-m10-bmc MFD driver.
>
> Please don't send contentless pings 1 week after submitting a set.
>
> Also please refrain from top-posting.
>
> This patch is on my TO-REVIEW list.
>
> Unfortunately, since I work in reverse chronological order, you just
> pushed the set to the back of the list.
>
> If after a suitable period, usually around 2 weeks, you think your
> submission has been missed, please submit a [RESEND] instead.
Thanks for clarification, I'll follow it.
I thought my submission was missed cause I didn't got your response
since v2 at Jan 26, maybe some misunderstanding, so I'm a little hurry
this time. Sorry.
Yilun
>
> > On Mon, Mar 01, 2021 at 01:59:41PM +0800, Xu Yilun wrote:
> > > This patchset is some improvements for intel-m10-bmc and its subdevs.
> > >
> > > Main changes from v1:
> > > - Add a patch (#2) to simplify the definition of the legacy version reg.
> > > - Add a patch (#4), add entry in MAINTAINERS for intel-m10-bmc mfd driver
> > > and the subdev drivers.
> > >
> > > Main changes from v2:
> > > - Add Tom Rix as the reviewer for intel-m10-bmc mfd driver and the subdev
> > > drivers.
> > > - Rebased to 5.12-rc1
> > >
> > >
> > > Matthew Gerlach (1):
> > > mfd: intel-m10-bmc: Add access table configuration to the regmap
> > >
> > > Xu Yilun (3):
> > > mfd: intel-m10-bmc: Fix the register access range
> > > mfd: intel-m10-bmc: Simplify the legacy version reg definition
> > > MAINTAINERS: Add entry for Intel MAX 10 mfd driver
> > >
> > > MAINTAINERS | 10 ++++++++++
> > > drivers/mfd/intel-m10-bmc.c | 25 ++++++++++++++++++-------
> > > include/linux/mfd/intel-m10-bmc.h | 7 +++++--
> > > 3 files changed, 33 insertions(+), 9 deletions(-)
> > >
>
> --
> Lee Jones [李琼斯]
> Senior Technical Lead - Developer Services
> Linaro.org │ Open source software for Arm SoCs
> Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers
2021-03-08 14:42 ` Xu Yilun
@ 2021-03-08 15:31 ` Lee Jones
0 siblings, 0 replies; 14+ messages in thread
From: Lee Jones @ 2021-03-08 15:31 UTC (permalink / raw)
To: Xu Yilun
Cc: linux-kernel, trix, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
On Mon, 08 Mar 2021, Xu Yilun wrote:
> On Mon, Mar 08, 2021 at 09:01:24AM +0000, Lee Jones wrote:
> > On Mon, 08 Mar 2021, Xu Yilun wrote:
> >
> > > Hi Lee:
> > >
> > > Could you please help on review this patchset? They are some
> > > improvements for intel-m10-bmc MFD driver.
> >
> > Please don't send contentless pings 1 week after submitting a set.
> >
> > Also please refrain from top-posting.
> >
> > This patch is on my TO-REVIEW list.
> >
> > Unfortunately, since I work in reverse chronological order, you just
> > pushed the set to the back of the list.
> >
> > If after a suitable period, usually around 2 weeks, you think your
> > submission has been missed, please submit a [RESEND] instead.
>
> Thanks for clarification, I'll follow it.
>
> I thought my submission was missed cause I didn't got your response
> since v2 at Jan 26, maybe some misunderstanding, so I'm a little hurry
> this time. Sorry.
We have plenty of time to get this in.
I'm currently catching-up. Please bear with me.
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition
2021-03-01 5:59 ` [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition Xu Yilun
@ 2021-03-10 9:16 ` Lee Jones
2021-03-10 15:53 ` Xu Yilun
0 siblings, 1 reply; 14+ messages in thread
From: Lee Jones @ 2021-03-10 9:16 UTC (permalink / raw)
To: Xu Yilun
Cc: linux-kernel, trix, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
On Mon, 01 Mar 2021, Xu Yilun wrote:
> The version register is the only one in the legacy I/O space to be
> accessed, so it is not necessary to define the legacy base & version
> register offset. A direct definition of the legacy version register
> address would be fine.
>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> Reviewed-by: Tom Rix <trix@redhat.com>
> ---
> v3: no change, rebased to 5.12-rc1
> ---
> drivers/mfd/intel-m10-bmc.c | 12 +++++-------
> include/linux/mfd/intel-m10-bmc.h | 2 +-
> 2 files changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
> index 06c9775..0d2c03f 100644
> --- a/drivers/mfd/intel-m10-bmc.c
> +++ b/drivers/mfd/intel-m10-bmc.c
> @@ -117,16 +117,14 @@ static int check_m10bmc_version(struct intel_m10bmc *ddata)
>
> /*
> * This check is to filter out the very old legacy BMC versions,
> - * M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
> - * registers. In the old BMC chips, the BMC version info is stored
> - * in this old version register (M10BMC_LEGACY_SYS_BASE +
> - * M10BMC_BUILD_VER), so its read out value would have not been
> - * LEGACY_INVALID (0xffffffff). But in new BMC chips that the
> + * 0x300400 is the offset to this old block of mmio registers. In the
Not sure we want actual addresses in comments.
Please reword this to cover just the latest solution.
> + * old BMC chips, the BMC version info is stored in this old version
> + * register (0x300400 + 0x68), so its read out value would have not
> + * been LEGACY_INVALID (0xffffffff). But in new BMC chips that the
> * driver supports, the value of this register should be
> * LEGACY_INVALID.
> */
> - ret = m10bmc_raw_read(ddata,
> - M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
> + ret = m10bmc_raw_read(ddata, M10BMC_LEGACY_BUILD_VER, &v);
> if (ret)
> return -ENODEV;
>
> diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
> index 9b54ca1..4f1071f 100644
> --- a/include/linux/mfd/intel-m10-bmc.h
> +++ b/include/linux/mfd/intel-m10-bmc.h
> @@ -9,7 +9,7 @@
>
> #include <linux/regmap.h>
>
> -#define M10BMC_LEGACY_SYS_BASE 0x300400
> +#define M10BMC_LEGACY_BUILD_VER 0x300468
> #define M10BMC_SYS_BASE 0x300800
> #define M10BMC_MEM_END 0x1fffffff
>
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 1/4] mfd: intel-m10-bmc: Fix the register access range
2021-03-01 5:59 ` [PATCH v3 1/4] mfd: intel-m10-bmc: Fix the register access range Xu Yilun
@ 2021-03-10 9:16 ` Lee Jones
0 siblings, 0 replies; 14+ messages in thread
From: Lee Jones @ 2021-03-10 9:16 UTC (permalink / raw)
To: Xu Yilun
Cc: linux-kernel, trix, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
On Mon, 01 Mar 2021, Xu Yilun wrote:
> This patch fixes the max register address of MAX 10 BMC. The range
> 0x20000000 ~ 0x200000fc are for control registers of the QSPI flash
> controller, which are not accessible to host.
>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> Reviewed-by: Tom Rix <trix@redhat.com>
> ---
> v2: no change.
> v3: no change, rebased to 5.12-rc1
> ---
> include/linux/mfd/intel-m10-bmc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
For my own reference (apply this as-is to your sign-off block):
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 3/4] mfd: intel-m10-bmc: Add access table configuration to the regmap
2021-03-01 5:59 ` [PATCH v3 3/4] mfd: intel-m10-bmc: Add access table configuration to the regmap Xu Yilun
@ 2021-03-10 9:18 ` Lee Jones
0 siblings, 0 replies; 14+ messages in thread
From: Lee Jones @ 2021-03-10 9:18 UTC (permalink / raw)
To: Xu Yilun
Cc: linux-kernel, trix, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
On Mon, 01 Mar 2021, Xu Yilun wrote:
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>
> This patch adds access tables to the MAX 10 BMC regmap. This prevents
> the host from accessing the unwanted I/O space. It also filters out the
> invalid outputs when reading the regmap debugfs interface.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> Reviewed-by: Tom Rix <trix@redhat.com>
> ---
> v2: Use the new macro M10BMC_LEGACY_BUILD_VER
> v3: No change, rebased to 5.12-rc1
> ---
> drivers/mfd/intel-m10-bmc.c | 13 +++++++++++++
> include/linux/mfd/intel-m10-bmc.h | 5 ++++-
> 2 files changed, 17 insertions(+), 1 deletion(-)
For my own reference (apply this as-is to your sign-off block):
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 4/4] MAINTAINERS: Add entry for Intel MAX 10 mfd driver
2021-03-01 5:59 ` [PATCH v3 4/4] MAINTAINERS: Add entry for Intel MAX 10 mfd driver Xu Yilun
@ 2021-03-10 9:19 ` Lee Jones
0 siblings, 0 replies; 14+ messages in thread
From: Lee Jones @ 2021-03-10 9:19 UTC (permalink / raw)
To: Xu Yilun
Cc: linux-kernel, trix, matthew.gerlach, russell.h.weight, lgoncalv, hao.wu
On Mon, 01 Mar 2021, Xu Yilun wrote:
> This patch adds maintainer info for Intel MAX 10 mfd driver.
>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> Reviewed-by: Tom Rix <trix@redhat.com>
> ---
> v3: Add Tom Rix as the reviewer.
> ---
> MAINTAINERS | 10 ++++++++++
> 1 file changed, 10 insertions(+)
For my own reference (apply this as-is to your sign-off block):
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition
2021-03-10 9:16 ` Lee Jones
@ 2021-03-10 15:53 ` Xu Yilun
0 siblings, 0 replies; 14+ messages in thread
From: Xu Yilun @ 2021-03-10 15:53 UTC (permalink / raw)
To: Lee Jones
Cc: linux-kernel, trix, matthew.gerlach, russell.h.weight, lgoncalv,
hao.wu, yilun.xu
On Wed, Mar 10, 2021 at 09:16:25AM +0000, Lee Jones wrote:
> On Mon, 01 Mar 2021, Xu Yilun wrote:
>
> > The version register is the only one in the legacy I/O space to be
> > accessed, so it is not necessary to define the legacy base & version
> > register offset. A direct definition of the legacy version register
> > address would be fine.
> >
> > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > Reviewed-by: Tom Rix <trix@redhat.com>
> > ---
> > v3: no change, rebased to 5.12-rc1
> > ---
> > drivers/mfd/intel-m10-bmc.c | 12 +++++-------
> > include/linux/mfd/intel-m10-bmc.h | 2 +-
> > 2 files changed, 6 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
> > index 06c9775..0d2c03f 100644
> > --- a/drivers/mfd/intel-m10-bmc.c
> > +++ b/drivers/mfd/intel-m10-bmc.c
> > @@ -117,16 +117,14 @@ static int check_m10bmc_version(struct intel_m10bmc *ddata)
> >
> > /*
> > * This check is to filter out the very old legacy BMC versions,
> > - * M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
> > - * registers. In the old BMC chips, the BMC version info is stored
> > - * in this old version register (M10BMC_LEGACY_SYS_BASE +
> > - * M10BMC_BUILD_VER), so its read out value would have not been
> > - * LEGACY_INVALID (0xffffffff). But in new BMC chips that the
> > + * 0x300400 is the offset to this old block of mmio registers. In the
>
> Not sure we want actual addresses in comments.
>
> Please reword this to cover just the latest solution.
Will fix it in next version.
Thanks,
Yilun
>
> > + * old BMC chips, the BMC version info is stored in this old version
> > + * register (0x300400 + 0x68), so its read out value would have not
> > + * been LEGACY_INVALID (0xffffffff). But in new BMC chips that the
> > * driver supports, the value of this register should be
> > * LEGACY_INVALID.
> > */
> > - ret = m10bmc_raw_read(ddata,
> > - M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
> > + ret = m10bmc_raw_read(ddata, M10BMC_LEGACY_BUILD_VER, &v);
> > if (ret)
> > return -ENODEV;
> >
> > diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
> > index 9b54ca1..4f1071f 100644
> > --- a/include/linux/mfd/intel-m10-bmc.h
> > +++ b/include/linux/mfd/intel-m10-bmc.h
> > @@ -9,7 +9,7 @@
> >
> > #include <linux/regmap.h>
> >
> > -#define M10BMC_LEGACY_SYS_BASE 0x300400
> > +#define M10BMC_LEGACY_BUILD_VER 0x300468
> > #define M10BMC_SYS_BASE 0x300800
> > #define M10BMC_MEM_END 0x1fffffff
> >
>
> --
> Lee Jones [李琼斯]
> Senior Technical Lead - Developer Services
> Linaro.org │ Open source software for Arm SoCs
> Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-03-10 15:59 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-01 5:59 [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
2021-03-01 5:59 ` [PATCH v3 1/4] mfd: intel-m10-bmc: Fix the register access range Xu Yilun
2021-03-10 9:16 ` Lee Jones
2021-03-01 5:59 ` [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition Xu Yilun
2021-03-10 9:16 ` Lee Jones
2021-03-10 15:53 ` Xu Yilun
2021-03-01 5:59 ` [PATCH v3 3/4] mfd: intel-m10-bmc: Add access table configuration to the regmap Xu Yilun
2021-03-10 9:18 ` Lee Jones
2021-03-01 5:59 ` [PATCH v3 4/4] MAINTAINERS: Add entry for Intel MAX 10 mfd driver Xu Yilun
2021-03-10 9:19 ` Lee Jones
2021-03-08 2:04 ` [PATCH v3 0/4] Some improvement for Intel MAX 10 MFD drivers Xu Yilun
2021-03-08 9:01 ` Lee Jones
2021-03-08 14:42 ` Xu Yilun
2021-03-08 15:31 ` Lee Jones
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