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* [PATCH 1/3] openssl: Enable building for RISC-V 32-bit
@ 2021-03-09 16:10 Alistair Francis
  2021-03-09 16:10 ` [PATCH 2/3] linux-yocto: Add qemuriscv32 as a compatible machine Alistair Francis
  2021-03-09 16:10 ` [PATCH 3/3] machine: Initial commit of qemuriscv32 Alistair Francis
  0 siblings, 2 replies; 3+ messages in thread
From: Alistair Francis @ 2021-03-09 16:10 UTC (permalink / raw)
  To: openembedded-core; +Cc: alistair23, Alistair Francis

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 ...ort-for-io_pgetevents_time64-syscall.patch | 62 ++++++++++++
 ...ort-for-io_pgetevents_time64-syscall.patch | 99 +++++++++++++++++++
 .../openssl/openssl_1.1.1j.bb                 |  5 +
 3 files changed, 166 insertions(+)
 create mode 100644 meta/recipes-connectivity/openssl/openssl/0003-Add-support-for-io_pgetevents_time64-syscall.patch
 create mode 100644 meta/recipes-connectivity/openssl/openssl/0004-Fixup-support-for-io_pgetevents_time64-syscall.patch

diff --git a/meta/recipes-connectivity/openssl/openssl/0003-Add-support-for-io_pgetevents_time64-syscall.patch b/meta/recipes-connectivity/openssl/openssl/0003-Add-support-for-io_pgetevents_time64-syscall.patch
new file mode 100644
index 0000000000..d62b9344c1
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl/0003-Add-support-for-io_pgetevents_time64-syscall.patch
@@ -0,0 +1,62 @@
+From 5b5e2985f355c8e99c196d9ce5d02c15bebadfbc Mon Sep 17 00:00:00 2001
+From: Alistair Francis <alistair.francis@wdc.com>
+Date: Thu, 29 Aug 2019 13:56:21 -0700
+Subject: [PATCH] Add support for io_pgetevents_time64 syscall
+
+32-bit architectures that are y2038 safe don't include syscalls that use
+32-bit time_t. Instead these architectures have suffixed syscalls that
+always use a 64-bit time_t. In the case of the io_getevents syscall the
+syscall has been replaced with the io_pgetevents_time64 syscall instead.
+
+This patch changes the io_getevents() function to use the correct
+syscall based on the avaliable syscalls and the time_t size. We will
+only use the new 64-bit time_t syscall if the architecture is using a
+64-bit time_t. This is to avoid having to deal with 32/64-bit
+conversions and relying on a 64-bit timespec struct on 32-bit time_t
+platforms. As of Linux 5.3 there are no 32-bit time_t architectures
+without __NR_io_getevents. In the future if a 32-bit time_t architecture
+wants to use the 64-bit syscalls we can handle the conversion.
+
+This fixes build failures on 32-bit RISC-V.
+
+Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
+
+Reviewed-by: Richard Levitte <levitte@openssl.org>
+Reviewed-by: Paul Dale <paul.dale@oracle.com>
+(Merged from https://github.com/openssl/openssl/pull/9819)
+Upstream-Status: Accepted
+---
+ engines/e_afalg.c | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+diff --git a/engines/e_afalg.c b/engines/e_afalg.c
+index dacbe358cb..99516cb1bb 100644
+--- a/engines/e_afalg.c
++++ b/engines/e_afalg.c
+@@ -125,7 +125,23 @@ static ossl_inline int io_getevents(aio_context_t ctx, long min, long max,
+                                struct io_event *events,
+                                struct timespec *timeout)
+ {
++#if defined(__NR_io_getevents)
+     return syscall(__NR_io_getevents, ctx, min, max, events, timeout);
++#elif defined(__NR_io_pgetevents_time64)
++    /* Let's only support the 64 suffix syscalls for 64-bit time_t.
++     * This simplifies the code for us as we don't need to use a 64-bit
++     * version of timespec with a 32-bit time_t and handle converting
++     * between 64-bit and 32-bit times and check for overflows.
++     */
++    if (sizeof(timeout->tv_sec) == 8)
++        return syscall(__NR_io_pgetevents_time64, ctx, min, max, events, timeout, NULL);
++    else {
++        errno = ENOSYS;
++        return -1;
++    }
++#else
++# error "We require either the io_getevents syscall or __NR_io_pgetevents_time64."
++#endif
+ }
+ 
+ static void afalg_waitfd_cleanup(ASYNC_WAIT_CTX *ctx, const void *key,
+-- 
+2.30.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl/0004-Fixup-support-for-io_pgetevents_time64-syscall.patch b/meta/recipes-connectivity/openssl/openssl/0004-Fixup-support-for-io_pgetevents_time64-syscall.patch
new file mode 100644
index 0000000000..c8bc6f5c68
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl/0004-Fixup-support-for-io_pgetevents_time64-syscall.patch
@@ -0,0 +1,99 @@
+From e5499a3cac1e823c3e0697e8667e952317b70cc8 Mon Sep 17 00:00:00 2001
+From: Alistair Francis <alistair.francis@wdc.com>
+Date: Thu, 4 Mar 2021 12:10:11 -0500
+Subject: [PATCH] Fixup support for io_pgetevents_time64 syscall
+
+This is a fixup for the original commit 5b5e2985f355c8e99c196d9ce5d02c15bebadfbc
+"Add support for io_pgetevents_time64 syscall" that didn't correctly
+work for 32-bit architecutres with a 64-bit time_t that aren't RISC-V.
+
+For a full discussion of the issue see:
+https://github.com/openssl/openssl/commit/5b5e2985f355c8e99c196d9ce5d02c15bebadfbc
+
+Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
+
+Reviewed-by: Tomas Mraz <tomas@openssl.org>
+Reviewed-by: Paul Dale <pauli@openssl.org>
+(Merged from https://github.com/openssl/openssl/pull/14432)
+Upstream-Status: Accepted
+---
+ engines/e_afalg.c | 55 ++++++++++++++++++++++++++++++++++++-----------
+ 1 file changed, 42 insertions(+), 13 deletions(-)
+
+diff --git a/engines/e_afalg.c b/engines/e_afalg.c
+index 9480d7c24b..4e9d67db2d 100644
+--- a/engines/e_afalg.c
++++ b/engines/e_afalg.c
+@@ -124,27 +124,56 @@ static ossl_inline int io_read(aio_context_t ctx, long n, struct iocb **iocb)
+     return syscall(__NR_io_submit, ctx, n, iocb);
+ }
+ 
++/* A version of 'struct timespec' with 32-bit time_t and nanoseconds.  */
++struct __timespec32
++{
++  __kernel_long_t tv_sec;
++  __kernel_long_t tv_nsec;
++};
++
+ static ossl_inline int io_getevents(aio_context_t ctx, long min, long max,
+                                struct io_event *events,
+                                struct timespec *timeout)
+ {
++#if defined(__NR_io_pgetevents_time64)
++    /* Check if we are a 32-bit architecture with a 64-bit time_t */
++    if (sizeof(*timeout) != sizeof(struct __timespec32)) {
++        int ret = syscall(__NR_io_pgetevents_time64, ctx, min, max, events,
++                          timeout, NULL);
++        if (ret == 0 || errno != ENOSYS)
++            return ret;
++    }
++#endif
++
+ #if defined(__NR_io_getevents)
+-    return syscall(__NR_io_getevents, ctx, min, max, events, timeout);
+-#elif defined(__NR_io_pgetevents_time64)
+-    /* Let's only support the 64 suffix syscalls for 64-bit time_t.
+-     * This simplifies the code for us as we don't need to use a 64-bit
+-     * version of timespec with a 32-bit time_t and handle converting
+-     * between 64-bit and 32-bit times and check for overflows.
+-     */
+-    if (sizeof(timeout->tv_sec) == 8)
+-        return syscall(__NR_io_pgetevents_time64, ctx, min, max, events, timeout, NULL);
++    if (sizeof(*timeout) == sizeof(struct __timespec32))
++        /*
++         * time_t matches our architecture length, we can just use
++         * __NR_io_getevents
++         */
++        return syscall(__NR_io_getevents, ctx, min, max, events, timeout);
+     else {
+-        errno = ENOSYS;
+-        return -1;
++        /*
++         * We don't have __NR_io_pgetevents_time64, but we are using a
++         * 64-bit time_t on a 32-bit architecture. If we can fit the
++         * timeout value in a 32-bit time_t, then let's do that
++         * and then use the __NR_io_getevents syscall.
++         */
++        if (timeout && timeout->tv_sec == (long)timeout->tv_sec) {
++            struct __timespec32 ts32;
++
++            ts32.tv_sec = (__kernel_long_t) timeout->tv_sec;
++            ts32.tv_nsec = (__kernel_long_t) timeout->tv_nsec;
++
++            return syscall(__NR_io_getevents, ctx, min, max, events, ts32);
++        } else {
++            return syscall(__NR_io_getevents, ctx, min, max, events, NULL);
++        }
+     }
+-#else
+-# error "We require either the io_getevents syscall or __NR_io_pgetevents_time64."
+ #endif
++
++    errno = ENOSYS;
++    return -1;
+ }
+ 
+ static void afalg_waitfd_cleanup(ASYNC_WAIT_CTX *ctx, const void *key,
+-- 
+2.30.1
+
diff --git a/meta/recipes-connectivity/openssl/openssl_1.1.1j.bb b/meta/recipes-connectivity/openssl/openssl_1.1.1j.bb
index 181790e6ab..ed6d7e0cd4 100644
--- a/meta/recipes-connectivity/openssl/openssl_1.1.1j.bb
+++ b/meta/recipes-connectivity/openssl/openssl_1.1.1j.bb
@@ -23,6 +23,11 @@ SRC_URI_append_class-nativesdk = " \
            file://environment.d-openssl.sh \
            "
 
+SRC_URI_append_riscv32 = " \
+           file://0003-Add-support-for-io_pgetevents_time64-syscall.patch \
+           file://0004-Fixup-support-for-io_pgetevents_time64-syscall.patch \
+           "
+
 SRC_URI[sha256sum] = "aaf2fcb575cdf6491b98ab4829abf78a3dec8402b8b81efc8f23c00d443981bf"
 
 inherit lib_package multilib_header multilib_script ptest
-- 
2.30.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 2/3] linux-yocto: Add qemuriscv32 as a compatible machine
  2021-03-09 16:10 [PATCH 1/3] openssl: Enable building for RISC-V 32-bit Alistair Francis
@ 2021-03-09 16:10 ` Alistair Francis
  2021-03-09 16:10 ` [PATCH 3/3] machine: Initial commit of qemuriscv32 Alistair Francis
  1 sibling, 0 replies; 3+ messages in thread
From: Alistair Francis @ 2021-03-09 16:10 UTC (permalink / raw)
  To: openembedded-core; +Cc: alistair23, Alistair Francis

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 meta/recipes-kernel/linux/linux-yocto_5.10.bb | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/meta/recipes-kernel/linux/linux-yocto_5.10.bb b/meta/recipes-kernel/linux/linux-yocto_5.10.bb
index 6c0bec76d7..5f77a42b04 100644
--- a/meta/recipes-kernel/linux/linux-yocto_5.10.bb
+++ b/meta/recipes-kernel/linux/linux-yocto_5.10.bb
@@ -8,6 +8,7 @@ KBRANCH_qemuarm64 ?= "v5.10/standard/qemuarm64"
 KBRANCH_qemumips ?= "v5.10/standard/mti-malta32"
 KBRANCH_qemuppc  ?= "v5.10/standard/qemuppc"
 KBRANCH_qemuriscv64  ?= "v5.10/standard/base"
+KBRANCH_qemuriscv32  ?= "v5.10/standard/base"
 KBRANCH_qemux86  ?= "v5.10/standard/base"
 KBRANCH_qemux86-64 ?= "v5.10/standard/base"
 KBRANCH_qemumips64 ?= "v5.10/standard/mti-malta64"
@@ -17,6 +18,7 @@ SRCREV_machine_qemuarm64 ?= "5b86278250511c301540dc2ce5bf9561621b0bb4"
 SRCREV_machine_qemumips ?= "d6e16284f4bd6e627ef6dc2f6aea7116ae871d3e"
 SRCREV_machine_qemuppc ?= "5b86278250511c301540dc2ce5bf9561621b0bb4"
 SRCREV_machine_qemuriscv64 ?= "5b86278250511c301540dc2ce5bf9561621b0bb4"
+SRCREV_machine_qemuriscv32 ?= "5b86278250511c301540dc2ce5bf9561621b0bb4"
 SRCREV_machine_qemux86 ?= "5b86278250511c301540dc2ce5bf9561621b0bb4"
 SRCREV_machine_qemux86-64 ?= "5b86278250511c301540dc2ce5bf9561621b0bb4"
 SRCREV_machine_qemumips64 ?= "40975f4cdd7da46177e9b7817740a0aa22313897"
@@ -43,7 +45,7 @@ KCONF_BSP_AUDIT_LEVEL = "1"
 
 KERNEL_DEVICETREE_qemuarmv5 = "versatile-pb.dtb"
 
-COMPATIBLE_MACHINE = "qemuarm|qemuarmv5|qemuarm64|qemux86|qemuppc|qemumips|qemumips64|qemux86-64|qemuriscv64"
+COMPATIBLE_MACHINE = "qemuarm|qemuarmv5|qemuarm64|qemux86|qemuppc|qemumips|qemumips64|qemux86-64|qemuriscv64|qemuriscv32"
 
 # Functionality flags
 KERNEL_EXTRA_FEATURES ?= "features/netfilter/netfilter.scc"
-- 
2.30.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH 3/3] machine: Initial commit of qemuriscv32
  2021-03-09 16:10 [PATCH 1/3] openssl: Enable building for RISC-V 32-bit Alistair Francis
  2021-03-09 16:10 ` [PATCH 2/3] linux-yocto: Add qemuriscv32 as a compatible machine Alistair Francis
@ 2021-03-09 16:10 ` Alistair Francis
  1 sibling, 0 replies; 3+ messages in thread
From: Alistair Francis @ 2021-03-09 16:10 UTC (permalink / raw)
  To: openembedded-core; +Cc: alistair23, Alistair Francis

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 meta/conf/machine/qemuriscv32.conf | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 meta/conf/machine/qemuriscv32.conf

diff --git a/meta/conf/machine/qemuriscv32.conf b/meta/conf/machine/qemuriscv32.conf
new file mode 100644
index 0000000000..1413775ad6
--- /dev/null
+++ b/meta/conf/machine/qemuriscv32.conf
@@ -0,0 +1,17 @@
+#@TYPE: Machine
+#@NAME: generic riscv32 machine
+#@DESCRIPTION: Machine configuration for running a generic riscv32
+
+require conf/machine/include/riscv/qemuriscv.inc
+
+DEFAULTTUNE = "riscv32"
+
+PREFERRED_VERSION_openocd-native = "riscv"
+PREFERRED_VERSION_openocd = "riscv"
+
+XVISOR_PLAT = "riscv/virt32"
+
+# u-boot doesn't compile, error: "can't link hard-float modules with soft-float modules"
+# EXTRA_IMAGEDEPENDS += "u-boot"
+# UBOOT_MACHINE = "qemu-riscv32_smode_defconfig"
+# UBOOT_ELF = "u-boot"
-- 
2.30.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-03-09 16:10 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-09 16:10 [PATCH 1/3] openssl: Enable building for RISC-V 32-bit Alistair Francis
2021-03-09 16:10 ` [PATCH 2/3] linux-yocto: Add qemuriscv32 as a compatible machine Alistair Francis
2021-03-09 16:10 ` [PATCH 3/3] machine: Initial commit of qemuriscv32 Alistair Francis

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