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From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Marc Zyngier <maz@kernel.org>, Sasha Levin <sashal@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH AUTOSEL 5.10 03/22] KVM: arm64: Hide system instruction access to Trace registers
Date: Mon,  5 Apr 2021 12:04:12 -0400	[thread overview]
Message-ID: <20210405160432.268374-3-sashal@kernel.org> (raw)
In-Reply-To: <20210405160432.268374-1-sashal@kernel.org>

From: Suzuki K Poulose <suzuki.poulose@arm.com>

[ Upstream commit 1d676673d665fd2162e7e466dcfbe5373bfdb73e ]

Currently we advertise the ID_AA6DFR0_EL1.TRACEVER for the guest,
when the trace register accesses are trapped (CPTR_EL2.TTA == 1).
So, the guest will get an undefined instruction, if trusts the
ID registers and access one of the trace registers.
Lets be nice to the guest and hide the feature to avoid
unexpected behavior.

Even though this can be done at KVM sysreg emulation layer,
we do this by removing the TRACEVER from the sanitised feature
register field. This is fine as long as the ETM drivers
can handle the individual trace units separately, even
when there are differences among the CPUs.

Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210323120647.454211-2-suzuki.poulose@arm.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 arch/arm64/kernel/cpufeature.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 7da9a7cee4ce..5001c43ea6c3 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -382,7 +382,6 @@ static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
 	 * of support.
 	 */
 	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_EXACT, ID_AA64DFR0_PMUVER_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_TRACEVER_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_DEBUGVER_SHIFT, 4, 0x6),
 	ARM64_FTR_END,
 };
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Marc Zyngier <maz@kernel.org>, Sasha Levin <sashal@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH AUTOSEL 5.10 03/22] KVM: arm64: Hide system instruction access to Trace registers
Date: Mon,  5 Apr 2021 12:04:12 -0400	[thread overview]
Message-ID: <20210405160432.268374-3-sashal@kernel.org> (raw)
In-Reply-To: <20210405160432.268374-1-sashal@kernel.org>

From: Suzuki K Poulose <suzuki.poulose@arm.com>

[ Upstream commit 1d676673d665fd2162e7e466dcfbe5373bfdb73e ]

Currently we advertise the ID_AA6DFR0_EL1.TRACEVER for the guest,
when the trace register accesses are trapped (CPTR_EL2.TTA == 1).
So, the guest will get an undefined instruction, if trusts the
ID registers and access one of the trace registers.
Lets be nice to the guest and hide the feature to avoid
unexpected behavior.

Even though this can be done at KVM sysreg emulation layer,
we do this by removing the TRACEVER from the sanitised feature
register field. This is fine as long as the ETM drivers
can handle the individual trace units separately, even
when there are differences among the CPUs.

Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210323120647.454211-2-suzuki.poulose@arm.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 arch/arm64/kernel/cpufeature.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 7da9a7cee4ce..5001c43ea6c3 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -382,7 +382,6 @@ static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
 	 * of support.
 	 */
 	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_EXACT, ID_AA64DFR0_PMUVER_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_TRACEVER_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_DEBUGVER_SHIFT, 4, 0x6),
 	ARM64_FTR_END,
 };
-- 
2.30.2


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  parent reply	other threads:[~2021-04-05 16:05 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-05 16:04 [PATCH AUTOSEL 5.10 01/22] interconnect: core: fix error return code of icc_link_destroy() Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 02/22] gfs2: Flag a withdraw if init_threads() fails Sasha Levin
2021-04-05 16:04   ` [Cluster-devel] " Sasha Levin
2021-04-05 16:04 ` Sasha Levin [this message]
2021-04-05 16:04   ` [PATCH AUTOSEL 5.10 03/22] KVM: arm64: Hide system instruction access to Trace registers Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 04/22] KVM: arm64: Disable guest access to trace filter controls Sasha Levin
2021-04-05 16:04   ` Sasha Levin
2021-04-05 16:04   ` Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 05/22] drm/imx: imx-ldb: fix out of bounds array access warning Sasha Levin
2021-04-05 16:04   ` Sasha Levin
2021-04-05 16:04   ` Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 06/22] gfs2: report "already frozen/thawed" errors Sasha Levin
2021-04-05 16:04   ` [Cluster-devel] " Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 07/22] scsi: iscsi: Fix race condition between login and sync thread Sasha Levin
2021-04-06 17:24   ` Mike Christie
2021-04-06 19:22     ` Greg KH
2021-04-14 12:14     ` Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 08/22] ftrace: Check if pages were allocated before calling free_pages() Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 09/22] tools/kvm_stat: Add restart delay Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 10/22] drm/tegra: dc: Don't set PLL clock to 0Hz Sasha Levin
2021-04-05 16:04   ` Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 11/22] gpu: host1x: Use different lock classes for each client Sasha Levin
2021-04-05 16:04   ` Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 12/22] XArray: Fix splitting to non-zero orders Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 13/22] radix tree test suite: Fix compilation Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 14/22] block: only update parent bi_status when bio fail Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 15/22] radix tree test suite: Register the main thread with the RCU library Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 16/22] idr test suite: Take RCU read lock in idr_find_test_1 Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 17/22] idr test suite: Create anchor before launching throbber Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 18/22] null_blk: fix command timeout completion handling Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 19/22] io_uring: don't mark S_ISBLK async work as unbounded Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 20/22] riscv: evaluate put_user() arg before enabling user access Sasha Levin
2021-04-05 16:04   ` Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 21/22] riscv,entry: fix misaligned base for excp_vect_table Sasha Levin
2021-04-05 16:04   ` [PATCH AUTOSEL 5.10 21/22] riscv, entry: " Sasha Levin
2021-04-05 16:04 ` [PATCH AUTOSEL 5.10 22/22] block: don't ignore REQ_NOWAIT for direct IO Sasha Levin

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