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* [PATCH 1/2] ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
@ 2021-03-09  0:37 ` Kunihiko Hayashi
  0 siblings, 0 replies; 6+ messages in thread
From: Kunihiko Hayashi @ 2021-03-09  0:37 UTC (permalink / raw)
  To: Rob Herring, Arnd Bergmann
  Cc: Masami Hiramatsu, Jassi Brar, devicetree, linux-arm-kernel,
	linux-kernel, Kunihiko Hayashi

After applying the commit bbc4d71d6354
("net: phy: realtek: fix rtl8211e rx/tx delay config"), the configuration
register for TXDLY and RXDLY is set correctly.

Although PXs2 boards have RTL8211E for gigabit network PHY, it turrned out
that the phy-mode should be RGMII-ID mode. This changes 'phy-mode' property
to 'rgmii-id' as default.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 4d9f69a..5ba831e 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -583,7 +583,7 @@
 			clocks = <&sys_clk 6>;
 			reset-names = "ether";
 			resets = <&sys_rst 6>;
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			local-mac-address = [00 00 00 00 00 00];
 			socionext,syscon-phy-mode = <&soc_glue 0>;
 
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH 1/2] ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
@ 2021-03-09  0:37 ` Kunihiko Hayashi
  0 siblings, 0 replies; 6+ messages in thread
From: Kunihiko Hayashi @ 2021-03-09  0:37 UTC (permalink / raw)
  To: Rob Herring, Arnd Bergmann
  Cc: Masami Hiramatsu, Jassi Brar, devicetree, linux-arm-kernel,
	linux-kernel, Kunihiko Hayashi

After applying the commit bbc4d71d6354
("net: phy: realtek: fix rtl8211e rx/tx delay config"), the configuration
register for TXDLY and RXDLY is set correctly.

Although PXs2 boards have RTL8211E for gigabit network PHY, it turrned out
that the phy-mode should be RGMII-ID mode. This changes 'phy-mode' property
to 'rgmii-id' as default.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 4d9f69a..5ba831e 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -583,7 +583,7 @@
 			clocks = <&sys_clk 6>;
 			reset-names = "ether";
 			resets = <&sys_rst 6>;
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			local-mac-address = [00 00 00 00 00 00];
 			socionext,syscon-phy-mode = <&soc_glue 0>;
 
-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH 2/2] arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
  2021-03-09  0:37 ` Kunihiko Hayashi
@ 2021-03-09  0:37   ` Kunihiko Hayashi
  -1 siblings, 0 replies; 6+ messages in thread
From: Kunihiko Hayashi @ 2021-03-09  0:37 UTC (permalink / raw)
  To: Rob Herring, Arnd Bergmann
  Cc: Masami Hiramatsu, Jassi Brar, devicetree, linux-arm-kernel,
	linux-kernel, Kunihiko Hayashi

After applying the commit bbc4d71d6354
("net: phy: realtek: fix rtl8211e rx/tx delay config"), the configuration
register for TXDLY and RXDLY is set correctly.

Although some boards have RTL8211E for gigabit network PHY, it turrned out
that the phy-mode should be RGMII-ID mode. This changes 'phy-mode' property
to 'rgmii-id' as default.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 +-
 arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 52dee61..bd9959f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -806,7 +806,7 @@
 			clocks = <&sys_clk 6>;
 			reset-names = "ether";
 			resets = <&sys_rst 6>;
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			local-mac-address = [00 00 00 00 00 00];
 			socionext,syscon-phy-mode = <&soc_glue 0>;
 
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 80e2597..2038f51 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -564,7 +564,7 @@
 			clocks = <&sys_clk 6>;
 			reset-names = "ether";
 			resets = <&sys_rst 6>;
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			local-mac-address = [00 00 00 00 00 00];
 			socionext,syscon-phy-mode = <&soc_glue 0>;
 
@@ -585,7 +585,7 @@
 			clocks = <&sys_clk 7>;
 			reset-names = "ether";
 			resets = <&sys_rst 7>;
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			local-mac-address = [00 00 00 00 00 00];
 			socionext,syscon-phy-mode = <&soc_glue 1>;
 
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH 2/2] arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
@ 2021-03-09  0:37   ` Kunihiko Hayashi
  0 siblings, 0 replies; 6+ messages in thread
From: Kunihiko Hayashi @ 2021-03-09  0:37 UTC (permalink / raw)
  To: Rob Herring, Arnd Bergmann
  Cc: Masami Hiramatsu, Jassi Brar, devicetree, linux-arm-kernel,
	linux-kernel, Kunihiko Hayashi

After applying the commit bbc4d71d6354
("net: phy: realtek: fix rtl8211e rx/tx delay config"), the configuration
register for TXDLY and RXDLY is set correctly.

Although some boards have RTL8211E for gigabit network PHY, it turrned out
that the phy-mode should be RGMII-ID mode. This changes 'phy-mode' property
to 'rgmii-id' as default.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 +-
 arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 52dee61..bd9959f 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -806,7 +806,7 @@
 			clocks = <&sys_clk 6>;
 			reset-names = "ether";
 			resets = <&sys_rst 6>;
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			local-mac-address = [00 00 00 00 00 00];
 			socionext,syscon-phy-mode = <&soc_glue 0>;
 
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 80e2597..2038f51 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -564,7 +564,7 @@
 			clocks = <&sys_clk 6>;
 			reset-names = "ether";
 			resets = <&sys_rst 6>;
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			local-mac-address = [00 00 00 00 00 00];
 			socionext,syscon-phy-mode = <&soc_glue 0>;
 
@@ -585,7 +585,7 @@
 			clocks = <&sys_clk 7>;
 			reset-names = "ether";
 			resets = <&sys_rst 7>;
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			local-mac-address = [00 00 00 00 00 00];
 			socionext,syscon-phy-mode = <&soc_glue 1>;
 
-- 
2.7.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
  2021-03-09  0:37 ` Kunihiko Hayashi
@ 2021-04-06  6:51   ` Kunihiko Hayashi
  -1 siblings, 0 replies; 6+ messages in thread
From: Kunihiko Hayashi @ 2021-04-06  6:51 UTC (permalink / raw)
  To: Rob Herring, Arnd Bergmann
  Cc: Masami Hiramatsu, Jassi Brar, devicetree, linux-arm-kernel, linux-kernel

Gentle Ping.
Are there any comments about these two patches?

Thank you,

On Tue, 9 Mar 2021 09:37:15 +0900
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote:

> After applying the commit bbc4d71d6354
> ("net: phy: realtek: fix rtl8211e rx/tx delay config"), the configuration
> register for TXDLY and RXDLY is set correctly.
> 
> Although PXs2 boards have RTL8211E for gigabit network PHY, it turrned out
> that the phy-mode should be RGMII-ID mode. This changes 'phy-mode' property
> to 'rgmii-id' as default.
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> index 4d9f69a..5ba831e 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> @@ -583,7 +583,7 @@
>  			clocks = <&sys_clk 6>;
>  			reset-names = "ether";
>  			resets = <&sys_rst 6>;
> -			phy-mode = "rgmii";
> +			phy-mode = "rgmii-id";
>  			local-mac-address = [00 00 00 00 00 00];
>  			socionext,syscon-phy-mode = <&soc_glue 0>;
>  
> -- 
> 2.7.4

---
Best Regards,
Kunihiko Hayashi


^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E
@ 2021-04-06  6:51   ` Kunihiko Hayashi
  0 siblings, 0 replies; 6+ messages in thread
From: Kunihiko Hayashi @ 2021-04-06  6:51 UTC (permalink / raw)
  To: Rob Herring, Arnd Bergmann
  Cc: Masami Hiramatsu, Jassi Brar, devicetree, linux-arm-kernel, linux-kernel

Gentle Ping.
Are there any comments about these two patches?

Thank you,

On Tue, 9 Mar 2021 09:37:15 +0900
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> wrote:

> After applying the commit bbc4d71d6354
> ("net: phy: realtek: fix rtl8211e rx/tx delay config"), the configuration
> register for TXDLY and RXDLY is set correctly.
> 
> Although PXs2 boards have RTL8211E for gigabit network PHY, it turrned out
> that the phy-mode should be RGMII-ID mode. This changes 'phy-mode' property
> to 'rgmii-id' as default.
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  arch/arm/boot/dts/uniphier-pxs2.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> index 4d9f69a..5ba831e 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> @@ -583,7 +583,7 @@
>  			clocks = <&sys_clk 6>;
>  			reset-names = "ether";
>  			resets = <&sys_rst 6>;
> -			phy-mode = "rgmii";
> +			phy-mode = "rgmii-id";
>  			local-mac-address = [00 00 00 00 00 00];
>  			socionext,syscon-phy-mode = <&soc_glue 0>;
>  
> -- 
> 2.7.4

---
Best Regards,
Kunihiko Hayashi


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-04-06  6:54 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-09  0:37 [PATCH 1/2] ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins for RTL8211E Kunihiko Hayashi
2021-03-09  0:37 ` Kunihiko Hayashi
2021-03-09  0:37 ` [PATCH 2/2] arm64: " Kunihiko Hayashi
2021-03-09  0:37   ` Kunihiko Hayashi
2021-04-06  6:51 ` [PATCH 1/2] ARM: " Kunihiko Hayashi
2021-04-06  6:51   ` Kunihiko Hayashi

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