From: Ivan Uvarov <i.uvarov@cognitivepilot.com> To: devicetree@vger.kernel.org Cc: Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@siol.net>, Maxime Ripard <mripard@kernel.org>, Rob Herring <robh+dt@kernel.org>, linux-arm-kernel@lists.infradead.org, Andre Przywara <andre.przywara@arm.com>, Icenowy Zheng <icenowy@aosc.io>, Ivan Uvarov <i.uvarov@cognitivepilot.com> Subject: [PATCH v4 5/5] ARM: dts: sun8i: r40: add devicetree for Forlinx FETA40i-C & OKA40i-C Date: Wed, 7 Apr 2021 14:14:28 +0300 [thread overview] Message-ID: <20210407111428.3755684-6-i.uvarov@cognitivepilot.com> (raw) In-Reply-To: <20210407111428.3755684-1-i.uvarov@cognitivepilot.com> The FETA40i-C is a SoM by Forlinx based on the Allwinner R40/A40i. SoM specifications: - SoC: R40 or A40i - PMIC: AXP221S - RAM: 1GiB/2GiB DDR3 (dual-rank) - eMMC: 8GB, - Mates with carrier board via four 80-pin connectors (AXK6F80337YG). OKA40i-C is a carrier board by the same manufacturer for this SoM, whose main purpose is as a development board with a wide variety of peripherals: - Power: DC5V barrel or USB OTG or 4.2V Lipo battery - Video out: HDMI, TV out, LVDS - WiFi+Bluetooth: RL-UM02WBS-8723BU-V1.2 (802.11 b/g/n, BT V2.1/3.0/4.0) - Ethernet: 10/100Mbps - Storage: µSD, fullsize SD, eMMC (on SoM), SATA - USB: 3 x USB2.0 Host (2 via hub, 1 native), 1 x USB2.0 OTG (micro-B) - UART: RS232, RS485, 4 3.3v uarts (of which 2 have RTS/CTS) - Other I/O: SPI x2, TWI, SDIO header, GPIO header, JTAG header - Mini PCIe slot with sim holder for WLAN modem - Smart card holder - RTC (RX8010SJ) - Two user LEDs - Three user buttons (via KeyADC). This patch adds a devicetree for the aforementioned SoM and devboard. In order to reflect the modularity of this devboard and simplify adding support for future hardware based on the same SoM, the devicetree is split: Everything pertaining to the SoM itself is described in a separate .dtsi file, which is included by the devboard's .dts. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com> 3 files changed, 310 insertions(+) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 8e5d4ab4e7..88aae9de95 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1222,6 +1222,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-r16-nintendo-super-nes-classic.dtb \ sun8i-r16-parrot.dtb \ sun8i-r40-bananapi-m2-ultra.dtb \ + sun8i-r40-oka40i-c.dtb \ sun8i-s3-elimo-initium.dtb \ sun8i-s3-lichee-zero-plus.dtb \ sun8i-s3-pinecube.dtb \ diff --git a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi new file mode 100644 index 0000000000..265e0fa57a --- /dev/null +++ b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// Copyright (C) 2021 Ivan Uvarov <i.uvarov@cognitivepilot.com> +// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is: +// Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org> +// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> + +#include "sun8i-r40.dtsi" + +&i2c0 { + status = "okay"; + + axp22x: pmic@34 { + compatible = "x-powers,axp221"; + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp22x.dtsi" + +&mmc2 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_aldo2>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&pio { + pinctrl-names = "default"; + pinctrl-0 = <&clk_out_a_pin>; + vcc-pa-supply = <®_dcdc1>; + vcc-pc-supply = <®_aldo2>; + vcc-pd-supply = <®_dcdc1>; + vcc-pf-supply = <®_dldo4>; + vcc-pg-supply = <®_dldo1>; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pa"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi-io"; +}; + +®_dldo4 { + regulator-always-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vdd2v5-sata"; +}; + +®_eldo2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd1v2-sata"; +}; + +®_eldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc-pe"; +}; diff --git a/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts b/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts new file mode 100644 index 0000000000..0bd1336206 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts @@ -0,0 +1,203 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// Copyright (C) 2021 Ivan Uvarov <i.uvarov@cognitivepilot.com> +// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is: +// Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org> +// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> + +/dts-v1/; +#include "sun8i-r40-feta40i.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Forlinx OKA40i-C"; + compatible = "forlinx,oka40i-c", "forlinx,feta40i-c", "allwinner,sun8i-r40"; + + aliases { + ethernet0 = &gmac; + serial0 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; /* RS485 */ + serial7 = &uart7; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-5 { /* this is how the leds are labeled on the board */ + gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */ + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_STATUS; + }; + + led-6 { + gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */ + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_STATUS; + }; + }; + + reg_vcc5v0: vcc5v0 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN + clocks = <&ccu CLK_OUTA>; + clock-names = "ext_clock"; + }; +}; + +&ahci { + ahci-supply = <®_dldo4>; + phy-supply = <®_eldo2>; + status = "okay"; +}; + +&de { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + phy-supply = <®_dcdc1>; + status = "okay"; +}; + +&gmac_mdio { + phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&i2c2 { + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 8 11 GPIO_ACTIVE_LOW>; // PI11 + status = "okay"; +}; + +&mmc3 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 8 10 GPIO_ACTIVE_LOW>; // PI10 + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +®_dc1sw { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-lcd"; +}; + +®_dldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +&tcon_tv0 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pi_pins>, <&uart2_rts_cts_pi_pins>; + uart-has-rtscts; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pg_pins>; + status = "okay"; +}; + +&uart5 { /* RS485 */ + pinctrl-names = "default"; + pinctrl-0 = <&uart5_ph_pins>; + status = "okay"; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&uart7_pi_pins>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_vcc5v0>; + usb2_vbus-supply = <®_vcc5v0>; + status = "okay"; +}; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Ivan Uvarov <i.uvarov@cognitivepilot.com> To: devicetree@vger.kernel.org Cc: Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@siol.net>, Maxime Ripard <mripard@kernel.org>, Rob Herring <robh+dt@kernel.org>, linux-arm-kernel@lists.infradead.org, Andre Przywara <andre.przywara@arm.com>, Icenowy Zheng <icenowy@aosc.io>, Ivan Uvarov <i.uvarov@cognitivepilot.com> Subject: [PATCH v4 5/5] ARM: dts: sun8i: r40: add devicetree for Forlinx FETA40i-C & OKA40i-C Date: Wed, 7 Apr 2021 14:14:28 +0300 [thread overview] Message-ID: <20210407111428.3755684-6-i.uvarov@cognitivepilot.com> (raw) In-Reply-To: <20210407111428.3755684-1-i.uvarov@cognitivepilot.com> The FETA40i-C is a SoM by Forlinx based on the Allwinner R40/A40i. SoM specifications: - SoC: R40 or A40i - PMIC: AXP221S - RAM: 1GiB/2GiB DDR3 (dual-rank) - eMMC: 8GB, - Mates with carrier board via four 80-pin connectors (AXK6F80337YG). OKA40i-C is a carrier board by the same manufacturer for this SoM, whose main purpose is as a development board with a wide variety of peripherals: - Power: DC5V barrel or USB OTG or 4.2V Lipo battery - Video out: HDMI, TV out, LVDS - WiFi+Bluetooth: RL-UM02WBS-8723BU-V1.2 (802.11 b/g/n, BT V2.1/3.0/4.0) - Ethernet: 10/100Mbps - Storage: µSD, fullsize SD, eMMC (on SoM), SATA - USB: 3 x USB2.0 Host (2 via hub, 1 native), 1 x USB2.0 OTG (micro-B) - UART: RS232, RS485, 4 3.3v uarts (of which 2 have RTS/CTS) - Other I/O: SPI x2, TWI, SDIO header, GPIO header, JTAG header - Mini PCIe slot with sim holder for WLAN modem - Smart card holder - RTC (RX8010SJ) - Two user LEDs - Three user buttons (via KeyADC). This patch adds a devicetree for the aforementioned SoM and devboard. In order to reflect the modularity of this devboard and simplify adding support for future hardware based on the same SoM, the devicetree is split: Everything pertaining to the SoM itself is described in a separate .dtsi file, which is included by the devboard's .dts. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com> 3 files changed, 310 insertions(+) diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 8e5d4ab4e7..88aae9de95 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1222,6 +1222,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-r16-nintendo-super-nes-classic.dtb \ sun8i-r16-parrot.dtb \ sun8i-r40-bananapi-m2-ultra.dtb \ + sun8i-r40-oka40i-c.dtb \ sun8i-s3-elimo-initium.dtb \ sun8i-s3-lichee-zero-plus.dtb \ sun8i-s3-pinecube.dtb \ diff --git a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi new file mode 100644 index 0000000000..265e0fa57a --- /dev/null +++ b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// Copyright (C) 2021 Ivan Uvarov <i.uvarov@cognitivepilot.com> +// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is: +// Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org> +// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> + +#include "sun8i-r40.dtsi" + +&i2c0 { + status = "okay"; + + axp22x: pmic@34 { + compatible = "x-powers,axp221"; + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp22x.dtsi" + +&mmc2 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_aldo2>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&pio { + pinctrl-names = "default"; + pinctrl-0 = <&clk_out_a_pin>; + vcc-pa-supply = <®_dcdc1>; + vcc-pc-supply = <®_aldo2>; + vcc-pd-supply = <®_dcdc1>; + vcc-pf-supply = <®_dldo4>; + vcc-pg-supply = <®_dldo1>; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pa"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +®_dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi-io"; +}; + +®_dldo4 { + regulator-always-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vdd2v5-sata"; +}; + +®_eldo2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd1v2-sata"; +}; + +®_eldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc-pe"; +}; diff --git a/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts b/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts new file mode 100644 index 0000000000..0bd1336206 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts @@ -0,0 +1,203 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// Copyright (C) 2021 Ivan Uvarov <i.uvarov@cognitivepilot.com> +// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is: +// Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org> +// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> + +/dts-v1/; +#include "sun8i-r40-feta40i.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Forlinx OKA40i-C"; + compatible = "forlinx,oka40i-c", "forlinx,feta40i-c", "allwinner,sun8i-r40"; + + aliases { + ethernet0 = &gmac; + serial0 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; /* RS485 */ + serial7 = &uart7; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-5 { /* this is how the leds are labeled on the board */ + gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */ + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_STATUS; + }; + + led-6 { + gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */ + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_STATUS; + }; + }; + + reg_vcc5v0: vcc5v0 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN + clocks = <&ccu CLK_OUTA>; + clock-names = "ext_clock"; + }; +}; + +&ahci { + ahci-supply = <®_dldo4>; + phy-supply = <®_eldo2>; + status = "okay"; +}; + +&de { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ehci2 { + status = "okay"; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + phy-supply = <®_dcdc1>; + status = "okay"; +}; + +&gmac_mdio { + phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&i2c2 { + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 8 11 GPIO_ACTIVE_LOW>; // PI11 + status = "okay"; +}; + +&mmc3 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 8 10 GPIO_ACTIVE_LOW>; // PI10 + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +®_dc1sw { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-lcd"; +}; + +®_dldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +&tcon_tv0 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pi_pins>, <&uart2_rts_cts_pi_pins>; + uart-has-rtscts; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pg_pins>; + status = "okay"; +}; + +&uart5 { /* RS485 */ + pinctrl-names = "default"; + pinctrl-0 = <&uart5_ph_pins>; + status = "okay"; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&uart7_pi_pins>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_vcc5v0>; + usb2_vbus-supply = <®_vcc5v0>; + status = "okay"; +}; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-07 11:15 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-07 11:14 [PATCH v4 0/5] add devicetree for Forlinx FETA40i-C & OKA40i-C Ivan Uvarov 2021-04-07 11:14 ` Ivan Uvarov 2021-04-07 11:14 ` [PATCH v4 1/5] ARM: dts: sun8i: r40: add /omit-if-no-ref/ to pinmux nodes for UARTs 0&3 Ivan Uvarov 2021-04-07 11:14 ` Ivan Uvarov 2021-04-07 11:14 ` [PATCH v4 2/5] ARM: dts: sun8i: r40: add pinmux settings for MMC3 and UARTs 2,4,5&7 Ivan Uvarov 2021-04-07 11:14 ` [PATCH v4 2/5] ARM: dts: sun8i: r40: add pinmux settings for MMC3 and UARTs 2, 4, 5&7 Ivan Uvarov 2021-04-07 11:14 ` [PATCH v4 3/5] dt-bindings: add compatible vendor prefix for Forlinx Ivan Uvarov 2021-04-07 11:14 ` Ivan Uvarov 2021-04-08 20:14 ` Rob Herring 2021-04-08 20:14 ` Rob Herring 2021-04-07 11:14 ` [PATCH v4 4/5] dt-bindings: arm: add compatible for Forlinx OKA40i-C and FETA40i-C Ivan Uvarov 2021-04-07 11:14 ` Ivan Uvarov 2021-04-08 20:14 ` Rob Herring 2021-04-08 20:14 ` Rob Herring 2021-04-07 11:14 ` Ivan Uvarov [this message] 2021-04-07 11:14 ` [PATCH v4 5/5] ARM: dts: sun8i: r40: add devicetree for Forlinx FETA40i-C & OKA40i-C Ivan Uvarov 2021-04-15 8:08 ` [PATCH v4 0/5] " Maxime Ripard 2021-04-15 8:08 ` Maxime Ripard
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